1 /*
2 * Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 // Portions of code courtesy of Clifford Click
26
27 #include "incls/_precompiled.incl"
28 #include "incls/_mulnode.cpp.incl"
29
30
31 //=============================================================================
32 //------------------------------hash-------------------------------------------
33 // Hash function over MulNodes. Needs to be commutative; i.e., I swap
34 // (commute) inputs to MulNodes willy-nilly so the hash function must return
35 // the same value in the presence of edge swapping.
36 uint MulNode::hash() const {
37 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
38 }
39
40 //------------------------------Identity---------------------------------------
41 // Multiplying a one preserves the other argument
42 Node *MulNode::Identity( PhaseTransform *phase ) {
43 register const Type *one = mul_id(); // The multiplicative identity
44 if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
45 if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
46
47 return this;
48 }
49
50 //------------------------------Ideal------------------------------------------
51 // We also canonicalize the Node, moving constants to the right input,
52 // and flatten expressions (so that 1+x+2 becomes x+3).
53 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
54 const Type *t1 = phase->type( in(1) );
55 const Type *t2 = phase->type( in(2) );
56 Node *progress = NULL; // Progress flag
57 // We are OK if right is a constant, or right is a load and
58 // left is a non-constant.
59 if( !(t2->singleton() ||
60 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
61 if( t1->singleton() || // Left input is a constant?
62 // Otherwise, sort inputs (commutativity) to help value numbering.
63 (in(1)->_idx > in(2)->_idx) ) {
64 swap_edges(1, 2);
65 const Type *t = t1;
66 t1 = t2;
67 t2 = t;
68 progress = this; // Made progress
69 }
70 }
71
72 // If the right input is a constant, and the left input is a product of a
73 // constant, flatten the expression tree.
74 uint op = Opcode();
75 if( t2->singleton() && // Right input is a constant?
76 op != Op_MulF && // Float & double cannot reassociate
77 op != Op_MulD ) {
78 if( t2 == Type::TOP ) return NULL;
79 Node *mul1 = in(1);
80 #ifdef ASSERT
81 // Check for dead loop
82 int op1 = mul1->Opcode();
83 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
84 ( op1 == mul_opcode() || op1 == add_opcode() ) &&
85 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
86 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
87 assert(false, "dead loop in MulNode::Ideal");
88 #endif
89
90 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
91 // Mul of a constant?
92 const Type *t12 = phase->type( mul1->in(2) );
93 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
94 // Compute new constant; check for overflow
95 const Type *tcon01 = mul1->as_Mul()->mul_ring(t2,t12);
96 if( tcon01->singleton() ) {
97 // The Mul of the flattened expression
98 set_req(1, mul1->in(1));
99 set_req(2, phase->makecon( tcon01 ));
100 t2 = tcon01;
101 progress = this; // Made progress
102 }
103 }
104 }
105 // If the right input is a constant, and the left input is an add of a
106 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
107 const Node *add1 = in(1);
108 if( add1->Opcode() == add_opcode() ) { // Left input is an add?
109 // Add of a constant?
110 const Type *t12 = phase->type( add1->in(2) );
111 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
112 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
113 // Compute new constant; check for overflow
114 const Type *tcon01 = mul_ring(t2,t12);
115 if( tcon01->singleton() ) {
116
117 // Convert (X+con1)*con0 into X*con0
118 Node *mul = clone(); // mul = ()*con0
119 mul->set_req(1,add1->in(1)); // mul = X*con0
120 mul = phase->transform(mul);
121
122 Node *add2 = add1->clone();
123 add2->set_req(1, mul); // X*con0 + con0*con1
124 add2->set_req(2, phase->makecon(tcon01) );
125 progress = add2;
126 }
127 }
128 } // End of is left input an add
129 } // End of is right input a Mul
130
131 return progress;
132 }
133
134 //------------------------------Value-----------------------------------------
135 const Type *MulNode::Value( PhaseTransform *phase ) const {
136 const Type *t1 = phase->type( in(1) );
137 const Type *t2 = phase->type( in(2) );
138 // Either input is TOP ==> the result is TOP
139 if( t1 == Type::TOP ) return Type::TOP;
140 if( t2 == Type::TOP ) return Type::TOP;
141
142 // Either input is ZERO ==> the result is ZERO.
143 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
144 int op = Opcode();
145 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
146 const Type *zero = add_id(); // The multiplicative zero
147 if( t1->higher_equal( zero ) ) return zero;
148 if( t2->higher_equal( zero ) ) return zero;
149 }
150
151 // Either input is BOTTOM ==> the result is the local BOTTOM
152 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
153 return bottom_type();
154
155 #if defined(IA32)
156 // Can't trust native compilers to properly fold strict double
157 // multiplication with round-to-zero on this platform.
158 if (op == Op_MulD && phase->C->method()->is_strict()) {
159 return TypeD::DOUBLE;
160 }
161 #endif
162
163 return mul_ring(t1,t2); // Local flavor of type multiplication
164 }
165
166
167 //=============================================================================
168 //------------------------------Ideal------------------------------------------
169 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
170 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
171 // Swap constant to right
172 jint con;
173 if ((con = in(1)->find_int_con(0)) != 0) {
174 swap_edges(1, 2);
175 // Finish rest of method to use info in 'con'
176 } else if ((con = in(2)->find_int_con(0)) == 0) {
177 return MulNode::Ideal(phase, can_reshape);
178 }
179
180 // Now we have a constant Node on the right and the constant in con
181 if( con == 0 ) return NULL; // By zero is handled by Value call
182 if( con == 1 ) return NULL; // By one is handled by Identity call
183
184 // Check for negative constant; if so negate the final result
185 bool sign_flip = false;
186 if( con < 0 ) {
187 con = -con;
188 sign_flip = true;
189 }
190
191 // Get low bit; check for being the only bit
192 Node *res = NULL;
193 jint bit1 = con & -con; // Extract low bit
194 if( bit1 == con ) { // Found a power of 2?
195 res = new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
196 } else {
197
198 // Check for constant with 2 bits set
199 jint bit2 = con-bit1;
200 bit2 = bit2 & -bit2; // Extract 2nd bit
201 if( bit2 + bit1 == con ) { // Found all bits in con?
202 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
203 Node *n2 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
204 res = new (phase->C, 3) AddINode( n2, n1 );
205
206 } else if (is_power_of_2(con+1)) {
207 // Sleezy: power-of-2 -1. Next time be generic.
208 jint temp = (jint) (con + 1);
209 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
210 res = new (phase->C, 3) SubINode( n1, in(1) );
211 } else {
212 return MulNode::Ideal(phase, can_reshape);
213 }
214 }
215
216 if( sign_flip ) { // Need to negate result?
217 res = phase->transform(res);// Transform, before making the zero con
218 res = new (phase->C, 3) SubINode(phase->intcon(0),res);
219 }
220
221 return res; // Return final result
222 }
223
224 //------------------------------mul_ring---------------------------------------
225 // Compute the product type of two integer ranges into this node.
226 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
227 const TypeInt *r0 = t0->is_int(); // Handy access
228 const TypeInt *r1 = t1->is_int();
229
230 // Fetch endpoints of all ranges
231 int32 lo0 = r0->_lo;
232 double a = (double)lo0;
233 int32 hi0 = r0->_hi;
234 double b = (double)hi0;
235 int32 lo1 = r1->_lo;
236 double c = (double)lo1;
237 int32 hi1 = r1->_hi;
238 double d = (double)hi1;
239
240 // Compute all endpoints & check for overflow
241 int32 A = lo0*lo1;
242 if( (double)A != a*c ) return TypeInt::INT; // Overflow?
243 int32 B = lo0*hi1;
244 if( (double)B != a*d ) return TypeInt::INT; // Overflow?
245 int32 C = hi0*lo1;
246 if( (double)C != b*c ) return TypeInt::INT; // Overflow?
247 int32 D = hi0*hi1;
248 if( (double)D != b*d ) return TypeInt::INT; // Overflow?
249
250 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
251 else { lo0 = B; hi0 = A; }
252 if( C < D ) {
253 if( C < lo0 ) lo0 = C;
254 if( D > hi0 ) hi0 = D;
255 } else {
256 if( D < lo0 ) lo0 = D;
257 if( C > hi0 ) hi0 = C;
258 }
259 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
260 }
261
262
263 //=============================================================================
264 //------------------------------Ideal------------------------------------------
265 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
266 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
267 // Swap constant to right
268 jlong con;
269 if ((con = in(1)->find_long_con(0)) != 0) {
270 swap_edges(1, 2);
271 // Finish rest of method to use info in 'con'
272 } else if ((con = in(2)->find_long_con(0)) == 0) {
273 return MulNode::Ideal(phase, can_reshape);
274 }
275
276 // Now we have a constant Node on the right and the constant in con
277 if( con == CONST64(0) ) return NULL; // By zero is handled by Value call
278 if( con == CONST64(1) ) return NULL; // By one is handled by Identity call
279
280 // Check for negative constant; if so negate the final result
281 bool sign_flip = false;
282 if( con < 0 ) {
283 con = -con;
284 sign_flip = true;
285 }
286
287 // Get low bit; check for being the only bit
288 Node *res = NULL;
289 jlong bit1 = con & -con; // Extract low bit
290 if( bit1 == con ) { // Found a power of 2?
291 res = new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
292 } else {
293
294 // Check for constant with 2 bits set
295 jlong bit2 = con-bit1;
296 bit2 = bit2 & -bit2; // Extract 2nd bit
297 if( bit2 + bit1 == con ) { // Found all bits in con?
298 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
299 Node *n2 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
300 res = new (phase->C, 3) AddLNode( n2, n1 );
301
302 } else if (is_power_of_2_long(con+1)) {
303 // Sleezy: power-of-2 -1. Next time be generic.
304 jlong temp = (jlong) (con + 1);
305 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
306 res = new (phase->C, 3) SubLNode( n1, in(1) );
307 } else {
308 return MulNode::Ideal(phase, can_reshape);
309 }
310 }
311
312 if( sign_flip ) { // Need to negate result?
313 res = phase->transform(res);// Transform, before making the zero con
314 res = new (phase->C, 3) SubLNode(phase->longcon(0),res);
315 }
316
317 return res; // Return final result
318 }
319
320 //------------------------------mul_ring---------------------------------------
321 // Compute the product type of two integer ranges into this node.
322 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
323 const TypeLong *r0 = t0->is_long(); // Handy access
324 const TypeLong *r1 = t1->is_long();
325
326 // Fetch endpoints of all ranges
327 jlong lo0 = r0->_lo;
328 double a = (double)lo0;
329 jlong hi0 = r0->_hi;
330 double b = (double)hi0;
331 jlong lo1 = r1->_lo;
332 double c = (double)lo1;
333 jlong hi1 = r1->_hi;
334 double d = (double)hi1;
335
336 // Compute all endpoints & check for overflow
337 jlong A = lo0*lo1;
338 if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
339 jlong B = lo0*hi1;
340 if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
341 jlong C = hi0*lo1;
342 if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
343 jlong D = hi0*hi1;
344 if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
345
346 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
347 else { lo0 = B; hi0 = A; }
348 if( C < D ) {
349 if( C < lo0 ) lo0 = C;
350 if( D > hi0 ) hi0 = D;
351 } else {
352 if( D < lo0 ) lo0 = D;
353 if( C > hi0 ) hi0 = C;
354 }
355 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
356 }
357
358 //=============================================================================
359 //------------------------------mul_ring---------------------------------------
360 // Compute the product type of two double ranges into this node.
361 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
362 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
363 return TypeF::make( t0->getf() * t1->getf() );
364 }
365
366 //=============================================================================
367 //------------------------------mul_ring---------------------------------------
368 // Compute the product type of two double ranges into this node.
369 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
370 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
371 // We must be multiplying 2 double constants.
372 return TypeD::make( t0->getd() * t1->getd() );
373 }
374
375 //=============================================================================
376 //------------------------------Value------------------------------------------
377 const Type *MulHiLNode::Value( PhaseTransform *phase ) const {
378 // Either input is TOP ==> the result is TOP
379 const Type *t1 = phase->type( in(1) );
380 const Type *t2 = phase->type( in(2) );
381 if( t1 == Type::TOP ) return Type::TOP;
382 if( t2 == Type::TOP ) return Type::TOP;
383
384 // Either input is BOTTOM ==> the result is the local BOTTOM
385 const Type *bot = bottom_type();
386 if( (t1 == bot) || (t2 == bot) ||
387 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
388 return bot;
389
390 // It is not worth trying to constant fold this stuff!
391 return TypeLong::LONG;
392 }
393
394 //=============================================================================
395 //------------------------------mul_ring---------------------------------------
396 // Supplied function returns the product of the inputs IN THE CURRENT RING.
397 // For the logical operations the ring's MUL is really a logical AND function.
398 // This also type-checks the inputs for sanity. Guaranteed never to
399 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
400 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
401 const TypeInt *r0 = t0->is_int(); // Handy access
402 const TypeInt *r1 = t1->is_int();
403 int widen = MAX2(r0->_widen,r1->_widen);
404
405 // If either input is a constant, might be able to trim cases
406 if( !r0->is_con() && !r1->is_con() )
407 return TypeInt::INT; // No constants to be had
408
409 // Both constants? Return bits
410 if( r0->is_con() && r1->is_con() )
411 return TypeInt::make( r0->get_con() & r1->get_con() );
412
413 if( r0->is_con() && r0->get_con() > 0 )
414 return TypeInt::make(0, r0->get_con(), widen);
415
416 if( r1->is_con() && r1->get_con() > 0 )
417 return TypeInt::make(0, r1->get_con(), widen);
418
419 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
420 return TypeInt::BOOL;
421 }
422
423 return TypeInt::INT; // No constants to be had
424 }
425
426 //------------------------------Identity---------------------------------------
427 // Masking off the high bits of an unsigned load is not required
428 Node *AndINode::Identity( PhaseTransform *phase ) {
429
430 // x & x => x
431 if (phase->eqv(in(1), in(2))) return in(1);
432
433 Node *load = in(1);
434 const TypeInt *t2 = phase->type( in(2) )->isa_int();
435 if( t2 && t2->is_con() ) {
436 int con = t2->get_con();
437 // Masking off high bits which are always zero is useless.
438 const TypeInt* t1 = phase->type( in(1) )->isa_int();
439 if (t1 != NULL && t1->_lo >= 0) {
440 jint t1_support = ((jint)1 << (1 + log2_intptr(t1->_hi))) - 1;
441 if ((t1_support & con) == t1_support)
442 return load;
443 }
444 uint lop = load->Opcode();
445 if( lop == Op_LoadUS &&
446 con == 0x0000FFFF ) // Already zero-extended
447 return load;
448 // Masking off the high bits of a unsigned-shift-right is not
449 // needed either.
450 if( lop == Op_URShiftI ) {
451 const TypeInt *t12 = phase->type( load->in(2) )->isa_int();
452 if( t12 && t12->is_con() ) { // Shift is by a constant
453 int shift = t12->get_con();
454 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
455 int mask = max_juint >> shift;
456 if( (mask&con) == mask ) // If AND is useless, skip it
457 return load;
458 }
459 }
460 }
461 return MulNode::Identity(phase);
462 }
463
464 //------------------------------Ideal------------------------------------------
465 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
466 // Special case constant AND mask
467 const TypeInt *t2 = phase->type( in(2) )->isa_int();
468 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
469 const int mask = t2->get_con();
470 Node *load = in(1);
471 uint lop = load->Opcode();
472
473 // Masking bits off of a Character? Hi bits are already zero.
474 if( lop == Op_LoadUS &&
475 (mask & 0xFFFF0000) ) // Can we make a smaller mask?
476 return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF));
477
478 // Masking bits off of a Short? Loading a Character does some masking
479 if( lop == Op_LoadS &&
480 (mask & 0xFFFF0000) == 0 ) {
481 Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control),
482 load->in(MemNode::Memory),
483 load->in(MemNode::Address),
484 load->adr_type());
485 ldus = phase->transform(ldus);
486 return new (phase->C, 3) AndINode(ldus, phase->intcon(mask&0xFFFF));
487 }
488
489 // Masking sign bits off of a Byte? Let the matcher use an unsigned load
490 if( lop == Op_LoadB &&
491 (!in(0) && load->in(0)) &&
492 (mask == 0x000000FF) ) {
493 // Associate this node with the LoadB, so the matcher can see them together.
494 // If we don't do this, it is common for the LoadB to have one control
495 // edge, and the store or call containing this AndI to have a different
496 // control edge. This will cause Label_Root to group the AndI with
497 // the encoding store or call, so the matcher has no chance to match
498 // this AndI together with the LoadB. Setting the control edge here
499 // prevents Label_Root from grouping the AndI with the store or call,
500 // if it has a control edge that is inconsistent with the LoadB.
501 set_req(0, load->in(0));
502 return this;
503 }
504
505 // Masking off sign bits? Dont make them!
506 if( lop == Op_RShiftI ) {
507 const TypeInt *t12 = phase->type(load->in(2))->isa_int();
508 if( t12 && t12->is_con() ) { // Shift is by a constant
509 int shift = t12->get_con();
510 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
511 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
512 // If the AND'ing of the 2 masks has no bits, then only original shifted
513 // bits survive. NO sign-extension bits survive the maskings.
514 if( (sign_bits_mask & mask) == 0 ) {
515 // Use zero-fill shift instead
516 Node *zshift = phase->transform(new (phase->C, 3) URShiftINode(load->in(1),load->in(2)));
517 return new (phase->C, 3) AndINode( zshift, in(2) );
518 }
519 }
520 }
521
522 // Check for 'negate/and-1', a pattern emitted when someone asks for
523 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
524 // plus 1) and the mask is of the low order bit. Skip the negate.
525 if( lop == Op_SubI && mask == 1 && load->in(1) &&
526 phase->type(load->in(1)) == TypeInt::ZERO )
527 return new (phase->C, 3) AndINode( load->in(2), in(2) );
528
529 return MulNode::Ideal(phase, can_reshape);
530 }
531
532 //=============================================================================
533 //------------------------------mul_ring---------------------------------------
534 // Supplied function returns the product of the inputs IN THE CURRENT RING.
535 // For the logical operations the ring's MUL is really a logical AND function.
536 // This also type-checks the inputs for sanity. Guaranteed never to
537 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
538 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
539 const TypeLong *r0 = t0->is_long(); // Handy access
540 const TypeLong *r1 = t1->is_long();
541 int widen = MAX2(r0->_widen,r1->_widen);
542
543 // If either input is a constant, might be able to trim cases
544 if( !r0->is_con() && !r1->is_con() )
545 return TypeLong::LONG; // No constants to be had
546
547 // Both constants? Return bits
548 if( r0->is_con() && r1->is_con() )
549 return TypeLong::make( r0->get_con() & r1->get_con() );
550
551 if( r0->is_con() && r0->get_con() > 0 )
552 return TypeLong::make(CONST64(0), r0->get_con(), widen);
553
554 if( r1->is_con() && r1->get_con() > 0 )
555 return TypeLong::make(CONST64(0), r1->get_con(), widen);
556
557 return TypeLong::LONG; // No constants to be had
558 }
559
560 //------------------------------Identity---------------------------------------
561 // Masking off the high bits of an unsigned load is not required
562 Node *AndLNode::Identity( PhaseTransform *phase ) {
563
564 // x & x => x
565 if (phase->eqv(in(1), in(2))) return in(1);
566
567 Node *usr = in(1);
568 const TypeLong *t2 = phase->type( in(2) )->isa_long();
569 if( t2 && t2->is_con() ) {
570 jlong con = t2->get_con();
571 // Masking off high bits which are always zero is useless.
572 const TypeLong* t1 = phase->type( in(1) )->isa_long();
573 if (t1 != NULL && t1->_lo >= 0) {
574 jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1;
575 if ((t1_support & con) == t1_support)
576 return usr;
577 }
578 uint lop = usr->Opcode();
579 // Masking off the high bits of a unsigned-shift-right is not
580 // needed either.
581 if( lop == Op_URShiftL ) {
582 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
583 if( t12 && t12->is_con() ) { // Shift is by a constant
584 int shift = t12->get_con();
585 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
586 jlong mask = max_julong >> shift;
587 if( (mask&con) == mask ) // If AND is useless, skip it
588 return usr;
589 }
590 }
591 }
592 return MulNode::Identity(phase);
593 }
594
595 //------------------------------Ideal------------------------------------------
596 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
597 // Special case constant AND mask
598 const TypeLong *t2 = phase->type( in(2) )->isa_long();
599 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
600 const jlong mask = t2->get_con();
601
602 Node *rsh = in(1);
603 uint rop = rsh->Opcode();
604
605 // Masking off sign bits? Dont make them!
606 if( rop == Op_RShiftL ) {
607 const TypeInt *t12 = phase->type(rsh->in(2))->isa_int();
608 if( t12 && t12->is_con() ) { // Shift is by a constant
609 int shift = t12->get_con();
610 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
611 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
612 // If the AND'ing of the 2 masks has no bits, then only original shifted
613 // bits survive. NO sign-extension bits survive the maskings.
614 if( (sign_bits_mask & mask) == 0 ) {
615 // Use zero-fill shift instead
616 Node *zshift = phase->transform(new (phase->C, 3) URShiftLNode(rsh->in(1),rsh->in(2)));
617 return new (phase->C, 3) AndLNode( zshift, in(2) );
618 }
619 }
620 }
621
622 return MulNode::Ideal(phase, can_reshape);
623 }
624
625 //=============================================================================
626 //------------------------------Identity---------------------------------------
627 Node *LShiftINode::Identity( PhaseTransform *phase ) {
628 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
629 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
630 }
631
632 //------------------------------Ideal------------------------------------------
633 // If the right input is a constant, and the left input is an add of a
634 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
635 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
636 const Type *t = phase->type( in(2) );
637 if( t == Type::TOP ) return NULL; // Right input is dead
638 const TypeInt *t2 = t->isa_int();
639 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
640 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count
641
642 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
643
644 // Left input is an add of a constant?
645 Node *add1 = in(1);
646 int add1_op = add1->Opcode();
647 if( add1_op == Op_AddI ) { // Left input is an add?
648 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
649 const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
650 if( t12 && t12->is_con() ){ // Left input is an add of a con?
651 // Transform is legal, but check for profit. Avoid breaking 'i2s'
652 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
653 if( con < 16 ) {
654 // Compute X << con0
655 Node *lsh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(1), in(2) ) );
656 // Compute X<<con0 + (con1<<con0)
657 return new (phase->C, 3) AddINode( lsh, phase->intcon(t12->get_con() << con));
658 }
659 }
660 }
661
662 // Check for "(x>>c0)<<c0" which just masks off low bits
663 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
664 add1->in(2) == in(2) )
665 // Convert to "(x & -(1<<c0))"
666 return new (phase->C, 3) AndINode(add1->in(1),phase->intcon( -(1<<con)));
667
668 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
669 if( add1_op == Op_AndI ) {
670 Node *add2 = add1->in(1);
671 int add2_op = add2->Opcode();
672 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
673 add2->in(2) == in(2) ) {
674 // Convert to "(x & (Y<<c0))"
675 Node *y_sh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(2), in(2) ) );
676 return new (phase->C, 3) AndINode( add2->in(1), y_sh );
677 }
678 }
679
680 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
681 // before shifting them away.
682 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
683 if( add1_op == Op_AndI &&
684 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
685 return new (phase->C, 3) LShiftINode( add1->in(1), in(2) );
686
687 return NULL;
688 }
689
690 //------------------------------Value------------------------------------------
691 // A LShiftINode shifts its input2 left by input1 amount.
692 const Type *LShiftINode::Value( PhaseTransform *phase ) const {
693 const Type *t1 = phase->type( in(1) );
694 const Type *t2 = phase->type( in(2) );
695 // Either input is TOP ==> the result is TOP
696 if( t1 == Type::TOP ) return Type::TOP;
697 if( t2 == Type::TOP ) return Type::TOP;
698
699 // Left input is ZERO ==> the result is ZERO.
700 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
701 // Shift by zero does nothing
702 if( t2 == TypeInt::ZERO ) return t1;
703
704 // Either input is BOTTOM ==> the result is BOTTOM
705 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
706 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
707 return TypeInt::INT;
708
709 const TypeInt *r1 = t1->is_int(); // Handy access
710 const TypeInt *r2 = t2->is_int(); // Handy access
711
712 if (!r2->is_con())
713 return TypeInt::INT;
714
715 uint shift = r2->get_con();
716 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
717 // Shift by a multiple of 32 does nothing:
718 if (shift == 0) return t1;
719
720 // If the shift is a constant, shift the bounds of the type,
721 // unless this could lead to an overflow.
722 if (!r1->is_con()) {
723 jint lo = r1->_lo, hi = r1->_hi;
724 if (((lo << shift) >> shift) == lo &&
725 ((hi << shift) >> shift) == hi) {
726 // No overflow. The range shifts up cleanly.
727 return TypeInt::make((jint)lo << (jint)shift,
728 (jint)hi << (jint)shift,
729 MAX2(r1->_widen,r2->_widen));
730 }
731 return TypeInt::INT;
732 }
733
734 return TypeInt::make( (jint)r1->get_con() << (jint)shift );
735 }
736
737 //=============================================================================
738 //------------------------------Identity---------------------------------------
739 Node *LShiftLNode::Identity( PhaseTransform *phase ) {
740 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
741 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
742 }
743
744 //------------------------------Ideal------------------------------------------
745 // If the right input is a constant, and the left input is an add of a
746 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
747 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
748 const Type *t = phase->type( in(2) );
749 if( t == Type::TOP ) return NULL; // Right input is dead
750 const TypeInt *t2 = t->isa_int();
751 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
752 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count
753
754 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
755
756 // Left input is an add of a constant?
757 Node *add1 = in(1);
758 int add1_op = add1->Opcode();
759 if( add1_op == Op_AddL ) { // Left input is an add?
760 // Avoid dead data cycles from dead loops
761 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
762 const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
763 if( t12 && t12->is_con() ){ // Left input is an add of a con?
764 // Compute X << con0
765 Node *lsh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ) );
766 // Compute X<<con0 + (con1<<con0)
767 return new (phase->C, 3) AddLNode( lsh, phase->longcon(t12->get_con() << con));
768 }
769 }
770
771 // Check for "(x>>c0)<<c0" which just masks off low bits
772 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
773 add1->in(2) == in(2) )
774 // Convert to "(x & -(1<<c0))"
775 return new (phase->C, 3) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
776
777 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
778 if( add1_op == Op_AndL ) {
779 Node *add2 = add1->in(1);
780 int add2_op = add2->Opcode();
781 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
782 add2->in(2) == in(2) ) {
783 // Convert to "(x & (Y<<c0))"
784 Node *y_sh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(2), in(2) ) );
785 return new (phase->C, 3) AndLNode( add2->in(1), y_sh );
786 }
787 }
788
789 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
790 // before shifting them away.
791 const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1);
792 if( add1_op == Op_AndL &&
793 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
794 return new (phase->C, 3) LShiftLNode( add1->in(1), in(2) );
795
796 return NULL;
797 }
798
799 //------------------------------Value------------------------------------------
800 // A LShiftLNode shifts its input2 left by input1 amount.
801 const Type *LShiftLNode::Value( PhaseTransform *phase ) const {
802 const Type *t1 = phase->type( in(1) );
803 const Type *t2 = phase->type( in(2) );
804 // Either input is TOP ==> the result is TOP
805 if( t1 == Type::TOP ) return Type::TOP;
806 if( t2 == Type::TOP ) return Type::TOP;
807
808 // Left input is ZERO ==> the result is ZERO.
809 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
810 // Shift by zero does nothing
811 if( t2 == TypeInt::ZERO ) return t1;
812
813 // Either input is BOTTOM ==> the result is BOTTOM
814 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
815 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
816 return TypeLong::LONG;
817
818 const TypeLong *r1 = t1->is_long(); // Handy access
819 const TypeInt *r2 = t2->is_int(); // Handy access
820
821 if (!r2->is_con())
822 return TypeLong::LONG;
823
824 uint shift = r2->get_con();
825 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
826 // Shift by a multiple of 64 does nothing:
827 if (shift == 0) return t1;
828
829 // If the shift is a constant, shift the bounds of the type,
830 // unless this could lead to an overflow.
831 if (!r1->is_con()) {
832 jlong lo = r1->_lo, hi = r1->_hi;
833 if (((lo << shift) >> shift) == lo &&
834 ((hi << shift) >> shift) == hi) {
835 // No overflow. The range shifts up cleanly.
836 return TypeLong::make((jlong)lo << (jint)shift,
837 (jlong)hi << (jint)shift,
838 MAX2(r1->_widen,r2->_widen));
839 }
840 return TypeLong::LONG;
841 }
842
843 return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
844 }
845
846 //=============================================================================
847 //------------------------------Identity---------------------------------------
848 Node *RShiftINode::Identity( PhaseTransform *phase ) {
849 const TypeInt *t2 = phase->type(in(2))->isa_int();
850 if( !t2 ) return this;
851 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
852 return in(1);
853
854 // Check for useless sign-masking
855 if( in(1)->Opcode() == Op_LShiftI &&
856 in(1)->req() == 3 &&
857 in(1)->in(2) == in(2) &&
858 t2->is_con() ) {
859 uint shift = t2->get_con();
860 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
861 // Compute masks for which this shifting doesn't change
862 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
863 int hi = ~lo; // 00007FFF
864 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
865 if( !t11 ) return this;
866 // Does actual value fit inside of mask?
867 if( lo <= t11->_lo && t11->_hi <= hi )
868 return in(1)->in(1); // Then shifting is a nop
869 }
870
871 return this;
872 }
873
874 //------------------------------Ideal------------------------------------------
875 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
876 // Inputs may be TOP if they are dead.
877 const TypeInt *t1 = phase->type( in(1) )->isa_int();
878 if( !t1 ) return NULL; // Left input is an integer
879 const TypeInt *t2 = phase->type( in(2) )->isa_int();
880 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
881 const TypeInt *t3; // type of in(1).in(2)
882 int shift = t2->get_con();
883 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
884
885 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count
886
887 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
888 // Such expressions arise normally from shift chains like (byte)(x >> 24).
889 const Node *mask = in(1);
890 if( mask->Opcode() == Op_AndI &&
891 (t3 = phase->type(mask->in(2))->isa_int()) &&
892 t3->is_con() ) {
893 Node *x = mask->in(1);
894 jint maskbits = t3->get_con();
895 // Convert to "(x >> shift) & (mask >> shift)"
896 Node *shr_nomask = phase->transform( new (phase->C, 3) RShiftINode(mask->in(1), in(2)) );
897 return new (phase->C, 3) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
898 }
899
900 // Check for "(short[i] <<16)>>16" which simply sign-extends
901 const Node *shl = in(1);
902 if( shl->Opcode() != Op_LShiftI ) return NULL;
903
904 if( shift == 16 &&
905 (t3 = phase->type(shl->in(2))->isa_int()) &&
906 t3->is_con(16) ) {
907 Node *ld = shl->in(1);
908 if( ld->Opcode() == Op_LoadS ) {
909 // Sign extension is just useless here. Return a RShiftI of zero instead
910 // returning 'ld' directly. We cannot return an old Node directly as
911 // that is the job of 'Identity' calls and Identity calls only work on
912 // direct inputs ('ld' is an extra Node removed from 'this'). The
913 // combined optimization requires Identity only return direct inputs.
914 set_req(1, ld);
915 set_req(2, phase->intcon(0));
916 return this;
917 }
918 else if( ld->Opcode() == Op_LoadUS )
919 // Replace zero-extension-load with sign-extension-load
920 return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control),
921 ld->in(MemNode::Memory),
922 ld->in(MemNode::Address),
923 ld->adr_type());
924 }
925
926 // Check for "(byte[i] <<24)>>24" which simply sign-extends
927 if( shift == 24 &&
928 (t3 = phase->type(shl->in(2))->isa_int()) &&
929 t3->is_con(24) ) {
930 Node *ld = shl->in(1);
931 if( ld->Opcode() == Op_LoadB ) {
932 // Sign extension is just useless here
933 set_req(1, ld);
934 set_req(2, phase->intcon(0));
935 return this;
936 }
937 }
938
939 return NULL;
940 }
941
942 //------------------------------Value------------------------------------------
943 // A RShiftINode shifts its input2 right by input1 amount.
944 const Type *RShiftINode::Value( PhaseTransform *phase ) const {
945 const Type *t1 = phase->type( in(1) );
946 const Type *t2 = phase->type( in(2) );
947 // Either input is TOP ==> the result is TOP
948 if( t1 == Type::TOP ) return Type::TOP;
949 if( t2 == Type::TOP ) return Type::TOP;
950
951 // Left input is ZERO ==> the result is ZERO.
952 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
953 // Shift by zero does nothing
954 if( t2 == TypeInt::ZERO ) return t1;
955
956 // Either input is BOTTOM ==> the result is BOTTOM
957 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
958 return TypeInt::INT;
959
960 if (t2 == TypeInt::INT)
961 return TypeInt::INT;
962
963 const TypeInt *r1 = t1->is_int(); // Handy access
964 const TypeInt *r2 = t2->is_int(); // Handy access
965
966 // If the shift is a constant, just shift the bounds of the type.
967 // For example, if the shift is 31, we just propagate sign bits.
968 if (r2->is_con()) {
969 uint shift = r2->get_con();
970 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
971 // Shift by a multiple of 32 does nothing:
972 if (shift == 0) return t1;
973 // Calculate reasonably aggressive bounds for the result.
974 // This is necessary if we are to correctly type things
975 // like (x<<24>>24) == ((byte)x).
976 jint lo = (jint)r1->_lo >> (jint)shift;
977 jint hi = (jint)r1->_hi >> (jint)shift;
978 assert(lo <= hi, "must have valid bounds");
979 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
980 #ifdef ASSERT
981 // Make sure we get the sign-capture idiom correct.
982 if (shift == BitsPerJavaInteger-1) {
983 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
984 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
985 }
986 #endif
987 return ti;
988 }
989
990 if( !r1->is_con() || !r2->is_con() )
991 return TypeInt::INT;
992
993 // Signed shift right
994 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
995 }
996
997 //=============================================================================
998 //------------------------------Identity---------------------------------------
999 Node *RShiftLNode::Identity( PhaseTransform *phase ) {
1000 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1001 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1002 }
1003
1004 //------------------------------Value------------------------------------------
1005 // A RShiftLNode shifts its input2 right by input1 amount.
1006 const Type *RShiftLNode::Value( PhaseTransform *phase ) const {
1007 const Type *t1 = phase->type( in(1) );
1008 const Type *t2 = phase->type( in(2) );
1009 // Either input is TOP ==> the result is TOP
1010 if( t1 == Type::TOP ) return Type::TOP;
1011 if( t2 == Type::TOP ) return Type::TOP;
1012
1013 // Left input is ZERO ==> the result is ZERO.
1014 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1015 // Shift by zero does nothing
1016 if( t2 == TypeInt::ZERO ) return t1;
1017
1018 // Either input is BOTTOM ==> the result is BOTTOM
1019 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1020 return TypeLong::LONG;
1021
1022 if (t2 == TypeInt::INT)
1023 return TypeLong::LONG;
1024
1025 const TypeLong *r1 = t1->is_long(); // Handy access
1026 const TypeInt *r2 = t2->is_int (); // Handy access
1027
1028 // If the shift is a constant, just shift the bounds of the type.
1029 // For example, if the shift is 63, we just propagate sign bits.
1030 if (r2->is_con()) {
1031 uint shift = r2->get_con();
1032 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
1033 // Shift by a multiple of 64 does nothing:
1034 if (shift == 0) return t1;
1035 // Calculate reasonably aggressive bounds for the result.
1036 // This is necessary if we are to correctly type things
1037 // like (x<<24>>24) == ((byte)x).
1038 jlong lo = (jlong)r1->_lo >> (jlong)shift;
1039 jlong hi = (jlong)r1->_hi >> (jlong)shift;
1040 assert(lo <= hi, "must have valid bounds");
1041 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1042 #ifdef ASSERT
1043 // Make sure we get the sign-capture idiom correct.
1044 if (shift == (2*BitsPerJavaInteger)-1) {
1045 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
1046 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1047 }
1048 #endif
1049 return tl;
1050 }
1051
1052 return TypeLong::LONG; // Give up
1053 }
1054
1055 //=============================================================================
1056 //------------------------------Identity---------------------------------------
1057 Node *URShiftINode::Identity( PhaseTransform *phase ) {
1058 const TypeInt *ti = phase->type( in(2) )->isa_int();
1059 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
1060
1061 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1062 // Happens during new-array length computation.
1063 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1064 Node *add = in(1);
1065 if( add->Opcode() == Op_AddI ) {
1066 const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1067 if( t2 && t2->is_con(wordSize - 1) &&
1068 add->in(1)->Opcode() == Op_LShiftI ) {
1069 // Check that shift_counts are LogBytesPerWord
1070 Node *lshift_count = add->in(1)->in(2);
1071 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1072 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1073 t_lshift_count == phase->type(in(2)) ) {
1074 Node *x = add->in(1)->in(1);
1075 const TypeInt *t_x = phase->type(x)->isa_int();
1076 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1077 return x;
1078 }
1079 }
1080 }
1081 }
1082
1083 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1084 }
1085
1086 //------------------------------Ideal------------------------------------------
1087 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1088 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1089 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1090 const int con = t2->get_con() & 31; // Shift count is always masked
1091 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1092 // We'll be wanting the right-shift amount as a mask of that many bits
1093 const int mask = right_n_bits(BitsPerJavaInteger - con);
1094
1095 int in1_op = in(1)->Opcode();
1096
1097 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1098 if( in1_op == Op_URShiftI ) {
1099 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1100 if( t12 && t12->is_con() ) { // Right input is a constant
1101 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1102 const int con2 = t12->get_con() & 31; // Shift count is always masked
1103 const int con3 = con+con2;
1104 if( con3 < 32 ) // Only merge shifts if total is < 32
1105 return new (phase->C, 3) URShiftINode( in(1)->in(1), phase->intcon(con3) );
1106 }
1107 }
1108
1109 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1110 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1111 // If Q is "X << z" the rounding is useless. Look for patterns like
1112 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1113 Node *add = in(1);
1114 if( in1_op == Op_AddI ) {
1115 Node *lshl = add->in(1);
1116 if( lshl->Opcode() == Op_LShiftI &&
1117 phase->type(lshl->in(2)) == t2 ) {
1118 Node *y_z = phase->transform( new (phase->C, 3) URShiftINode(add->in(2),in(2)) );
1119 Node *sum = phase->transform( new (phase->C, 3) AddINode( lshl->in(1), y_z ) );
1120 return new (phase->C, 3) AndINode( sum, phase->intcon(mask) );
1121 }
1122 }
1123
1124 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1125 // This shortens the mask. Also, if we are extracting a high byte and
1126 // storing it to a buffer, the mask will be removed completely.
1127 Node *andi = in(1);
1128 if( in1_op == Op_AndI ) {
1129 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1130 if( t3 && t3->is_con() ) { // Right input is a constant
1131 jint mask2 = t3->get_con();
1132 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1133 Node *newshr = phase->transform( new (phase->C, 3) URShiftINode(andi->in(1), in(2)) );
1134 return new (phase->C, 3) AndINode(newshr, phase->intcon(mask2));
1135 // The negative values are easier to materialize than positive ones.
1136 // A typical case from address arithmetic is ((x & ~15) >> 4).
1137 // It's better to change that to ((x >> 4) & ~0) versus
1138 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
1139 }
1140 }
1141
1142 // Check for "(X << z ) >>> z" which simply zero-extends
1143 Node *shl = in(1);
1144 if( in1_op == Op_LShiftI &&
1145 phase->type(shl->in(2)) == t2 )
1146 return new (phase->C, 3) AndINode( shl->in(1), phase->intcon(mask) );
1147
1148 return NULL;
1149 }
1150
1151 //------------------------------Value------------------------------------------
1152 // A URShiftINode shifts its input2 right by input1 amount.
1153 const Type *URShiftINode::Value( PhaseTransform *phase ) const {
1154 // (This is a near clone of RShiftINode::Value.)
1155 const Type *t1 = phase->type( in(1) );
1156 const Type *t2 = phase->type( in(2) );
1157 // Either input is TOP ==> the result is TOP
1158 if( t1 == Type::TOP ) return Type::TOP;
1159 if( t2 == Type::TOP ) return Type::TOP;
1160
1161 // Left input is ZERO ==> the result is ZERO.
1162 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1163 // Shift by zero does nothing
1164 if( t2 == TypeInt::ZERO ) return t1;
1165
1166 // Either input is BOTTOM ==> the result is BOTTOM
1167 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1168 return TypeInt::INT;
1169
1170 if (t2 == TypeInt::INT)
1171 return TypeInt::INT;
1172
1173 const TypeInt *r1 = t1->is_int(); // Handy access
1174 const TypeInt *r2 = t2->is_int(); // Handy access
1175
1176 if (r2->is_con()) {
1177 uint shift = r2->get_con();
1178 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1179 // Shift by a multiple of 32 does nothing:
1180 if (shift == 0) return t1;
1181 // Calculate reasonably aggressive bounds for the result.
1182 jint lo = (juint)r1->_lo >> (juint)shift;
1183 jint hi = (juint)r1->_hi >> (juint)shift;
1184 if (r1->_hi >= 0 && r1->_lo < 0) {
1185 // If the type has both negative and positive values,
1186 // there are two separate sub-domains to worry about:
1187 // The positive half and the negative half.
1188 jint neg_lo = lo;
1189 jint neg_hi = (juint)-1 >> (juint)shift;
1190 jint pos_lo = (juint) 0 >> (juint)shift;
1191 jint pos_hi = hi;
1192 lo = MIN2(neg_lo, pos_lo); // == 0
1193 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1194 }
1195 assert(lo <= hi, "must have valid bounds");
1196 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1197 #ifdef ASSERT
1198 // Make sure we get the sign-capture idiom correct.
1199 if (shift == BitsPerJavaInteger-1) {
1200 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1201 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
1202 }
1203 #endif
1204 return ti;
1205 }
1206
1207 //
1208 // Do not support shifted oops in info for GC
1209 //
1210 // else if( t1->base() == Type::InstPtr ) {
1211 //
1212 // const TypeInstPtr *o = t1->is_instptr();
1213 // if( t1->singleton() )
1214 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1215 // }
1216 // else if( t1->base() == Type::KlassPtr ) {
1217 // const TypeKlassPtr *o = t1->is_klassptr();
1218 // if( t1->singleton() )
1219 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1220 // }
1221
1222 return TypeInt::INT;
1223 }
1224
1225 //=============================================================================
1226 //------------------------------Identity---------------------------------------
1227 Node *URShiftLNode::Identity( PhaseTransform *phase ) {
1228 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1229 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1230 }
1231
1232 //------------------------------Ideal------------------------------------------
1233 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1234 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1235 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1236 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
1237 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1238 // note: mask computation below does not work for 0 shift count
1239 // We'll be wanting the right-shift amount as a mask of that many bits
1240 const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) -1);
1241
1242 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1243 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1244 // If Q is "X << z" the rounding is useless. Look for patterns like
1245 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1246 Node *add = in(1);
1247 if( add->Opcode() == Op_AddL ) {
1248 Node *lshl = add->in(1);
1249 if( lshl->Opcode() == Op_LShiftL &&
1250 phase->type(lshl->in(2)) == t2 ) {
1251 Node *y_z = phase->transform( new (phase->C, 3) URShiftLNode(add->in(2),in(2)) );
1252 Node *sum = phase->transform( new (phase->C, 3) AddLNode( lshl->in(1), y_z ) );
1253 return new (phase->C, 3) AndLNode( sum, phase->longcon(mask) );
1254 }
1255 }
1256
1257 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1258 // This shortens the mask. Also, if we are extracting a high byte and
1259 // storing it to a buffer, the mask will be removed completely.
1260 Node *andi = in(1);
1261 if( andi->Opcode() == Op_AndL ) {
1262 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1263 if( t3 && t3->is_con() ) { // Right input is a constant
1264 jlong mask2 = t3->get_con();
1265 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1266 Node *newshr = phase->transform( new (phase->C, 3) URShiftLNode(andi->in(1), in(2)) );
1267 return new (phase->C, 3) AndLNode(newshr, phase->longcon(mask2));
1268 }
1269 }
1270
1271 // Check for "(X << z ) >>> z" which simply zero-extends
1272 Node *shl = in(1);
1273 if( shl->Opcode() == Op_LShiftL &&
1274 phase->type(shl->in(2)) == t2 )
1275 return new (phase->C, 3) AndLNode( shl->in(1), phase->longcon(mask) );
1276
1277 return NULL;
1278 }
1279
1280 //------------------------------Value------------------------------------------
1281 // A URShiftINode shifts its input2 right by input1 amount.
1282 const Type *URShiftLNode::Value( PhaseTransform *phase ) const {
1283 // (This is a near clone of RShiftLNode::Value.)
1284 const Type *t1 = phase->type( in(1) );
1285 const Type *t2 = phase->type( in(2) );
1286 // Either input is TOP ==> the result is TOP
1287 if( t1 == Type::TOP ) return Type::TOP;
1288 if( t2 == Type::TOP ) return Type::TOP;
1289
1290 // Left input is ZERO ==> the result is ZERO.
1291 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1292 // Shift by zero does nothing
1293 if( t2 == TypeInt::ZERO ) return t1;
1294
1295 // Either input is BOTTOM ==> the result is BOTTOM
1296 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1297 return TypeLong::LONG;
1298
1299 if (t2 == TypeInt::INT)
1300 return TypeLong::LONG;
1301
1302 const TypeLong *r1 = t1->is_long(); // Handy access
1303 const TypeInt *r2 = t2->is_int (); // Handy access
1304
1305 if (r2->is_con()) {
1306 uint shift = r2->get_con();
1307 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1308 // Shift by a multiple of 64 does nothing:
1309 if (shift == 0) return t1;
1310 // Calculate reasonably aggressive bounds for the result.
1311 jlong lo = (julong)r1->_lo >> (juint)shift;
1312 jlong hi = (julong)r1->_hi >> (juint)shift;
1313 if (r1->_hi >= 0 && r1->_lo < 0) {
1314 // If the type has both negative and positive values,
1315 // there are two separate sub-domains to worry about:
1316 // The positive half and the negative half.
1317 jlong neg_lo = lo;
1318 jlong neg_hi = (julong)-1 >> (juint)shift;
1319 jlong pos_lo = (julong) 0 >> (juint)shift;
1320 jlong pos_hi = hi;
1321 //lo = MIN2(neg_lo, pos_lo); // == 0
1322 lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1323 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1324 hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1325 }
1326 assert(lo <= hi, "must have valid bounds");
1327 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1328 #ifdef ASSERT
1329 // Make sure we get the sign-capture idiom correct.
1330 if (shift == BitsPerJavaLong - 1) {
1331 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1332 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
1333 }
1334 #endif
1335 return tl;
1336 }
1337
1338 return TypeLong::LONG; // Give up
1339 }