src/share/vm/opto/ifg.cpp

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 468   for( uint i = 0; i < _cfg._num_blocks; i++ ) {
 469     Block *b = _cfg._blocks[i];
 470     // Clone (rather than smash in place) the liveout info, so it is alive
 471     // for the "collect_gc_info" phase later.
 472     IndexSet liveout(_live->live(b));
 473     uint last_inst = b->end_idx();
 474     // Compute last phi index
 475     uint last_phi;
 476     for( last_phi = 1; last_phi < last_inst; last_phi++ )
 477       if( !b->_nodes[last_phi]->is_Phi() )
 478         break;
 479 
 480     // Reset block's register pressure values for each ifg construction
 481     uint pressure[2], hrp_index[2];
 482     pressure[0] = pressure[1] = 0;
 483     hrp_index[0] = hrp_index[1] = last_inst+1;
 484     b->_reg_pressure = b->_freg_pressure = 0;
 485     // Liveout things are presumed live for the whole block.  We accumulate
 486     // 'area' accordingly.  If they get killed in the block, we'll subtract
 487     // the unused part of the block from the area.
 488     double cost = b->_freq * double(last_inst-last_phi);
 489     assert( cost >= 0, "negative spill cost" );

 490     IndexSetIterator elements(&liveout);
 491     uint lidx;
 492     while ((lidx = elements.next()) != 0) {
 493       LRG &lrg = lrgs(lidx);
 494       lrg._area += cost;
 495       // Compute initial register pressure
 496       if( lrg.mask().is_UP() && lrg.mask_size() ) {
 497         if( lrg._is_float ) {   // Count float pressure
 498           pressure[1] += lrg.reg_pressure();
 499 #ifdef EXACT_PRESSURE
 500           if( pressure[1] > b->_freg_pressure )
 501             b->_freg_pressure = pressure[1];
 502 #endif
 503           // Count int pressure, but do not count the SP, flags
 504         } else if( lrgs(lidx).mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) ) {
 505           pressure[0] += lrg.reg_pressure();
 506 #ifdef EXACT_PRESSURE
 507           if( pressure[0] > b->_reg_pressure )
 508             b->_reg_pressure = pressure[0];
 509 #endif


 573             // Count the float-only registers
 574             RegMask ftmp = lrgs(r).mask();
 575             ftmp.AND(*Matcher::idealreg2regmask[Op_RegD]);
 576             int fregs = ftmp.Size();
 577 #ifdef EXACT_PRESSURE
 578             if( pressure[1]+fregs > b->_freg_pressure )
 579               b->_freg_pressure = pressure[1]+fregs;
 580 #endif
 581             if( pressure[1]       <= (uint)FLOATPRESSURE &&
 582                 pressure[1]+fregs >  (uint)FLOATPRESSURE ) {
 583 #ifndef EXACT_PRESSURE
 584               b->_freg_pressure = (uint)FLOATPRESSURE+1;
 585 #endif
 586               hrp_index[1] = j-1;
 587             }
 588           }
 589 
 590         } else {                // Else it is live
 591           // A DEF also ends 'area' partway through the block.
 592           lrgs(r)._area -= cost;
 593           assert( lrgs(r)._area >= 0, "negative spill area" );
 594 
 595           // Insure high score for immediate-use spill copies so they get a color
 596           if( n->is_SpillCopy()
 597               && lrgs(r).is_singledef()        // MultiDef live range can still split
 598               && n->outcnt() == 1              // and use must be in this block
 599               && _cfg._bbs[n->unique_out()->_idx] == b ) {
 600             // All single-use MachSpillCopy(s) that immediately precede their
 601             // use must color early.  If a longer live range steals their
 602             // color, the spill copy will split and may push another spill copy
 603             // further away resulting in an infinite spill-split-retry cycle.
 604             // Assigning a zero area results in a high score() and a good
 605             // location in the simplify list.
 606             //
 607 
 608             Node *single_use = n->unique_out();
 609             assert( b->find_node(single_use) >= j, "Use must be later in block");
 610             // Use can be earlier in block if it is a Phi, but then I should be a MultiDef
 611 
 612             // Find first non SpillCopy 'm' that follows the current instruction
 613             // (j - 1) is index for current instruction 'n'


 686             }
 687             // If 'l' goes completely dry, it must spill.
 688             if( lrg.not_free() ) {
 689               // Give 'l' some kind of reasonable mask, so he picks up
 690               // interferences (and will spill later).
 691               lrg.set_mask( old );
 692               lrg.set_mask_size(old_size);
 693               must_spill++;
 694               lrg._must_spill = 1;
 695               lrg.set_reg(OptoReg::Name(LRG::SPILL_REG));
 696             }
 697           }
 698         } // End of if bound
 699 
 700         // Now interference with everything that is live and has
 701         // compatible register sets.
 702         interfere_with_live(r,&liveout);
 703 
 704       } // End of if normal register-allocated value
 705 
 706       cost -= b->_freq;         // Area remaining in the block
 707       if( cost < 0.0 ) cost = 0.0;  // Cost goes negative in the Phi area

 708 
 709       // Make all inputs live
 710       if( !n->is_Phi() ) {      // Phi function uses come from prior block
 711         JVMState* jvms = n->jvms();
 712         uint debug_start = jvms ? jvms->debug_start() : 999999;
 713         // Start loop at 1 (skip control edge) for most Nodes.
 714         // SCMemProj's might be the sole use of a StoreLConditional.
 715         // While StoreLConditionals set memory (the SCMemProj use)
 716         // they also def flags; if that flag def is unused the
 717         // allocator sees a flag-setting instruction with no use of
 718         // the flags and assumes it's dead.  This keeps the (useless)
 719         // flag-setting behavior alive while also keeping the (useful)
 720         // memory update effect.
 721         for( uint k = ((n->Opcode() == Op_SCMemProj) ? 0:1); k < n->req(); k++ ) {
 722           Node *def = n->in(k);
 723           uint x = n2lidx(def);
 724           if( !x ) continue;
 725           LRG &lrg = lrgs(x);
 726           // No use-side cost for spilling debug info
 727           if( k < debug_start )


 734             lrg._area += cost;
 735             // Adjust register pressure
 736             if( lrg.mask().is_UP() && lrg.mask_size() ) {
 737               if( lrg._is_float ) {
 738                 pressure[1] += lrg.reg_pressure();
 739 #ifdef EXACT_PRESSURE
 740                 if( pressure[1] > b->_freg_pressure )
 741                   b->_freg_pressure = pressure[1];
 742 #endif
 743               } else if( lrg.mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) ) {
 744                 pressure[0] += lrg.reg_pressure();
 745 #ifdef EXACT_PRESSURE
 746                 if( pressure[0] > b->_reg_pressure )
 747                   b->_reg_pressure = pressure[0];
 748 #endif
 749               }
 750             }
 751             assert( pressure[0] == count_int_pressure  (&liveout), "" );
 752             assert( pressure[1] == count_float_pressure(&liveout), "" );
 753           }
 754           assert( lrg._area >= 0, "negative spill area" );
 755         }
 756       }
 757     } // End of reverse pass over all instructions in block
 758 
 759     // If we run off the top of the block with high pressure and
 760     // never see a hi-to-low pressure transition, just record that
 761     // the whole block is high pressure.
 762     if( pressure[0] > (uint)INTPRESSURE   ) {
 763       hrp_index[0] = 0;
 764 #ifdef EXACT_PRESSURE
 765       if( pressure[0] > b->_reg_pressure )
 766         b->_reg_pressure = pressure[0];
 767 #else
 768       b->_reg_pressure = (uint)INTPRESSURE+1;
 769 #endif
 770     }
 771     if( pressure[1] > (uint)FLOATPRESSURE ) {
 772       hrp_index[1] = 0;
 773 #ifdef EXACT_PRESSURE
 774       if( pressure[1] > b->_freg_pressure )




 468   for( uint i = 0; i < _cfg._num_blocks; i++ ) {
 469     Block *b = _cfg._blocks[i];
 470     // Clone (rather than smash in place) the liveout info, so it is alive
 471     // for the "collect_gc_info" phase later.
 472     IndexSet liveout(_live->live(b));
 473     uint last_inst = b->end_idx();
 474     // Compute last phi index
 475     uint last_phi;
 476     for( last_phi = 1; last_phi < last_inst; last_phi++ )
 477       if( !b->_nodes[last_phi]->is_Phi() )
 478         break;
 479 
 480     // Reset block's register pressure values for each ifg construction
 481     uint pressure[2], hrp_index[2];
 482     pressure[0] = pressure[1] = 0;
 483     hrp_index[0] = hrp_index[1] = last_inst+1;
 484     b->_reg_pressure = b->_freg_pressure = 0;
 485     // Liveout things are presumed live for the whole block.  We accumulate
 486     // 'area' accordingly.  If they get killed in the block, we'll subtract
 487     // the unused part of the block from the area.
 488     int inst_count = last_inst - last_phi;
 489     double cost = (inst_count <= 0) ? 0.0 : b->_freq * double(inst_count);
 490     assert(cost >= 0.0, "negative spill cost" );
 491     IndexSetIterator elements(&liveout);
 492     uint lidx;
 493     while ((lidx = elements.next()) != 0) {
 494       LRG &lrg = lrgs(lidx);
 495       lrg._area += cost;
 496       // Compute initial register pressure
 497       if( lrg.mask().is_UP() && lrg.mask_size() ) {
 498         if( lrg._is_float ) {   // Count float pressure
 499           pressure[1] += lrg.reg_pressure();
 500 #ifdef EXACT_PRESSURE
 501           if( pressure[1] > b->_freg_pressure )
 502             b->_freg_pressure = pressure[1];
 503 #endif
 504           // Count int pressure, but do not count the SP, flags
 505         } else if( lrgs(lidx).mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) ) {
 506           pressure[0] += lrg.reg_pressure();
 507 #ifdef EXACT_PRESSURE
 508           if( pressure[0] > b->_reg_pressure )
 509             b->_reg_pressure = pressure[0];
 510 #endif


 574             // Count the float-only registers
 575             RegMask ftmp = lrgs(r).mask();
 576             ftmp.AND(*Matcher::idealreg2regmask[Op_RegD]);
 577             int fregs = ftmp.Size();
 578 #ifdef EXACT_PRESSURE
 579             if( pressure[1]+fregs > b->_freg_pressure )
 580               b->_freg_pressure = pressure[1]+fregs;
 581 #endif
 582             if( pressure[1]       <= (uint)FLOATPRESSURE &&
 583                 pressure[1]+fregs >  (uint)FLOATPRESSURE ) {
 584 #ifndef EXACT_PRESSURE
 585               b->_freg_pressure = (uint)FLOATPRESSURE+1;
 586 #endif
 587               hrp_index[1] = j-1;
 588             }
 589           }
 590 
 591         } else {                // Else it is live
 592           // A DEF also ends 'area' partway through the block.
 593           lrgs(r)._area -= cost;
 594           assert(!(lrgs(r)._area < 0.0), "negative spill area" );
 595 
 596           // Insure high score for immediate-use spill copies so they get a color
 597           if( n->is_SpillCopy()
 598               && lrgs(r).is_singledef()        // MultiDef live range can still split
 599               && n->outcnt() == 1              // and use must be in this block
 600               && _cfg._bbs[n->unique_out()->_idx] == b ) {
 601             // All single-use MachSpillCopy(s) that immediately precede their
 602             // use must color early.  If a longer live range steals their
 603             // color, the spill copy will split and may push another spill copy
 604             // further away resulting in an infinite spill-split-retry cycle.
 605             // Assigning a zero area results in a high score() and a good
 606             // location in the simplify list.
 607             //
 608 
 609             Node *single_use = n->unique_out();
 610             assert( b->find_node(single_use) >= j, "Use must be later in block");
 611             // Use can be earlier in block if it is a Phi, but then I should be a MultiDef
 612 
 613             // Find first non SpillCopy 'm' that follows the current instruction
 614             // (j - 1) is index for current instruction 'n'


 687             }
 688             // If 'l' goes completely dry, it must spill.
 689             if( lrg.not_free() ) {
 690               // Give 'l' some kind of reasonable mask, so he picks up
 691               // interferences (and will spill later).
 692               lrg.set_mask( old );
 693               lrg.set_mask_size(old_size);
 694               must_spill++;
 695               lrg._must_spill = 1;
 696               lrg.set_reg(OptoReg::Name(LRG::SPILL_REG));
 697             }
 698           }
 699         } // End of if bound
 700 
 701         // Now interference with everything that is live and has
 702         // compatible register sets.
 703         interfere_with_live(r,&liveout);
 704 
 705       } // End of if normal register-allocated value
 706 
 707       // Area remaining in the block
 708       inst_count--;
 709       cost = (inst_count <= 0) ? 0.0 : b->_freq * double(inst_count);
 710 
 711       // Make all inputs live
 712       if( !n->is_Phi() ) {      // Phi function uses come from prior block
 713         JVMState* jvms = n->jvms();
 714         uint debug_start = jvms ? jvms->debug_start() : 999999;
 715         // Start loop at 1 (skip control edge) for most Nodes.
 716         // SCMemProj's might be the sole use of a StoreLConditional.
 717         // While StoreLConditionals set memory (the SCMemProj use)
 718         // they also def flags; if that flag def is unused the
 719         // allocator sees a flag-setting instruction with no use of
 720         // the flags and assumes it's dead.  This keeps the (useless)
 721         // flag-setting behavior alive while also keeping the (useful)
 722         // memory update effect.
 723         for( uint k = ((n->Opcode() == Op_SCMemProj) ? 0:1); k < n->req(); k++ ) {
 724           Node *def = n->in(k);
 725           uint x = n2lidx(def);
 726           if( !x ) continue;
 727           LRG &lrg = lrgs(x);
 728           // No use-side cost for spilling debug info
 729           if( k < debug_start )


 736             lrg._area += cost;
 737             // Adjust register pressure
 738             if( lrg.mask().is_UP() && lrg.mask_size() ) {
 739               if( lrg._is_float ) {
 740                 pressure[1] += lrg.reg_pressure();
 741 #ifdef EXACT_PRESSURE
 742                 if( pressure[1] > b->_freg_pressure )
 743                   b->_freg_pressure = pressure[1];
 744 #endif
 745               } else if( lrg.mask().overlap(*Matcher::idealreg2regmask[Op_RegI]) ) {
 746                 pressure[0] += lrg.reg_pressure();
 747 #ifdef EXACT_PRESSURE
 748                 if( pressure[0] > b->_reg_pressure )
 749                   b->_reg_pressure = pressure[0];
 750 #endif
 751               }
 752             }
 753             assert( pressure[0] == count_int_pressure  (&liveout), "" );
 754             assert( pressure[1] == count_float_pressure(&liveout), "" );
 755           }
 756           assert(!(lrg._area < 0.0), "negative spill area" );
 757         }
 758       }
 759     } // End of reverse pass over all instructions in block
 760 
 761     // If we run off the top of the block with high pressure and
 762     // never see a hi-to-low pressure transition, just record that
 763     // the whole block is high pressure.
 764     if( pressure[0] > (uint)INTPRESSURE   ) {
 765       hrp_index[0] = 0;
 766 #ifdef EXACT_PRESSURE
 767       if( pressure[0] > b->_reg_pressure )
 768         b->_reg_pressure = pressure[0];
 769 #else
 770       b->_reg_pressure = (uint)INTPRESSURE+1;
 771 #endif
 772     }
 773     if( pressure[1] > (uint)FLOATPRESSURE ) {
 774       hrp_index[1] = 0;
 775 #ifdef EXACT_PRESSURE
 776       if( pressure[1] > b->_freg_pressure )