1 /*
2 * Copyright 1998-2007 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 #include "incls/_precompiled.incl"
26 #include "incls/_output.cpp.incl"
27
28 extern uint size_java_to_interp();
29 extern uint reloc_java_to_interp();
30 extern uint size_exception_handler();
31 extern uint size_deopt_handler();
32
33 #ifndef PRODUCT
34 #define DEBUG_ARG(x) , x
35 #else
36 #define DEBUG_ARG(x)
37 #endif
38
39 extern int emit_exception_handler(CodeBuffer &cbuf);
40 extern int emit_deopt_handler(CodeBuffer &cbuf);
41
42 //------------------------------Output-----------------------------------------
43 // Convert Nodes to instruction bits and pass off to the VM
44 void Compile::Output() {
45 // RootNode goes
46 assert( _cfg->_broot->_nodes.size() == 0, "" );
47
48 // Initialize the space for the BufferBlob used to find and verify
49 // instruction size in MachNode::emit_size()
50 init_scratch_buffer_blob();
51 if (failing()) return; // Out of memory
52
53 // Make sure I can find the Start Node
54 Block_Array& bbs = _cfg->_bbs;
55 Block *entry = _cfg->_blocks[1];
56 Block *broot = _cfg->_broot;
57
58 const StartNode *start = entry->_nodes[0]->as_Start();
59
60 // Replace StartNode with prolog
61 MachPrologNode *prolog = new (this) MachPrologNode();
62 entry->_nodes.map( 0, prolog );
63 bbs.map( prolog->_idx, entry );
64 bbs.map( start->_idx, NULL ); // start is no longer in any block
65
66 // Virtual methods need an unverified entry point
67
68 if( is_osr_compilation() ) {
69 if( PoisonOSREntry ) {
70 // TODO: Should use a ShouldNotReachHereNode...
71 _cfg->insert( broot, 0, new (this) MachBreakpointNode() );
72 }
73 } else {
74 if( _method && !_method->flags().is_static() ) {
75 // Insert unvalidated entry point
76 _cfg->insert( broot, 0, new (this) MachUEPNode() );
77 }
78
79 }
80
81
82 // Break before main entry point
83 if( (_method && _method->break_at_execute())
84 #ifndef PRODUCT
85 ||(OptoBreakpoint && is_method_compilation())
86 ||(OptoBreakpointOSR && is_osr_compilation())
87 ||(OptoBreakpointC2R && !_method)
88 #endif
89 ) {
90 // checking for _method means that OptoBreakpoint does not apply to
91 // runtime stubs or frame converters
92 _cfg->insert( entry, 1, new (this) MachBreakpointNode() );
93 }
94
95 // Insert epilogs before every return
96 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
97 Block *b = _cfg->_blocks[i];
98 if( !b->is_connector() && b->non_connector_successor(0) == _cfg->_broot ) { // Found a program exit point?
99 Node *m = b->end();
100 if( m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt ) {
101 MachEpilogNode *epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
102 b->add_inst( epilog );
103 bbs.map(epilog->_idx, b);
104 //_regalloc->set_bad(epilog->_idx); // Already initialized this way.
105 }
106 }
107 }
108
109 # ifdef ENABLE_ZAP_DEAD_LOCALS
110 if ( ZapDeadCompiledLocals ) Insert_zap_nodes();
111 # endif
112
113 ScheduleAndBundle();
114
115 #ifndef PRODUCT
116 if (trace_opto_output()) {
117 tty->print("\n---- After ScheduleAndBundle ----\n");
118 for (uint i = 0; i < _cfg->_num_blocks; i++) {
119 tty->print("\nBB#%03d:\n", i);
120 Block *bb = _cfg->_blocks[i];
121 for (uint j = 0; j < bb->_nodes.size(); j++) {
122 Node *n = bb->_nodes[j];
123 OptoReg::Name reg = _regalloc->get_reg_first(n);
124 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
125 n->dump();
126 }
127 }
128 }
129 #endif
130
131 if (failing()) return;
132
133 BuildOopMaps();
134
135 if (failing()) return;
136
137 Fill_buffer();
138 }
139
140 bool Compile::need_stack_bang(int frame_size_in_bytes) const {
141 // Determine if we need to generate a stack overflow check.
142 // Do it if the method is not a stub function and
143 // has java calls or has frame size > vm_page_size/8.
144 return (stub_function() == NULL &&
145 (has_java_calls() || frame_size_in_bytes > os::vm_page_size()>>3));
146 }
147
148 bool Compile::need_register_stack_bang() const {
149 // Determine if we need to generate a register stack overflow check.
150 // This is only used on architectures which have split register
151 // and memory stacks (ie. IA64).
152 // Bang if the method is not a stub function and has java calls
153 return (stub_function() == NULL && has_java_calls());
154 }
155
156 # ifdef ENABLE_ZAP_DEAD_LOCALS
157
158
159 // In order to catch compiler oop-map bugs, we have implemented
160 // a debugging mode called ZapDeadCompilerLocals.
161 // This mode causes the compiler to insert a call to a runtime routine,
162 // "zap_dead_locals", right before each place in compiled code
163 // that could potentially be a gc-point (i.e., a safepoint or oop map point).
164 // The runtime routine checks that locations mapped as oops are really
165 // oops, that locations mapped as values do not look like oops,
166 // and that locations mapped as dead are not used later
167 // (by zapping them to an invalid address).
168
169 int Compile::_CompiledZap_count = 0;
170
171 void Compile::Insert_zap_nodes() {
172 bool skip = false;
173
174
175 // Dink with static counts because code code without the extra
176 // runtime calls is MUCH faster for debugging purposes
177
178 if ( CompileZapFirst == 0 ) ; // nothing special
179 else if ( CompileZapFirst > CompiledZap_count() ) skip = true;
180 else if ( CompileZapFirst == CompiledZap_count() )
181 warning("starting zap compilation after skipping");
182
183 if ( CompileZapLast == -1 ) ; // nothing special
184 else if ( CompileZapLast < CompiledZap_count() ) skip = true;
185 else if ( CompileZapLast == CompiledZap_count() )
186 warning("about to compile last zap");
187
188 ++_CompiledZap_count; // counts skipped zaps, too
189
190 if ( skip ) return;
191
192
193 if ( _method == NULL )
194 return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care
195
196 // Insert call to zap runtime stub before every node with an oop map
197 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
198 Block *b = _cfg->_blocks[i];
199 for ( uint j = 0; j < b->_nodes.size(); ++j ) {
200 Node *n = b->_nodes[j];
201
202 // Determining if we should insert a zap-a-lot node in output.
203 // We do that for all nodes that has oopmap info, except for calls
204 // to allocation. Calls to allocation passes in the old top-of-eden pointer
205 // and expect the C code to reset it. Hence, there can be no safepoints between
206 // the inlined-allocation and the call to new_Java, etc.
207 // We also cannot zap monitor calls, as they must hold the microlock
208 // during the call to Zap, which also wants to grab the microlock.
209 bool insert = n->is_MachSafePoint() && (n->as_MachSafePoint()->oop_map() != NULL);
210 if ( insert ) { // it is MachSafePoint
211 if ( !n->is_MachCall() ) {
212 insert = false;
213 } else if ( n->is_MachCall() ) {
214 MachCallNode* call = n->as_MachCall();
215 if (call->entry_point() == OptoRuntime::new_instance_Java() ||
216 call->entry_point() == OptoRuntime::new_array_Java() ||
217 call->entry_point() == OptoRuntime::multianewarray2_Java() ||
218 call->entry_point() == OptoRuntime::multianewarray3_Java() ||
219 call->entry_point() == OptoRuntime::multianewarray4_Java() ||
220 call->entry_point() == OptoRuntime::multianewarray5_Java() ||
221 call->entry_point() == OptoRuntime::slow_arraycopy_Java() ||
222 call->entry_point() == OptoRuntime::complete_monitor_locking_Java()
223 ) {
224 insert = false;
225 }
226 }
227 if (insert) {
228 Node *zap = call_zap_node(n->as_MachSafePoint(), i);
229 b->_nodes.insert( j, zap );
230 _cfg->_bbs.map( zap->_idx, b );
231 ++j;
232 }
233 }
234 }
235 }
236 }
237
238
239 Node* Compile::call_zap_node(MachSafePointNode* node_to_check, int block_no) {
240 const TypeFunc *tf = OptoRuntime::zap_dead_locals_Type();
241 CallStaticJavaNode* ideal_node =
242 new (this, tf->domain()->cnt()) CallStaticJavaNode( tf,
243 OptoRuntime::zap_dead_locals_stub(_method->flags().is_native()),
244 "call zap dead locals stub", 0, TypePtr::BOTTOM);
245 // We need to copy the OopMap from the site we're zapping at.
246 // We have to make a copy, because the zap site might not be
247 // a call site, and zap_dead is a call site.
248 OopMap* clone = node_to_check->oop_map()->deep_copy();
249
250 // Add the cloned OopMap to the zap node
251 ideal_node->set_oop_map(clone);
252 return _matcher->match_sfpt(ideal_node);
253 }
254
255 //------------------------------is_node_getting_a_safepoint--------------------
256 bool Compile::is_node_getting_a_safepoint( Node* n) {
257 // This code duplicates the logic prior to the call of add_safepoint
258 // below in this file.
259 if( n->is_MachSafePoint() ) return true;
260 return false;
261 }
262
263 # endif // ENABLE_ZAP_DEAD_LOCALS
264
265 //------------------------------compute_loop_first_inst_sizes------------------
266 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
267 // of a loop. When aligning a loop we need to provide enough instructions
268 // in cpu's fetch buffer to feed decoders. The loop alignment could be
269 // avoided if we have enough instructions in fetch buffer at the head of a loop.
270 // By default, the size is set to 999999 by Block's constructor so that
271 // a loop will be aligned if the size is not reset here.
272 //
273 // Note: Mach instructions could contain several HW instructions
274 // so the size is estimated only.
275 //
276 void Compile::compute_loop_first_inst_sizes() {
277 // The next condition is used to gate the loop alignment optimization.
278 // Don't aligned a loop if there are enough instructions at the head of a loop
279 // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad
280 // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is
281 // equal to 11 bytes which is the largest address NOP instruction.
282 if( MaxLoopPad < OptoLoopAlignment-1 ) {
283 uint last_block = _cfg->_num_blocks-1;
284 for( uint i=1; i <= last_block; i++ ) {
285 Block *b = _cfg->_blocks[i];
286 // Check the first loop's block which requires an alignment.
287 if( b->head()->is_Loop() &&
288 b->code_alignment() > (uint)relocInfo::addr_unit() ) {
289 uint sum_size = 0;
290 uint inst_cnt = NumberOfLoopInstrToAlign;
291 inst_cnt = b->compute_first_inst_size(sum_size, inst_cnt,
292 _regalloc);
293 // Check the next fallthrough block if first loop's block does not have
294 // enough instructions.
295 if( inst_cnt > 0 && i < last_block ) {
296 // First, check if the first loop's block contains whole loop.
297 // LoopNode::LoopBackControl == 2.
298 Block *bx = _cfg->_bbs[b->pred(2)->_idx];
299 // Skip connector blocks (with limit in case of irreducible loops).
300 int search_limit = 16;
301 while( bx->is_connector() && search_limit-- > 0) {
302 bx = _cfg->_bbs[bx->pred(1)->_idx];
303 }
304 if( bx != b ) { // loop body is in several blocks.
305 Block *nb = NULL;
306 while( inst_cnt > 0 && i < last_block && nb != bx &&
307 !_cfg->_blocks[i+1]->head()->is_Loop() ) {
308 i++;
309 nb = _cfg->_blocks[i];
310 inst_cnt = nb->compute_first_inst_size(sum_size, inst_cnt,
311 _regalloc);
312 } // while( inst_cnt > 0 && i < last_block )
313 } // if( bx != b )
314 } // if( inst_cnt > 0 && i < last_block )
315 b->set_first_inst_size(sum_size);
316 } // f( b->head()->is_Loop() )
317 } // for( i <= last_block )
318 } // if( MaxLoopPad < OptoLoopAlignment-1 )
319 }
320
321 //----------------------Shorten_branches---------------------------------------
322 // The architecture description provides short branch variants for some long
323 // branch instructions. Replace eligible long branches with short branches.
324 void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, int& stub_size, int& const_size) {
325
326 // fill in the nop array for bundling computations
327 MachNode *_nop_list[Bundle::_nop_count];
328 Bundle::initialize_nops(_nop_list, this);
329
330 // ------------------
331 // Compute size of each block, method size, and relocation information size
332 uint *jmp_end = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks);
333 uint *blk_starts = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks+1);
334 DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
335 blk_starts[0] = 0;
336
337 // Initialize the sizes to 0
338 code_size = 0; // Size in bytes of generated code
339 stub_size = 0; // Size in bytes of all stub entries
340 // Size in bytes of all relocation entries, including those in local stubs.
341 // Start with 2-bytes of reloc info for the unvalidated entry point
342 reloc_size = 1; // Number of relocation entries
343 const_size = 0; // size of fp constants in words
344
345 // Make three passes. The first computes pessimistic blk_starts,
346 // relative jmp_end, reloc_size and const_size information.
347 // The second performs short branch substitution using the pessimistic
348 // sizing. The third inserts nops where needed.
349
350 Node *nj; // tmp
351
352 // Step one, perform a pessimistic sizing pass.
353 uint i;
354 uint min_offset_from_last_call = 1; // init to a positive value
355 uint nop_size = (new (this) MachNopNode())->size(_regalloc);
356 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
357 Block *b = _cfg->_blocks[i];
358
359 // Sum all instruction sizes to compute block size
360 uint last_inst = b->_nodes.size();
361 uint blk_size = 0;
362 for( uint j = 0; j<last_inst; j++ ) {
363 nj = b->_nodes[j];
364 uint inst_size = nj->size(_regalloc);
365 blk_size += inst_size;
366 // Handle machine instruction nodes
367 if( nj->is_Mach() ) {
368 MachNode *mach = nj->as_Mach();
369 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding
370 reloc_size += mach->reloc();
371 const_size += mach->const_size();
372 if( mach->is_MachCall() ) {
373 MachCallNode *mcall = mach->as_MachCall();
374 // This destination address is NOT PC-relative
375
376 mcall->method_set((intptr_t)mcall->entry_point());
377
378 if( mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method ) {
379 stub_size += size_java_to_interp();
380 reloc_size += reloc_java_to_interp();
381 }
382 } else if (mach->is_MachSafePoint()) {
383 // If call/safepoint are adjacent, account for possible
384 // nop to disambiguate the two safepoints.
385 if (min_offset_from_last_call == 0) {
386 blk_size += nop_size;
387 }
388 }
389 }
390 min_offset_from_last_call += inst_size;
391 // Remember end of call offset
392 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
393 min_offset_from_last_call = 0;
394 }
395 }
396
397 // During short branch replacement, we store the relative (to blk_starts)
398 // end of jump in jmp_end, rather than the absolute end of jump. This
399 // is so that we do not need to recompute sizes of all nodes when we compute
400 // correct blk_starts in our next sizing pass.
401 jmp_end[i] = blk_size;
402 DEBUG_ONLY( jmp_target[i] = 0; )
403
404 // When the next block starts a loop, we may insert pad NOP
405 // instructions. Since we cannot know our future alignment,
406 // assume the worst.
407 if( i<_cfg->_num_blocks-1 ) {
408 Block *nb = _cfg->_blocks[i+1];
409 int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit();
410 if( max_loop_pad > 0 ) {
411 assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), "");
412 blk_size += max_loop_pad;
413 }
414 }
415
416 // Save block size; update total method size
417 blk_starts[i+1] = blk_starts[i]+blk_size;
418 }
419
420 // Step two, replace eligible long jumps.
421
422 // Note: this will only get the long branches within short branch
423 // range. Another pass might detect more branches that became
424 // candidates because the shortening in the first pass exposed
425 // more opportunities. Unfortunately, this would require
426 // recomputing the starting and ending positions for the blocks
427 for( i=0; i<_cfg->_num_blocks; i++ ) {
428 Block *b = _cfg->_blocks[i];
429
430 int j;
431 // Find the branch; ignore trailing NOPs.
432 for( j = b->_nodes.size()-1; j>=0; j-- ) {
433 nj = b->_nodes[j];
434 if( !nj->is_Mach() || nj->as_Mach()->ideal_Opcode() != Op_Con )
435 break;
436 }
437
438 if (j >= 0) {
439 if( nj->is_Mach() && nj->as_Mach()->may_be_short_branch() ) {
440 MachNode *mach = nj->as_Mach();
441 // This requires the TRUE branch target be in succs[0]
442 uint bnum = b->non_connector_successor(0)->_pre_order;
443 uintptr_t target = blk_starts[bnum];
444 if( mach->is_pc_relative() ) {
445 int offset = target-(blk_starts[i] + jmp_end[i]);
446 if (_matcher->is_short_branch_offset(offset)) {
447 // We've got a winner. Replace this branch.
448 MachNode *replacement = mach->short_branch_version(this);
449 b->_nodes.map(j, replacement);
450 mach->subsume_by(replacement);
451
452 // Update the jmp_end size to save time in our
453 // next pass.
454 jmp_end[i] -= (mach->size(_regalloc) - replacement->size(_regalloc));
455 DEBUG_ONLY( jmp_target[i] = bnum; );
456 }
457 } else {
458 #ifndef PRODUCT
459 mach->dump(3);
460 #endif
461 Unimplemented();
462 }
463 }
464 }
465 }
466
467 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
468 // of a loop. It is used to determine the padding for loop alignment.
469 compute_loop_first_inst_sizes();
470
471 // Step 3, compute the offsets of all the labels
472 uint last_call_adr = max_uint;
473 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
474 // copy the offset of the beginning to the corresponding label
475 assert(labels[i].is_unused(), "cannot patch at this point");
476 labels[i].bind_loc(blk_starts[i], CodeBuffer::SECT_INSTS);
477
478 // insert padding for any instructions that need it
479 Block *b = _cfg->_blocks[i];
480 uint last_inst = b->_nodes.size();
481 uint adr = blk_starts[i];
482 for( uint j = 0; j<last_inst; j++ ) {
483 nj = b->_nodes[j];
484 if( nj->is_Mach() ) {
485 int padding = nj->as_Mach()->compute_padding(adr);
486 // If call/safepoint are adjacent insert a nop (5010568)
487 if (padding == 0 && nj->is_MachSafePoint() && !nj->is_MachCall() &&
488 adr == last_call_adr ) {
489 padding = nop_size;
490 }
491 if(padding > 0) {
492 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
493 int nops_cnt = padding / nop_size;
494 MachNode *nop = new (this) MachNopNode(nops_cnt);
495 b->_nodes.insert(j++, nop);
496 _cfg->_bbs.map( nop->_idx, b );
497 adr += padding;
498 last_inst++;
499 }
500 }
501 adr += nj->size(_regalloc);
502
503 // Remember end of call offset
504 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
505 last_call_adr = adr;
506 }
507 }
508
509 if ( i != _cfg->_num_blocks-1) {
510 // Get the size of the block
511 uint blk_size = adr - blk_starts[i];
512
513 // When the next block starts a loop, we may insert pad NOP
514 // instructions.
515 Block *nb = _cfg->_blocks[i+1];
516 int current_offset = blk_starts[i] + blk_size;
517 current_offset += nb->alignment_padding(current_offset);
518 // Save block size; update total method size
519 blk_starts[i+1] = current_offset;
520 }
521 }
522
523 #ifdef ASSERT
524 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
525 if( jmp_target[i] != 0 ) {
526 int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_end[i]);
527 if (!_matcher->is_short_branch_offset(offset)) {
528 tty->print_cr("target (%d) - jmp_end(%d) = offset (%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_end[i], offset, i, jmp_target[i]);
529 }
530 assert(_matcher->is_short_branch_offset(offset), "Displacement too large for short jmp");
531 }
532 }
533 #endif
534
535 // ------------------
536 // Compute size for code buffer
537 code_size = blk_starts[i-1] + jmp_end[i-1];
538
539 // Relocation records
540 reloc_size += 1; // Relo entry for exception handler
541
542 // Adjust reloc_size to number of record of relocation info
543 // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for
544 // a relocation index.
545 // The CodeBuffer will expand the locs array if this estimate is too low.
546 reloc_size *= 10 / sizeof(relocInfo);
547
548 // Adjust const_size to number of bytes
549 const_size *= 2*jintSize; // both float and double take two words per entry
550
551 }
552
553 //------------------------------FillLocArray-----------------------------------
554 // Create a bit of debug info and append it to the array. The mapping is from
555 // Java local or expression stack to constant, register or stack-slot. For
556 // doubles, insert 2 mappings and return 1 (to tell the caller that the next
557 // entry has been taken care of and caller should skip it).
558 static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) {
559 // This should never have accepted Bad before
560 assert(OptoReg::is_valid(regnum), "location must be valid");
561 return (OptoReg::is_reg(regnum))
562 ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) )
563 : new LocationValue(Location::new_stk_loc(l_type, ra->reg2offset(regnum)));
564 }
565
566
567 ObjectValue*
568 Compile::sv_for_node_id(GrowableArray<ScopeValue*> *objs, int id) {
569 for (int i = 0; i < objs->length(); i++) {
570 assert(objs->at(i)->is_object(), "corrupt object cache");
571 ObjectValue* sv = (ObjectValue*) objs->at(i);
572 if (sv->id() == id) {
573 return sv;
574 }
575 }
576 // Otherwise..
577 return NULL;
578 }
579
580 void Compile::set_sv_for_object_node(GrowableArray<ScopeValue*> *objs,
581 ObjectValue* sv ) {
582 assert(sv_for_node_id(objs, sv->id()) == NULL, "Precondition");
583 objs->append(sv);
584 }
585
586
587 void Compile::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local,
588 GrowableArray<ScopeValue*> *array,
589 GrowableArray<ScopeValue*> *objs ) {
590 assert( local, "use _top instead of null" );
591 if (array->length() != idx) {
592 assert(array->length() == idx + 1, "Unexpected array count");
593 // Old functionality:
594 // return
595 // New functionality:
596 // Assert if the local is not top. In product mode let the new node
597 // override the old entry.
598 assert(local == top(), "LocArray collision");
599 if (local == top()) {
600 return;
601 }
602 array->pop();
603 }
604 const Type *t = local->bottom_type();
605
606 // Is it a safepoint scalar object node?
607 if (local->is_SafePointScalarObject()) {
608 SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject();
609
610 ObjectValue* sv = Compile::sv_for_node_id(objs, spobj->_idx);
611 if (sv == NULL) {
612 ciKlass* cik = t->is_oopptr()->klass();
613 assert(cik->is_instance_klass() ||
614 cik->is_array_klass(), "Not supported allocation.");
615 sv = new ObjectValue(spobj->_idx,
616 new ConstantOopWriteValue(cik->encoding()));
617 Compile::set_sv_for_object_node(objs, sv);
618
619 uint first_ind = spobj->first_index();
620 for (uint i = 0; i < spobj->n_fields(); i++) {
621 Node* fld_node = sfpt->in(first_ind+i);
622 (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs);
623 }
624 }
625 array->append(sv);
626 return;
627 }
628
629 // Grab the register number for the local
630 OptoReg::Name regnum = _regalloc->get_reg_first(local);
631 if( OptoReg::is_valid(regnum) ) {// Got a register/stack?
632 // Record the double as two float registers.
633 // The register mask for such a value always specifies two adjacent
634 // float registers, with the lower register number even.
635 // Normally, the allocation of high and low words to these registers
636 // is irrelevant, because nearly all operations on register pairs
637 // (e.g., StoreD) treat them as a single unit.
638 // Here, we assume in addition that the words in these two registers
639 // stored "naturally" (by operations like StoreD and double stores
640 // within the interpreter) such that the lower-numbered register
641 // is written to the lower memory address. This may seem like
642 // a machine dependency, but it is not--it is a requirement on
643 // the author of the <arch>.ad file to ensure that, for every
644 // even/odd double-register pair to which a double may be allocated,
645 // the word in the even single-register is stored to the first
646 // memory word. (Note that register numbers are completely
647 // arbitrary, and are not tied to any machine-level encodings.)
648 #ifdef _LP64
649 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) {
650 array->append(new ConstantIntValue(0));
651 array->append(new_loc_value( _regalloc, regnum, Location::dbl ));
652 } else if ( t->base() == Type::Long ) {
653 array->append(new ConstantIntValue(0));
654 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
655 } else if ( t->base() == Type::RawPtr ) {
656 // jsr/ret return address which must be restored into a the full
657 // width 64-bit stack slot.
658 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
659 }
660 #else //_LP64
661 #ifdef SPARC
662 if (t->base() == Type::Long && OptoReg::is_reg(regnum)) {
663 // For SPARC we have to swap high and low words for
664 // long values stored in a single-register (g0-g7).
665 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
666 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
667 } else
668 #endif //SPARC
669 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) {
670 // Repack the double/long as two jints.
671 // The convention the interpreter uses is that the second local
672 // holds the first raw word of the native double representation.
673 // This is actually reasonable, since locals and stack arrays
674 // grow downwards in all implementations.
675 // (If, on some machine, the interpreter's Java locals or stack
676 // were to grow upwards, the embedded doubles would be word-swapped.)
677 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
678 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
679 }
680 #endif //_LP64
681 else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) &&
682 OptoReg::is_reg(regnum) ) {
683 array->append(new_loc_value( _regalloc, regnum, Matcher::float_in_double
684 ? Location::float_in_dbl : Location::normal ));
685 } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) {
686 array->append(new_loc_value( _regalloc, regnum, Matcher::int_in_long
687 ? Location::int_in_long : Location::normal ));
688 } else {
689 array->append(new_loc_value( _regalloc, regnum, _regalloc->is_oop(local) ? Location::oop : Location::normal ));
690 }
691 return;
692 }
693
694 // No register. It must be constant data.
695 switch (t->base()) {
696 case Type::Half: // Second half of a double
697 ShouldNotReachHere(); // Caller should skip 2nd halves
698 break;
699 case Type::AnyPtr:
700 array->append(new ConstantOopWriteValue(NULL));
701 break;
702 case Type::AryPtr:
703 case Type::InstPtr:
704 case Type::KlassPtr: // fall through
705 array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->encoding()));
706 break;
707 case Type::Int:
708 array->append(new ConstantIntValue(t->is_int()->get_con()));
709 break;
710 case Type::RawPtr:
711 // A return address (T_ADDRESS).
712 assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI");
713 #ifdef _LP64
714 // Must be restored to the full-width 64-bit stack slot.
715 array->append(new ConstantLongValue(t->is_ptr()->get_con()));
716 #else
717 array->append(new ConstantIntValue(t->is_ptr()->get_con()));
718 #endif
719 break;
720 case Type::FloatCon: {
721 float f = t->is_float_constant()->getf();
722 array->append(new ConstantIntValue(jint_cast(f)));
723 break;
724 }
725 case Type::DoubleCon: {
726 jdouble d = t->is_double_constant()->getd();
727 #ifdef _LP64
728 array->append(new ConstantIntValue(0));
729 array->append(new ConstantDoubleValue(d));
730 #else
731 // Repack the double as two jints.
732 // The convention the interpreter uses is that the second local
733 // holds the first raw word of the native double representation.
734 // This is actually reasonable, since locals and stack arrays
735 // grow downwards in all implementations.
736 // (If, on some machine, the interpreter's Java locals or stack
737 // were to grow upwards, the embedded doubles would be word-swapped.)
738 jint *dp = (jint*)&d;
739 array->append(new ConstantIntValue(dp[1]));
740 array->append(new ConstantIntValue(dp[0]));
741 #endif
742 break;
743 }
744 case Type::Long: {
745 jlong d = t->is_long()->get_con();
746 #ifdef _LP64
747 array->append(new ConstantIntValue(0));
748 array->append(new ConstantLongValue(d));
749 #else
750 // Repack the long as two jints.
751 // The convention the interpreter uses is that the second local
752 // holds the first raw word of the native double representation.
753 // This is actually reasonable, since locals and stack arrays
754 // grow downwards in all implementations.
755 // (If, on some machine, the interpreter's Java locals or stack
756 // were to grow upwards, the embedded doubles would be word-swapped.)
757 jint *dp = (jint*)&d;
758 array->append(new ConstantIntValue(dp[1]));
759 array->append(new ConstantIntValue(dp[0]));
760 #endif
761 break;
762 }
763 case Type::Top: // Add an illegal value here
764 array->append(new LocationValue(Location()));
765 break;
766 default:
767 ShouldNotReachHere();
768 break;
769 }
770 }
771
772 // Determine if this node starts a bundle
773 bool Compile::starts_bundle(const Node *n) const {
774 return (_node_bundling_limit > n->_idx &&
775 _node_bundling_base[n->_idx].starts_bundle());
776 }
777
778 //--------------------------Process_OopMap_Node--------------------------------
779 void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) {
780
781 // Handle special safepoint nodes for synchronization
782 MachSafePointNode *sfn = mach->as_MachSafePoint();
783 MachCallNode *mcall;
784
785 #ifdef ENABLE_ZAP_DEAD_LOCALS
786 assert( is_node_getting_a_safepoint(mach), "logic does not match; false negative");
787 #endif
788
789 int safepoint_pc_offset = current_offset;
790
791 // Add the safepoint in the DebugInfoRecorder
792 if( !mach->is_MachCall() ) {
793 mcall = NULL;
794 debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map);
795 } else {
796 mcall = mach->as_MachCall();
797 safepoint_pc_offset += mcall->ret_addr_offset();
798 debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map);
799 }
800
801 // Loop over the JVMState list to add scope information
802 // Do not skip safepoints with a NULL method, they need monitor info
803 JVMState* youngest_jvms = sfn->jvms();
804 int max_depth = youngest_jvms->depth();
805
806 // Allocate the object pool for scalar-replaced objects -- the map from
807 // small-integer keys (which can be recorded in the local and ostack
808 // arrays) to descriptions of the object state.
809 GrowableArray<ScopeValue*> *objs = new GrowableArray<ScopeValue*>();
810
811 // Visit scopes from oldest to youngest.
812 for (int depth = 1; depth <= max_depth; depth++) {
813 JVMState* jvms = youngest_jvms->of_depth(depth);
814 int idx;
815 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
816 // Safepoints that do not have method() set only provide oop-map and monitor info
817 // to support GC; these do not support deoptimization.
818 int num_locs = (method == NULL) ? 0 : jvms->loc_size();
819 int num_exps = (method == NULL) ? 0 : jvms->stk_size();
820 int num_mon = jvms->nof_monitors();
821 assert(method == NULL || jvms->bci() < 0 || num_locs == method->max_locals(),
822 "JVMS local count must match that of the method");
823
824 // Add Local and Expression Stack Information
825
826 // Insert locals into the locarray
827 GrowableArray<ScopeValue*> *locarray = new GrowableArray<ScopeValue*>(num_locs);
828 for( idx = 0; idx < num_locs; idx++ ) {
829 FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs );
830 }
831
832 // Insert expression stack entries into the exparray
833 GrowableArray<ScopeValue*> *exparray = new GrowableArray<ScopeValue*>(num_exps);
834 for( idx = 0; idx < num_exps; idx++ ) {
835 FillLocArray( idx, sfn, sfn->stack(jvms, idx), exparray, objs );
836 }
837
838 // Add in mappings of the monitors
839 assert( !method ||
840 !method->is_synchronized() ||
841 method->is_native() ||
842 num_mon > 0 ||
843 !GenerateSynchronizationCode,
844 "monitors must always exist for synchronized methods");
845
846 // Build the growable array of ScopeValues for exp stack
847 GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon);
848
849 // Loop over monitors and insert into array
850 for(idx = 0; idx < num_mon; idx++) {
851 // Grab the node that defines this monitor
852 Node* box_node;
853 Node* obj_node;
854 box_node = sfn->monitor_box(jvms, idx);
855 obj_node = sfn->monitor_obj(jvms, idx);
856
857 // Create ScopeValue for object
858 ScopeValue *scval = NULL;
859
860 if( obj_node->is_SafePointScalarObject() ) {
861 SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject();
862 scval = Compile::sv_for_node_id(objs, spobj->_idx);
863 if (scval == NULL) {
864 const Type *t = obj_node->bottom_type();
865 ciKlass* cik = t->is_oopptr()->klass();
866 assert(cik->is_instance_klass() ||
867 cik->is_array_klass(), "Not supported allocation.");
868 ObjectValue* sv = new ObjectValue(spobj->_idx,
869 new ConstantOopWriteValue(cik->encoding()));
870 Compile::set_sv_for_object_node(objs, sv);
871
872 uint first_ind = spobj->first_index();
873 for (uint i = 0; i < spobj->n_fields(); i++) {
874 Node* fld_node = sfn->in(first_ind+i);
875 (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs);
876 }
877 scval = sv;
878 }
879 } else if( !obj_node->is_Con() ) {
880 OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node);
881 scval = new_loc_value( _regalloc, obj_reg, Location::oop );
882 } else {
883 scval = new ConstantOopWriteValue(obj_node->bottom_type()->is_instptr()->const_oop()->encoding());
884 }
885
886 OptoReg::Name box_reg = BoxLockNode::stack_slot(box_node);
887 Location basic_lock = Location::new_stk_loc(Location::normal,_regalloc->reg2offset(box_reg));
888 monarray->append(new MonitorValue(scval, basic_lock, box_node->as_BoxLock()->is_eliminated()));
889 }
890
891 // We dump the object pool first, since deoptimization reads it in first.
892 debug_info()->dump_object_pool(objs);
893
894 // Build first class objects to pass to scope
895 DebugToken *locvals = debug_info()->create_scope_values(locarray);
896 DebugToken *expvals = debug_info()->create_scope_values(exparray);
897 DebugToken *monvals = debug_info()->create_monitor_values(monarray);
898
899 // Make method available for all Safepoints
900 ciMethod* scope_method = method ? method : _method;
901 // Describe the scope here
902 assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI");
903 // Now we can describe the scope.
904 debug_info()->describe_scope(safepoint_pc_offset,scope_method,jvms->bci(),locvals,expvals,monvals);
905 } // End jvms loop
906
907 // Mark the end of the scope set.
908 debug_info()->end_safepoint(safepoint_pc_offset);
909 }
910
911
912
913 // A simplified version of Process_OopMap_Node, to handle non-safepoints.
914 class NonSafepointEmitter {
915 Compile* C;
916 JVMState* _pending_jvms;
917 int _pending_offset;
918
919 void emit_non_safepoint();
920
921 public:
922 NonSafepointEmitter(Compile* compile) {
923 this->C = compile;
924 _pending_jvms = NULL;
925 _pending_offset = 0;
926 }
927
928 void observe_instruction(Node* n, int pc_offset) {
929 if (!C->debug_info()->recording_non_safepoints()) return;
930
931 Node_Notes* nn = C->node_notes_at(n->_idx);
932 if (nn == NULL || nn->jvms() == NULL) return;
933 if (_pending_jvms != NULL &&
934 _pending_jvms->same_calls_as(nn->jvms())) {
935 // Repeated JVMS? Stretch it up here.
936 _pending_offset = pc_offset;
937 } else {
938 if (_pending_jvms != NULL &&
939 _pending_offset < pc_offset) {
940 emit_non_safepoint();
941 }
942 _pending_jvms = NULL;
943 if (pc_offset > C->debug_info()->last_pc_offset()) {
944 // This is the only way _pending_jvms can become non-NULL:
945 _pending_jvms = nn->jvms();
946 _pending_offset = pc_offset;
947 }
948 }
949 }
950
951 // Stay out of the way of real safepoints:
952 void observe_safepoint(JVMState* jvms, int pc_offset) {
953 if (_pending_jvms != NULL &&
954 !_pending_jvms->same_calls_as(jvms) &&
955 _pending_offset < pc_offset) {
956 emit_non_safepoint();
957 }
958 _pending_jvms = NULL;
959 }
960
961 void flush_at_end() {
962 if (_pending_jvms != NULL) {
963 emit_non_safepoint();
964 }
965 _pending_jvms = NULL;
966 }
967 };
968
969 void NonSafepointEmitter::emit_non_safepoint() {
970 JVMState* youngest_jvms = _pending_jvms;
971 int pc_offset = _pending_offset;
972
973 // Clear it now:
974 _pending_jvms = NULL;
975
976 DebugInformationRecorder* debug_info = C->debug_info();
977 assert(debug_info->recording_non_safepoints(), "sanity");
978
979 debug_info->add_non_safepoint(pc_offset);
980 int max_depth = youngest_jvms->depth();
981
982 // Visit scopes from oldest to youngest.
983 for (int depth = 1; depth <= max_depth; depth++) {
984 JVMState* jvms = youngest_jvms->of_depth(depth);
985 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
986 debug_info->describe_scope(pc_offset, method, jvms->bci());
987 }
988
989 // Mark the end of the scope set.
990 debug_info->end_non_safepoint(pc_offset);
991 }
992
993
994
995 // helper for Fill_buffer bailout logic
996 static void turn_off_compiler(Compile* C) {
997 if (CodeCache::unallocated_capacity() >= CodeCacheMinimumFreeSpace*10) {
998 // Do not turn off compilation if a single giant method has
999 // blown the code cache size.
1000 C->record_failure("excessive request to CodeCache");
1001 } else {
1002 // Let CompilerBroker disable further compilations.
1003 C->record_failure("CodeCache is full");
1004 }
1005 }
1006
1007
1008 //------------------------------Fill_buffer------------------------------------
1009 void Compile::Fill_buffer() {
1010
1011 // Set the initially allocated size
1012 int code_req = initial_code_capacity;
1013 int locs_req = initial_locs_capacity;
1014 int stub_req = TraceJumps ? initial_stub_capacity * 10 : initial_stub_capacity;
1015 int const_req = initial_const_capacity;
1016 bool labels_not_set = true;
1017
1018 int pad_req = NativeCall::instruction_size;
1019 // The extra spacing after the code is necessary on some platforms.
1020 // Sometimes we need to patch in a jump after the last instruction,
1021 // if the nmethod has been deoptimized. (See 4932387, 4894843.)
1022
1023 uint i;
1024 // Compute the byte offset where we can store the deopt pc.
1025 if (fixed_slots() != 0) {
1026 _orig_pc_slot_offset_in_bytes = _regalloc->reg2offset(OptoReg::stack2reg(_orig_pc_slot));
1027 }
1028
1029 // Compute prolog code size
1030 _method_size = 0;
1031 _frame_slots = OptoReg::reg2stack(_matcher->_old_SP)+_regalloc->_framesize;
1032 #ifdef IA64
1033 if (save_argument_registers()) {
1034 // 4815101: this is a stub with implicit and unknown precision fp args.
1035 // The usual spill mechanism can only generate stfd's in this case, which
1036 // doesn't work if the fp reg to spill contains a single-precision denorm.
1037 // Instead, we hack around the normal spill mechanism using stfspill's and
1038 // ldffill's in the MachProlog and MachEpilog emit methods. We allocate
1039 // space here for the fp arg regs (f8-f15) we're going to thusly spill.
1040 //
1041 // If we ever implement 16-byte 'registers' == stack slots, we can
1042 // get rid of this hack and have SpillCopy generate stfspill/ldffill
1043 // instead of stfd/stfs/ldfd/ldfs.
1044 _frame_slots += 8*(16/BytesPerInt);
1045 }
1046 #endif
1047 assert( _frame_slots >= 0 && _frame_slots < 1000000, "sanity check" );
1048
1049 // Create an array of unused labels, one for each basic block
1050 Label *blk_labels = NEW_RESOURCE_ARRAY(Label, _cfg->_num_blocks+1);
1051
1052 for( i=0; i <= _cfg->_num_blocks; i++ ) {
1053 blk_labels[i].init();
1054 }
1055
1056 // If this machine supports different size branch offsets, then pre-compute
1057 // the length of the blocks
1058 if( _matcher->is_short_branch_offset(0) ) {
1059 Shorten_branches(blk_labels, code_req, locs_req, stub_req, const_req);
1060 labels_not_set = false;
1061 }
1062
1063 // nmethod and CodeBuffer count stubs & constants as part of method's code.
1064 int exception_handler_req = size_exception_handler();
1065 int deopt_handler_req = size_deopt_handler();
1066 exception_handler_req += MAX_stubs_size; // add marginal slop for handler
1067 deopt_handler_req += MAX_stubs_size; // add marginal slop for handler
1068 stub_req += MAX_stubs_size; // ensure per-stub margin
1069 code_req += MAX_inst_size; // ensure per-instruction margin
1070 if (StressCodeBuffers)
1071 code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10; // force expansion
1072 int total_req = code_req + pad_req + stub_req + exception_handler_req + deopt_handler_req + const_req;
1073 CodeBuffer* cb = code_buffer();
1074 cb->initialize(total_req, locs_req);
1075
1076 // Have we run out of code space?
1077 if (cb->blob() == NULL) {
1078 turn_off_compiler(this);
1079 return;
1080 }
1081 // Configure the code buffer.
1082 cb->initialize_consts_size(const_req);
1083 cb->initialize_stubs_size(stub_req);
1084 cb->initialize_oop_recorder(env()->oop_recorder());
1085
1086 // fill in the nop array for bundling computations
1087 MachNode *_nop_list[Bundle::_nop_count];
1088 Bundle::initialize_nops(_nop_list, this);
1089
1090 // Create oopmap set.
1091 _oop_map_set = new OopMapSet();
1092
1093 // !!!!! This preserves old handling of oopmaps for now
1094 debug_info()->set_oopmaps(_oop_map_set);
1095
1096 // Count and start of implicit null check instructions
1097 uint inct_cnt = 0;
1098 uint *inct_starts = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1099
1100 // Count and start of calls
1101 uint *call_returns = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1102
1103 uint return_offset = 0;
1104 MachNode *nop = new (this) MachNopNode();
1105
1106 int previous_offset = 0;
1107 int current_offset = 0;
1108 int last_call_offset = -1;
1109
1110 // Create an array of unused labels, one for each basic block, if printing is enabled
1111 #ifndef PRODUCT
1112 int *node_offsets = NULL;
1113 uint node_offset_limit = unique();
1114
1115
1116 if ( print_assembly() )
1117 node_offsets = NEW_RESOURCE_ARRAY(int, node_offset_limit);
1118 #endif
1119
1120 NonSafepointEmitter non_safepoints(this); // emit non-safepoints lazily
1121
1122 // ------------------
1123 // Now fill in the code buffer
1124 Node *delay_slot = NULL;
1125
1126 for( i=0; i < _cfg->_num_blocks; i++ ) {
1127 Block *b = _cfg->_blocks[i];
1128
1129 Node *head = b->head();
1130
1131 // If this block needs to start aligned (i.e, can be reached other
1132 // than by falling-thru from the previous block), then force the
1133 // start of a new bundle.
1134 if( Pipeline::requires_bundling() && starts_bundle(head) )
1135 cb->flush_bundle(true);
1136
1137 // Define the label at the beginning of the basic block
1138 if( labels_not_set )
1139 MacroAssembler(cb).bind( blk_labels[b->_pre_order] );
1140
1141 else
1142 assert( blk_labels[b->_pre_order].loc_pos() == cb->code_size(),
1143 "label position does not match code offset" );
1144
1145 uint last_inst = b->_nodes.size();
1146
1147 // Emit block normally, except for last instruction.
1148 // Emit means "dump code bits into code buffer".
1149 for( uint j = 0; j<last_inst; j++ ) {
1150
1151 // Get the node
1152 Node* n = b->_nodes[j];
1153
1154 // See if delay slots are supported
1155 if (valid_bundle_info(n) &&
1156 node_bundling(n)->used_in_unconditional_delay()) {
1157 assert(delay_slot == NULL, "no use of delay slot node");
1158 assert(n->size(_regalloc) == Pipeline::instr_unit_size(), "delay slot instruction wrong size");
1159
1160 delay_slot = n;
1161 continue;
1162 }
1163
1164 // If this starts a new instruction group, then flush the current one
1165 // (but allow split bundles)
1166 if( Pipeline::requires_bundling() && starts_bundle(n) )
1167 cb->flush_bundle(false);
1168
1169 // The following logic is duplicated in the code ifdeffed for
1170 // ENABLE_ZAP_DEAD_LOCALS which apppears above in this file. It
1171 // should be factored out. Or maybe dispersed to the nodes?
1172
1173 // Special handling for SafePoint/Call Nodes
1174 bool is_mcall = false;
1175 if( n->is_Mach() ) {
1176 MachNode *mach = n->as_Mach();
1177 is_mcall = n->is_MachCall();
1178 bool is_sfn = n->is_MachSafePoint();
1179
1180 // If this requires all previous instructions be flushed, then do so
1181 if( is_sfn || is_mcall || mach->alignment_required() != 1) {
1182 cb->flush_bundle(true);
1183 current_offset = cb->code_size();
1184 }
1185
1186 // align the instruction if necessary
1187 int nop_size = nop->size(_regalloc);
1188 int padding = mach->compute_padding(current_offset);
1189 // Make sure safepoint node for polling is distinct from a call's
1190 // return by adding a nop if needed.
1191 if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset ) {
1192 padding = nop_size;
1193 }
1194 assert( labels_not_set || padding == 0, "instruction should already be aligned")
1195
1196 if(padding > 0) {
1197 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
1198 int nops_cnt = padding / nop_size;
1199 MachNode *nop = new (this) MachNopNode(nops_cnt);
1200 b->_nodes.insert(j++, nop);
1201 last_inst++;
1202 _cfg->_bbs.map( nop->_idx, b );
1203 nop->emit(*cb, _regalloc);
1204 cb->flush_bundle(true);
1205 current_offset = cb->code_size();
1206 }
1207
1208 // Remember the start of the last call in a basic block
1209 if (is_mcall) {
1210 MachCallNode *mcall = mach->as_MachCall();
1211
1212 // This destination address is NOT PC-relative
1213 mcall->method_set((intptr_t)mcall->entry_point());
1214
1215 // Save the return address
1216 call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset();
1217
1218 if (!mcall->is_safepoint_node()) {
1219 is_mcall = false;
1220 is_sfn = false;
1221 }
1222 }
1223
1224 // sfn will be valid whenever mcall is valid now because of inheritance
1225 if( is_sfn || is_mcall ) {
1226
1227 // Handle special safepoint nodes for synchronization
1228 if( !is_mcall ) {
1229 MachSafePointNode *sfn = mach->as_MachSafePoint();
1230 // !!!!! Stubs only need an oopmap right now, so bail out
1231 if( sfn->jvms()->method() == NULL) {
1232 // Write the oopmap directly to the code blob??!!
1233 # ifdef ENABLE_ZAP_DEAD_LOCALS
1234 assert( !is_node_getting_a_safepoint(sfn), "logic does not match; false positive");
1235 # endif
1236 continue;
1237 }
1238 } // End synchronization
1239
1240 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1241 current_offset);
1242 Process_OopMap_Node(mach, current_offset);
1243 } // End if safepoint
1244
1245 // If this is a null check, then add the start of the previous instruction to the list
1246 else if( mach->is_MachNullCheck() ) {
1247 inct_starts[inct_cnt++] = previous_offset;
1248 }
1249
1250 // If this is a branch, then fill in the label with the target BB's label
1251 else if ( mach->is_Branch() ) {
1252
1253 if ( mach->ideal_Opcode() == Op_Jump ) {
1254 for (uint h = 0; h < b->_num_succs; h++ ) {
1255 Block* succs_block = b->_succs[h];
1256 for (uint j = 1; j < succs_block->num_preds(); j++) {
1257 Node* jpn = succs_block->pred(j);
1258 if ( jpn->is_JumpProj() && jpn->in(0) == mach ) {
1259 uint block_num = succs_block->non_connector()->_pre_order;
1260 Label *blkLabel = &blk_labels[block_num];
1261 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
1262 }
1263 }
1264 }
1265 } else {
1266 // For Branchs
1267 // This requires the TRUE branch target be in succs[0]
1268 uint block_num = b->non_connector_successor(0)->_pre_order;
1269 mach->label_set( blk_labels[block_num], block_num );
1270 }
1271 }
1272
1273 #ifdef ASSERT
1274 // Check that oop-store preceeds the card-mark
1275 else if( mach->ideal_Opcode() == Op_StoreCM ) {
1276 uint storeCM_idx = j;
1277 Node *oop_store = mach->in(mach->_cnt); // First precedence edge
1278 assert( oop_store != NULL, "storeCM expects a precedence edge");
1279 uint i4;
1280 for( i4 = 0; i4 < last_inst; ++i4 ) {
1281 if( b->_nodes[i4] == oop_store ) break;
1282 }
1283 // Note: This test can provide a false failure if other precedence
1284 // edges have been added to the storeCMNode.
1285 assert( i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
1286 }
1287 #endif
1288
1289 else if( !n->is_Proj() ) {
1290 // Remember the begining of the previous instruction, in case
1291 // it's followed by a flag-kill and a null-check. Happens on
1292 // Intel all the time, with add-to-memory kind of opcodes.
1293 previous_offset = current_offset;
1294 }
1295 }
1296
1297 // Verify that there is sufficient space remaining
1298 cb->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size);
1299 if (cb->blob() == NULL) {
1300 turn_off_compiler(this);
1301 return;
1302 }
1303
1304 // Save the offset for the listing
1305 #ifndef PRODUCT
1306 if( node_offsets && n->_idx < node_offset_limit )
1307 node_offsets[n->_idx] = cb->code_size();
1308 #endif
1309
1310 // "Normal" instruction case
1311 n->emit(*cb, _regalloc);
1312 current_offset = cb->code_size();
1313 non_safepoints.observe_instruction(n, current_offset);
1314
1315 // mcall is last "call" that can be a safepoint
1316 // record it so we can see if a poll will directly follow it
1317 // in which case we'll need a pad to make the PcDesc sites unique
1318 // see 5010568. This can be slightly inaccurate but conservative
1319 // in the case that return address is not actually at current_offset.
1320 // This is a small price to pay.
1321
1322 if (is_mcall) {
1323 last_call_offset = current_offset;
1324 }
1325
1326 // See if this instruction has a delay slot
1327 if ( valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) {
1328 assert(delay_slot != NULL, "expecting delay slot node");
1329
1330 // Back up 1 instruction
1331 cb->set_code_end(
1332 cb->code_end()-Pipeline::instr_unit_size());
1333
1334 // Save the offset for the listing
1335 #ifndef PRODUCT
1336 if( node_offsets && delay_slot->_idx < node_offset_limit )
1337 node_offsets[delay_slot->_idx] = cb->code_size();
1338 #endif
1339
1340 // Support a SafePoint in the delay slot
1341 if( delay_slot->is_MachSafePoint() ) {
1342 MachNode *mach = delay_slot->as_Mach();
1343 // !!!!! Stubs only need an oopmap right now, so bail out
1344 if( !mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == NULL ) {
1345 // Write the oopmap directly to the code blob??!!
1346 # ifdef ENABLE_ZAP_DEAD_LOCALS
1347 assert( !is_node_getting_a_safepoint(mach), "logic does not match; false positive");
1348 # endif
1349 delay_slot = NULL;
1350 continue;
1351 }
1352
1353 int adjusted_offset = current_offset - Pipeline::instr_unit_size();
1354 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1355 adjusted_offset);
1356 // Generate an OopMap entry
1357 Process_OopMap_Node(mach, adjusted_offset);
1358 }
1359
1360 // Insert the delay slot instruction
1361 delay_slot->emit(*cb, _regalloc);
1362
1363 // Don't reuse it
1364 delay_slot = NULL;
1365 }
1366
1367 } // End for all instructions in block
1368
1369 // If the next block _starts_ a loop, pad this block out to align
1370 // the loop start a little. Helps prevent pipe stalls at loop starts
1371 int nop_size = (new (this) MachNopNode())->size(_regalloc);
1372 if( i<_cfg->_num_blocks-1 ) {
1373 Block *nb = _cfg->_blocks[i+1];
1374 uint padding = nb->alignment_padding(current_offset);
1375 if( padding > 0 ) {
1376 MachNode *nop = new (this) MachNopNode(padding / nop_size);
1377 b->_nodes.insert( b->_nodes.size(), nop );
1378 _cfg->_bbs.map( nop->_idx, b );
1379 nop->emit(*cb, _regalloc);
1380 current_offset = cb->code_size();
1381 }
1382 }
1383
1384 } // End of for all blocks
1385
1386 non_safepoints.flush_at_end();
1387
1388 // Offset too large?
1389 if (failing()) return;
1390
1391 // Define a pseudo-label at the end of the code
1392 MacroAssembler(cb).bind( blk_labels[_cfg->_num_blocks] );
1393
1394 // Compute the size of the first block
1395 _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos();
1396
1397 assert(cb->code_size() < 500000, "method is unreasonably large");
1398
1399 // ------------------
1400
1401 #ifndef PRODUCT
1402 // Information on the size of the method, without the extraneous code
1403 Scheduling::increment_method_size(cb->code_size());
1404 #endif
1405
1406 // ------------------
1407 // Fill in exception table entries.
1408 FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels);
1409
1410 // Only java methods have exception handlers and deopt handlers
1411 if (_method) {
1412 // Emit the exception handler code.
1413 _code_offsets.set_value(CodeOffsets::Exceptions, emit_exception_handler(*cb));
1414 // Emit the deopt handler code.
1415 _code_offsets.set_value(CodeOffsets::Deopt, emit_deopt_handler(*cb));
1416 }
1417
1418 // One last check for failed CodeBuffer::expand:
1419 if (cb->blob() == NULL) {
1420 turn_off_compiler(this);
1421 return;
1422 }
1423
1424 #ifndef PRODUCT
1425 // Dump the assembly code, including basic-block numbers
1426 if (print_assembly()) {
1427 ttyLocker ttyl; // keep the following output all in one block
1428 if (!VMThread::should_terminate()) { // test this under the tty lock
1429 // This output goes directly to the tty, not the compiler log.
1430 // To enable tools to match it up with the compilation activity,
1431 // be sure to tag this tty output with the compile ID.
1432 if (xtty != NULL) {
1433 xtty->head("opto_assembly compile_id='%d'%s", compile_id(),
1434 is_osr_compilation() ? " compile_kind='osr'" :
1435 "");
1436 }
1437 if (method() != NULL) {
1438 method()->print_oop();
1439 print_codes();
1440 }
1441 dump_asm(node_offsets, node_offset_limit);
1442 if (xtty != NULL) {
1443 xtty->tail("opto_assembly");
1444 }
1445 }
1446 }
1447 #endif
1448
1449 }
1450
1451 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
1452 _inc_table.set_size(cnt);
1453
1454 uint inct_cnt = 0;
1455 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
1456 Block *b = _cfg->_blocks[i];
1457 Node *n = NULL;
1458 int j;
1459
1460 // Find the branch; ignore trailing NOPs.
1461 for( j = b->_nodes.size()-1; j>=0; j-- ) {
1462 n = b->_nodes[j];
1463 if( !n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con )
1464 break;
1465 }
1466
1467 // If we didn't find anything, continue
1468 if( j < 0 ) continue;
1469
1470 // Compute ExceptionHandlerTable subtable entry and add it
1471 // (skip empty blocks)
1472 if( n->is_Catch() ) {
1473
1474 // Get the offset of the return from the call
1475 uint call_return = call_returns[b->_pre_order];
1476 #ifdef ASSERT
1477 assert( call_return > 0, "no call seen for this basic block" );
1478 while( b->_nodes[--j]->Opcode() == Op_MachProj ) ;
1479 assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" );
1480 #endif
1481 // last instruction is a CatchNode, find it's CatchProjNodes
1482 int nof_succs = b->_num_succs;
1483 // allocate space
1484 GrowableArray<intptr_t> handler_bcis(nof_succs);
1485 GrowableArray<intptr_t> handler_pcos(nof_succs);
1486 // iterate through all successors
1487 for (int j = 0; j < nof_succs; j++) {
1488 Block* s = b->_succs[j];
1489 bool found_p = false;
1490 for( uint k = 1; k < s->num_preds(); k++ ) {
1491 Node *pk = s->pred(k);
1492 if( pk->is_CatchProj() && pk->in(0) == n ) {
1493 const CatchProjNode* p = pk->as_CatchProj();
1494 found_p = true;
1495 // add the corresponding handler bci & pco information
1496 if( p->_con != CatchProjNode::fall_through_index ) {
1497 // p leads to an exception handler (and is not fall through)
1498 assert(s == _cfg->_blocks[s->_pre_order],"bad numbering");
1499 // no duplicates, please
1500 if( !handler_bcis.contains(p->handler_bci()) ) {
1501 uint block_num = s->non_connector()->_pre_order;
1502 handler_bcis.append(p->handler_bci());
1503 handler_pcos.append(blk_labels[block_num].loc_pos());
1504 }
1505 }
1506 }
1507 }
1508 assert(found_p, "no matching predecessor found");
1509 // Note: Due to empty block removal, one block may have
1510 // several CatchProj inputs, from the same Catch.
1511 }
1512
1513 // Set the offset of the return from the call
1514 _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos);
1515 continue;
1516 }
1517
1518 // Handle implicit null exception table updates
1519 if( n->is_MachNullCheck() ) {
1520 uint block_num = b->non_connector_successor(0)->_pre_order;
1521 _inc_table.append( inct_starts[inct_cnt++], blk_labels[block_num].loc_pos() );
1522 continue;
1523 }
1524 } // End of for all blocks fill in exception table entries
1525 }
1526
1527 // Static Variables
1528 #ifndef PRODUCT
1529 uint Scheduling::_total_nop_size = 0;
1530 uint Scheduling::_total_method_size = 0;
1531 uint Scheduling::_total_branches = 0;
1532 uint Scheduling::_total_unconditional_delays = 0;
1533 uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1];
1534 #endif
1535
1536 // Initializer for class Scheduling
1537
1538 Scheduling::Scheduling(Arena *arena, Compile &compile)
1539 : _arena(arena),
1540 _cfg(compile.cfg()),
1541 _bbs(compile.cfg()->_bbs),
1542 _regalloc(compile.regalloc()),
1543 _reg_node(arena),
1544 _bundle_instr_count(0),
1545 _bundle_cycle_number(0),
1546 _scheduled(arena),
1547 _available(arena),
1548 _next_node(NULL),
1549 _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]),
1550 _pinch_free_list(arena)
1551 #ifndef PRODUCT
1552 , _branches(0)
1553 , _unconditional_delays(0)
1554 #endif
1555 {
1556 // Create a MachNopNode
1557 _nop = new (&compile) MachNopNode();
1558
1559 // Now that the nops are in the array, save the count
1560 // (but allow entries for the nops)
1561 _node_bundling_limit = compile.unique();
1562 uint node_max = _regalloc->node_regs_max_index();
1563
1564 compile.set_node_bundling_limit(_node_bundling_limit);
1565
1566 // This one is persistant within the Compile class
1567 _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max);
1568
1569 // Allocate space for fixed-size arrays
1570 _node_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1571 _uses = NEW_ARENA_ARRAY(arena, short, node_max);
1572 _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1573
1574 // Clear the arrays
1575 memset(_node_bundling_base, 0, node_max * sizeof(Bundle));
1576 memset(_node_latency, 0, node_max * sizeof(unsigned short));
1577 memset(_uses, 0, node_max * sizeof(short));
1578 memset(_current_latency, 0, node_max * sizeof(unsigned short));
1579
1580 // Clear the bundling information
1581 memcpy(_bundle_use_elements,
1582 Pipeline_Use::elaborated_elements,
1583 sizeof(Pipeline_Use::elaborated_elements));
1584
1585 // Get the last node
1586 Block *bb = _cfg->_blocks[_cfg->_blocks.size()-1];
1587
1588 _next_node = bb->_nodes[bb->_nodes.size()-1];
1589 }
1590
1591 #ifndef PRODUCT
1592 // Scheduling destructor
1593 Scheduling::~Scheduling() {
1594 _total_branches += _branches;
1595 _total_unconditional_delays += _unconditional_delays;
1596 }
1597 #endif
1598
1599 // Step ahead "i" cycles
1600 void Scheduling::step(uint i) {
1601
1602 Bundle *bundle = node_bundling(_next_node);
1603 bundle->set_starts_bundle();
1604
1605 // Update the bundle record, but leave the flags information alone
1606 if (_bundle_instr_count > 0) {
1607 bundle->set_instr_count(_bundle_instr_count);
1608 bundle->set_resources_used(_bundle_use.resourcesUsed());
1609 }
1610
1611 // Update the state information
1612 _bundle_instr_count = 0;
1613 _bundle_cycle_number += i;
1614 _bundle_use.step(i);
1615 }
1616
1617 void Scheduling::step_and_clear() {
1618 Bundle *bundle = node_bundling(_next_node);
1619 bundle->set_starts_bundle();
1620
1621 // Update the bundle record
1622 if (_bundle_instr_count > 0) {
1623 bundle->set_instr_count(_bundle_instr_count);
1624 bundle->set_resources_used(_bundle_use.resourcesUsed());
1625
1626 _bundle_cycle_number += 1;
1627 }
1628
1629 // Clear the bundling information
1630 _bundle_instr_count = 0;
1631 _bundle_use.reset();
1632
1633 memcpy(_bundle_use_elements,
1634 Pipeline_Use::elaborated_elements,
1635 sizeof(Pipeline_Use::elaborated_elements));
1636 }
1637
1638 //------------------------------ScheduleAndBundle------------------------------
1639 // Perform instruction scheduling and bundling over the sequence of
1640 // instructions in backwards order.
1641 void Compile::ScheduleAndBundle() {
1642
1643 // Don't optimize this if it isn't a method
1644 if (!_method)
1645 return;
1646
1647 // Don't optimize this if scheduling is disabled
1648 if (!do_scheduling())
1649 return;
1650
1651 NOT_PRODUCT( TracePhase t2("isched", &_t_instrSched, TimeCompiler); )
1652
1653 // Create a data structure for all the scheduling information
1654 Scheduling scheduling(Thread::current()->resource_area(), *this);
1655
1656 // Walk backwards over each basic block, computing the needed alignment
1657 // Walk over all the basic blocks
1658 scheduling.DoScheduling();
1659 }
1660
1661 //------------------------------ComputeLocalLatenciesForward-------------------
1662 // Compute the latency of all the instructions. This is fairly simple,
1663 // because we already have a legal ordering. Walk over the instructions
1664 // from first to last, and compute the latency of the instruction based
1665 // on the latency of the preceeding instruction(s).
1666 void Scheduling::ComputeLocalLatenciesForward(const Block *bb) {
1667 #ifndef PRODUCT
1668 if (_cfg->C->trace_opto_output())
1669 tty->print("# -> ComputeLocalLatenciesForward\n");
1670 #endif
1671
1672 // Walk over all the schedulable instructions
1673 for( uint j=_bb_start; j < _bb_end; j++ ) {
1674
1675 // This is a kludge, forcing all latency calculations to start at 1.
1676 // Used to allow latency 0 to force an instruction to the beginning
1677 // of the bb
1678 uint latency = 1;
1679 Node *use = bb->_nodes[j];
1680 uint nlen = use->len();
1681
1682 // Walk over all the inputs
1683 for ( uint k=0; k < nlen; k++ ) {
1684 Node *def = use->in(k);
1685 if (!def)
1686 continue;
1687
1688 uint l = _node_latency[def->_idx] + use->latency(k);
1689 if (latency < l)
1690 latency = l;
1691 }
1692
1693 _node_latency[use->_idx] = latency;
1694
1695 #ifndef PRODUCT
1696 if (_cfg->C->trace_opto_output()) {
1697 tty->print("# latency %4d: ", latency);
1698 use->dump();
1699 }
1700 #endif
1701 }
1702
1703 #ifndef PRODUCT
1704 if (_cfg->C->trace_opto_output())
1705 tty->print("# <- ComputeLocalLatenciesForward\n");
1706 #endif
1707
1708 } // end ComputeLocalLatenciesForward
1709
1710 // See if this node fits into the present instruction bundle
1711 bool Scheduling::NodeFitsInBundle(Node *n) {
1712 uint n_idx = n->_idx;
1713
1714 // If this is the unconditional delay instruction, then it fits
1715 if (n == _unconditional_delay_slot) {
1716 #ifndef PRODUCT
1717 if (_cfg->C->trace_opto_output())
1718 tty->print("# NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx);
1719 #endif
1720 return (true);
1721 }
1722
1723 // If the node cannot be scheduled this cycle, skip it
1724 if (_current_latency[n_idx] > _bundle_cycle_number) {
1725 #ifndef PRODUCT
1726 if (_cfg->C->trace_opto_output())
1727 tty->print("# NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n",
1728 n->_idx, _current_latency[n_idx], _bundle_cycle_number);
1729 #endif
1730 return (false);
1731 }
1732
1733 const Pipeline *node_pipeline = n->pipeline();
1734
1735 uint instruction_count = node_pipeline->instructionCount();
1736 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
1737 instruction_count = 0;
1738 else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
1739 instruction_count++;
1740
1741 if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) {
1742 #ifndef PRODUCT
1743 if (_cfg->C->trace_opto_output())
1744 tty->print("# NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n",
1745 n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle);
1746 #endif
1747 return (false);
1748 }
1749
1750 // Don't allow non-machine nodes to be handled this way
1751 if (!n->is_Mach() && instruction_count == 0)
1752 return (false);
1753
1754 // See if there is any overlap
1755 uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse());
1756
1757 if (delay > 0) {
1758 #ifndef PRODUCT
1759 if (_cfg->C->trace_opto_output())
1760 tty->print("# NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx);
1761 #endif
1762 return false;
1763 }
1764
1765 #ifndef PRODUCT
1766 if (_cfg->C->trace_opto_output())
1767 tty->print("# NodeFitsInBundle [%4d]: TRUE\n", n_idx);
1768 #endif
1769
1770 return true;
1771 }
1772
1773 Node * Scheduling::ChooseNodeToBundle() {
1774 uint siz = _available.size();
1775
1776 if (siz == 0) {
1777
1778 #ifndef PRODUCT
1779 if (_cfg->C->trace_opto_output())
1780 tty->print("# ChooseNodeToBundle: NULL\n");
1781 #endif
1782 return (NULL);
1783 }
1784
1785 // Fast path, if only 1 instruction in the bundle
1786 if (siz == 1) {
1787 #ifndef PRODUCT
1788 if (_cfg->C->trace_opto_output()) {
1789 tty->print("# ChooseNodeToBundle (only 1): ");
1790 _available[0]->dump();
1791 }
1792 #endif
1793 return (_available[0]);
1794 }
1795
1796 // Don't bother, if the bundle is already full
1797 if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) {
1798 for ( uint i = 0; i < siz; i++ ) {
1799 Node *n = _available[i];
1800
1801 // Skip projections, we'll handle them another way
1802 if (n->is_Proj())
1803 continue;
1804
1805 // This presupposed that instructions are inserted into the
1806 // available list in a legality order; i.e. instructions that
1807 // must be inserted first are at the head of the list
1808 if (NodeFitsInBundle(n)) {
1809 #ifndef PRODUCT
1810 if (_cfg->C->trace_opto_output()) {
1811 tty->print("# ChooseNodeToBundle: ");
1812 n->dump();
1813 }
1814 #endif
1815 return (n);
1816 }
1817 }
1818 }
1819
1820 // Nothing fits in this bundle, choose the highest priority
1821 #ifndef PRODUCT
1822 if (_cfg->C->trace_opto_output()) {
1823 tty->print("# ChooseNodeToBundle: ");
1824 _available[0]->dump();
1825 }
1826 #endif
1827
1828 return _available[0];
1829 }
1830
1831 //------------------------------AddNodeToAvailableList-------------------------
1832 void Scheduling::AddNodeToAvailableList(Node *n) {
1833 assert( !n->is_Proj(), "projections never directly made available" );
1834 #ifndef PRODUCT
1835 if (_cfg->C->trace_opto_output()) {
1836 tty->print("# AddNodeToAvailableList: ");
1837 n->dump();
1838 }
1839 #endif
1840
1841 int latency = _current_latency[n->_idx];
1842
1843 // Insert in latency order (insertion sort)
1844 uint i;
1845 for ( i=0; i < _available.size(); i++ )
1846 if (_current_latency[_available[i]->_idx] > latency)
1847 break;
1848
1849 // Special Check for compares following branches
1850 if( n->is_Mach() && _scheduled.size() > 0 ) {
1851 int op = n->as_Mach()->ideal_Opcode();
1852 Node *last = _scheduled[0];
1853 if( last->is_MachIf() && last->in(1) == n &&
1854 ( op == Op_CmpI ||
1855 op == Op_CmpU ||
1856 op == Op_CmpP ||
1857 op == Op_CmpF ||
1858 op == Op_CmpD ||
1859 op == Op_CmpL ) ) {
1860
1861 // Recalculate position, moving to front of same latency
1862 for ( i=0 ; i < _available.size(); i++ )
1863 if (_current_latency[_available[i]->_idx] >= latency)
1864 break;
1865 }
1866 }
1867
1868 // Insert the node in the available list
1869 _available.insert(i, n);
1870
1871 #ifndef PRODUCT
1872 if (_cfg->C->trace_opto_output())
1873 dump_available();
1874 #endif
1875 }
1876
1877 //------------------------------DecrementUseCounts-----------------------------
1878 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
1879 for ( uint i=0; i < n->len(); i++ ) {
1880 Node *def = n->in(i);
1881 if (!def) continue;
1882 if( def->is_Proj() ) // If this is a machine projection, then
1883 def = def->in(0); // propagate usage thru to the base instruction
1884
1885 if( _bbs[def->_idx] != bb ) // Ignore if not block-local
1886 continue;
1887
1888 // Compute the latency
1889 uint l = _bundle_cycle_number + n->latency(i);
1890 if (_current_latency[def->_idx] < l)
1891 _current_latency[def->_idx] = l;
1892
1893 // If this does not have uses then schedule it
1894 if ((--_uses[def->_idx]) == 0)
1895 AddNodeToAvailableList(def);
1896 }
1897 }
1898
1899 //------------------------------AddNodeToBundle--------------------------------
1900 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) {
1901 #ifndef PRODUCT
1902 if (_cfg->C->trace_opto_output()) {
1903 tty->print("# AddNodeToBundle: ");
1904 n->dump();
1905 }
1906 #endif
1907
1908 // Remove this from the available list
1909 uint i;
1910 for (i = 0; i < _available.size(); i++)
1911 if (_available[i] == n)
1912 break;
1913 assert(i < _available.size(), "entry in _available list not found");
1914 _available.remove(i);
1915
1916 // See if this fits in the current bundle
1917 const Pipeline *node_pipeline = n->pipeline();
1918 const Pipeline_Use& node_usage = node_pipeline->resourceUse();
1919
1920 // Check for instructions to be placed in the delay slot. We
1921 // do this before we actually schedule the current instruction,
1922 // because the delay slot follows the current instruction.
1923 if (Pipeline::_branch_has_delay_slot &&
1924 node_pipeline->hasBranchDelay() &&
1925 !_unconditional_delay_slot) {
1926
1927 uint siz = _available.size();
1928
1929 // Conditional branches can support an instruction that
1930 // is unconditionally executed and not dependant by the
1931 // branch, OR a conditionally executed instruction if
1932 // the branch is taken. In practice, this means that
1933 // the first instruction at the branch target is
1934 // copied to the delay slot, and the branch goes to
1935 // the instruction after that at the branch target
1936 if ( n->is_Mach() && n->is_Branch() ) {
1937
1938 assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" );
1939 assert( !n->is_Catch(), "should not look for delay slot for Catch" );
1940
1941 #ifndef PRODUCT
1942 _branches++;
1943 #endif
1944
1945 // At least 1 instruction is on the available list
1946 // that is not dependant on the branch
1947 for (uint i = 0; i < siz; i++) {
1948 Node *d = _available[i];
1949 const Pipeline *avail_pipeline = d->pipeline();
1950
1951 // Don't allow safepoints in the branch shadow, that will
1952 // cause a number of difficulties
1953 if ( avail_pipeline->instructionCount() == 1 &&
1954 !avail_pipeline->hasMultipleBundles() &&
1955 !avail_pipeline->hasBranchDelay() &&
1956 Pipeline::instr_has_unit_size() &&
1957 d->size(_regalloc) == Pipeline::instr_unit_size() &&
1958 NodeFitsInBundle(d) &&
1959 !node_bundling(d)->used_in_delay()) {
1960
1961 if (d->is_Mach() && !d->is_MachSafePoint()) {
1962 // A node that fits in the delay slot was found, so we need to
1963 // set the appropriate bits in the bundle pipeline information so
1964 // that it correctly indicates resource usage. Later, when we
1965 // attempt to add this instruction to the bundle, we will skip
1966 // setting the resource usage.
1967 _unconditional_delay_slot = d;
1968 node_bundling(n)->set_use_unconditional_delay();
1969 node_bundling(d)->set_used_in_unconditional_delay();
1970 _bundle_use.add_usage(avail_pipeline->resourceUse());
1971 _current_latency[d->_idx] = _bundle_cycle_number;
1972 _next_node = d;
1973 ++_bundle_instr_count;
1974 #ifndef PRODUCT
1975 _unconditional_delays++;
1976 #endif
1977 break;
1978 }
1979 }
1980 }
1981 }
1982
1983 // No delay slot, add a nop to the usage
1984 if (!_unconditional_delay_slot) {
1985 // See if adding an instruction in the delay slot will overflow
1986 // the bundle.
1987 if (!NodeFitsInBundle(_nop)) {
1988 #ifndef PRODUCT
1989 if (_cfg->C->trace_opto_output())
1990 tty->print("# *** STEP(1 instruction for delay slot) ***\n");
1991 #endif
1992 step(1);
1993 }
1994
1995 _bundle_use.add_usage(_nop->pipeline()->resourceUse());
1996 _next_node = _nop;
1997 ++_bundle_instr_count;
1998 }
1999
2000 // See if the instruction in the delay slot requires a
2001 // step of the bundles
2002 if (!NodeFitsInBundle(n)) {
2003 #ifndef PRODUCT
2004 if (_cfg->C->trace_opto_output())
2005 tty->print("# *** STEP(branch won't fit) ***\n");
2006 #endif
2007 // Update the state information
2008 _bundle_instr_count = 0;
2009 _bundle_cycle_number += 1;
2010 _bundle_use.step(1);
2011 }
2012 }
2013
2014 // Get the number of instructions
2015 uint instruction_count = node_pipeline->instructionCount();
2016 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
2017 instruction_count = 0;
2018
2019 // Compute the latency information
2020 uint delay = 0;
2021
2022 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) {
2023 int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number;
2024 if (relative_latency < 0)
2025 relative_latency = 0;
2026
2027 delay = _bundle_use.full_latency(relative_latency, node_usage);
2028
2029 // Does not fit in this bundle, start a new one
2030 if (delay > 0) {
2031 step(delay);
2032
2033 #ifndef PRODUCT
2034 if (_cfg->C->trace_opto_output())
2035 tty->print("# *** STEP(%d) ***\n", delay);
2036 #endif
2037 }
2038 }
2039
2040 // If this was placed in the delay slot, ignore it
2041 if (n != _unconditional_delay_slot) {
2042
2043 if (delay == 0) {
2044 if (node_pipeline->hasMultipleBundles()) {
2045 #ifndef PRODUCT
2046 if (_cfg->C->trace_opto_output())
2047 tty->print("# *** STEP(multiple instructions) ***\n");
2048 #endif
2049 step(1);
2050 }
2051
2052 else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) {
2053 #ifndef PRODUCT
2054 if (_cfg->C->trace_opto_output())
2055 tty->print("# *** STEP(%d >= %d instructions) ***\n",
2056 instruction_count + _bundle_instr_count,
2057 Pipeline::_max_instrs_per_cycle);
2058 #endif
2059 step(1);
2060 }
2061 }
2062
2063 if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
2064 _bundle_instr_count++;
2065
2066 // Set the node's latency
2067 _current_latency[n->_idx] = _bundle_cycle_number;
2068
2069 // Now merge the functional unit information
2070 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode())
2071 _bundle_use.add_usage(node_usage);
2072
2073 // Increment the number of instructions in this bundle
2074 _bundle_instr_count += instruction_count;
2075
2076 // Remember this node for later
2077 if (n->is_Mach())
2078 _next_node = n;
2079 }
2080
2081 // It's possible to have a BoxLock in the graph and in the _bbs mapping but
2082 // not in the bb->_nodes array. This happens for debug-info-only BoxLocks.
2083 // 'Schedule' them (basically ignore in the schedule) but do not insert them
2084 // into the block. All other scheduled nodes get put in the schedule here.
2085 int op = n->Opcode();
2086 if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR
2087 (op != Op_Node && // Not an unused antidepedence node and
2088 // not an unallocated boxlock
2089 (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
2090
2091 // Push any trailing projections
2092 if( bb->_nodes[bb->_nodes.size()-1] != n ) {
2093 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2094 Node *foi = n->fast_out(i);
2095 if( foi->is_Proj() )
2096 _scheduled.push(foi);
2097 }
2098 }
2099
2100 // Put the instruction in the schedule list
2101 _scheduled.push(n);
2102 }
2103
2104 #ifndef PRODUCT
2105 if (_cfg->C->trace_opto_output())
2106 dump_available();
2107 #endif
2108
2109 // Walk all the definitions, decrementing use counts, and
2110 // if a definition has a 0 use count, place it in the available list.
2111 DecrementUseCounts(n,bb);
2112 }
2113
2114 //------------------------------ComputeUseCount--------------------------------
2115 // This method sets the use count within a basic block. We will ignore all
2116 // uses outside the current basic block. As we are doing a backwards walk,
2117 // any node we reach that has a use count of 0 may be scheduled. This also
2118 // avoids the problem of cyclic references from phi nodes, as long as phi
2119 // nodes are at the front of the basic block. This method also initializes
2120 // the available list to the set of instructions that have no uses within this
2121 // basic block.
2122 void Scheduling::ComputeUseCount(const Block *bb) {
2123 #ifndef PRODUCT
2124 if (_cfg->C->trace_opto_output())
2125 tty->print("# -> ComputeUseCount\n");
2126 #endif
2127
2128 // Clear the list of available and scheduled instructions, just in case
2129 _available.clear();
2130 _scheduled.clear();
2131
2132 // No delay slot specified
2133 _unconditional_delay_slot = NULL;
2134
2135 #ifdef ASSERT
2136 for( uint i=0; i < bb->_nodes.size(); i++ )
2137 assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" );
2138 #endif
2139
2140 // Force the _uses count to never go to zero for unscheduable pieces
2141 // of the block
2142 for( uint k = 0; k < _bb_start; k++ )
2143 _uses[bb->_nodes[k]->_idx] = 1;
2144 for( uint l = _bb_end; l < bb->_nodes.size(); l++ )
2145 _uses[bb->_nodes[l]->_idx] = 1;
2146
2147 // Iterate backwards over the instructions in the block. Don't count the
2148 // branch projections at end or the block header instructions.
2149 for( uint j = _bb_end-1; j >= _bb_start; j-- ) {
2150 Node *n = bb->_nodes[j];
2151 if( n->is_Proj() ) continue; // Projections handled another way
2152
2153 // Account for all uses
2154 for ( uint k = 0; k < n->len(); k++ ) {
2155 Node *inp = n->in(k);
2156 if (!inp) continue;
2157 assert(inp != n, "no cycles allowed" );
2158 if( _bbs[inp->_idx] == bb ) { // Block-local use?
2159 if( inp->is_Proj() ) // Skip through Proj's
2160 inp = inp->in(0);
2161 ++_uses[inp->_idx]; // Count 1 block-local use
2162 }
2163 }
2164
2165 // If this instruction has a 0 use count, then it is available
2166 if (!_uses[n->_idx]) {
2167 _current_latency[n->_idx] = _bundle_cycle_number;
2168 AddNodeToAvailableList(n);
2169 }
2170
2171 #ifndef PRODUCT
2172 if (_cfg->C->trace_opto_output()) {
2173 tty->print("# uses: %3d: ", _uses[n->_idx]);
2174 n->dump();
2175 }
2176 #endif
2177 }
2178
2179 #ifndef PRODUCT
2180 if (_cfg->C->trace_opto_output())
2181 tty->print("# <- ComputeUseCount\n");
2182 #endif
2183 }
2184
2185 // This routine performs scheduling on each basic block in reverse order,
2186 // using instruction latencies and taking into account function unit
2187 // availability.
2188 void Scheduling::DoScheduling() {
2189 #ifndef PRODUCT
2190 if (_cfg->C->trace_opto_output())
2191 tty->print("# -> DoScheduling\n");
2192 #endif
2193
2194 Block *succ_bb = NULL;
2195 Block *bb;
2196
2197 // Walk over all the basic blocks in reverse order
2198 for( int i=_cfg->_num_blocks-1; i >= 0; succ_bb = bb, i-- ) {
2199 bb = _cfg->_blocks[i];
2200
2201 #ifndef PRODUCT
2202 if (_cfg->C->trace_opto_output()) {
2203 tty->print("# Schedule BB#%03d (initial)\n", i);
2204 for (uint j = 0; j < bb->_nodes.size(); j++)
2205 bb->_nodes[j]->dump();
2206 }
2207 #endif
2208
2209 // On the head node, skip processing
2210 if( bb == _cfg->_broot )
2211 continue;
2212
2213 // Skip empty, connector blocks
2214 if (bb->is_connector())
2215 continue;
2216
2217 // If the following block is not the sole successor of
2218 // this one, then reset the pipeline information
2219 if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) {
2220 #ifndef PRODUCT
2221 if (_cfg->C->trace_opto_output()) {
2222 tty->print("*** bundle start of next BB, node %d, for %d instructions\n",
2223 _next_node->_idx, _bundle_instr_count);
2224 }
2225 #endif
2226 step_and_clear();
2227 }
2228
2229 // Leave untouched the starting instruction, any Phis, a CreateEx node
2230 // or Top. bb->_nodes[_bb_start] is the first schedulable instruction.
2231 _bb_end = bb->_nodes.size()-1;
2232 for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
2233 Node *n = bb->_nodes[_bb_start];
2234 // Things not matched, like Phinodes and ProjNodes don't get scheduled.
2235 // Also, MachIdealNodes do not get scheduled
2236 if( !n->is_Mach() ) continue; // Skip non-machine nodes
2237 MachNode *mach = n->as_Mach();
2238 int iop = mach->ideal_Opcode();
2239 if( iop == Op_CreateEx ) continue; // CreateEx is pinned
2240 if( iop == Op_Con ) continue; // Do not schedule Top
2241 if( iop == Op_Node && // Do not schedule PhiNodes, ProjNodes
2242 mach->pipeline() == MachNode::pipeline_class() &&
2243 !n->is_SpillCopy() ) // Breakpoints, Prolog, etc
2244 continue;
2245 break; // Funny loop structure to be sure...
2246 }
2247 // Compute last "interesting" instruction in block - last instruction we
2248 // might schedule. _bb_end points just after last schedulable inst. We
2249 // normally schedule conditional branches (despite them being forced last
2250 // in the block), because they have delay slots we can fill. Calls all
2251 // have their delay slots filled in the template expansions, so we don't
2252 // bother scheduling them.
2253 Node *last = bb->_nodes[_bb_end];
2254 if( last->is_Catch() ||
2255 (last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
2256 // There must be a prior call. Skip it.
2257 while( !bb->_nodes[--_bb_end]->is_Call() ) {
2258 assert( bb->_nodes[_bb_end]->is_Proj(), "skipping projections after expected call" );
2259 }
2260 } else if( last->is_MachNullCheck() ) {
2261 // Backup so the last null-checked memory instruction is
2262 // outside the schedulable range. Skip over the nullcheck,
2263 // projection, and the memory nodes.
2264 Node *mem = last->in(1);
2265 do {
2266 _bb_end--;
2267 } while (mem != bb->_nodes[_bb_end]);
2268 } else {
2269 // Set _bb_end to point after last schedulable inst.
2270 _bb_end++;
2271 }
2272
2273 assert( _bb_start <= _bb_end, "inverted block ends" );
2274
2275 // Compute the register antidependencies for the basic block
2276 ComputeRegisterAntidependencies(bb);
2277 if (_cfg->C->failing()) return; // too many D-U pinch points
2278
2279 // Compute intra-bb latencies for the nodes
2280 ComputeLocalLatenciesForward(bb);
2281
2282 // Compute the usage within the block, and set the list of all nodes
2283 // in the block that have no uses within the block.
2284 ComputeUseCount(bb);
2285
2286 // Schedule the remaining instructions in the block
2287 while ( _available.size() > 0 ) {
2288 Node *n = ChooseNodeToBundle();
2289 AddNodeToBundle(n,bb);
2290 }
2291
2292 assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" );
2293 #ifdef ASSERT
2294 for( uint l = _bb_start; l < _bb_end; l++ ) {
2295 Node *n = bb->_nodes[l];
2296 uint m;
2297 for( m = 0; m < _bb_end-_bb_start; m++ )
2298 if( _scheduled[m] == n )
2299 break;
2300 assert( m < _bb_end-_bb_start, "instruction missing in schedule" );
2301 }
2302 #endif
2303
2304 // Now copy the instructions (in reverse order) back to the block
2305 for ( uint k = _bb_start; k < _bb_end; k++ )
2306 bb->_nodes.map(k, _scheduled[_bb_end-k-1]);
2307
2308 #ifndef PRODUCT
2309 if (_cfg->C->trace_opto_output()) {
2310 tty->print("# Schedule BB#%03d (final)\n", i);
2311 uint current = 0;
2312 for (uint j = 0; j < bb->_nodes.size(); j++) {
2313 Node *n = bb->_nodes[j];
2314 if( valid_bundle_info(n) ) {
2315 Bundle *bundle = node_bundling(n);
2316 if (bundle->instr_count() > 0 || bundle->flags() > 0) {
2317 tty->print("*** Bundle: ");
2318 bundle->dump();
2319 }
2320 n->dump();
2321 }
2322 }
2323 }
2324 #endif
2325 #ifdef ASSERT
2326 verify_good_schedule(bb,"after block local scheduling");
2327 #endif
2328 }
2329
2330 #ifndef PRODUCT
2331 if (_cfg->C->trace_opto_output())
2332 tty->print("# <- DoScheduling\n");
2333 #endif
2334
2335 // Record final node-bundling array location
2336 _regalloc->C->set_node_bundling_base(_node_bundling_base);
2337
2338 } // end DoScheduling
2339
2340 //------------------------------verify_good_schedule---------------------------
2341 // Verify that no live-range used in the block is killed in the block by a
2342 // wrong DEF. This doesn't verify live-ranges that span blocks.
2343
2344 // Check for edge existence. Used to avoid adding redundant precedence edges.
2345 static bool edge_from_to( Node *from, Node *to ) {
2346 for( uint i=0; i<from->len(); i++ )
2347 if( from->in(i) == to )
2348 return true;
2349 return false;
2350 }
2351
2352 #ifdef ASSERT
2353 //------------------------------verify_do_def----------------------------------
2354 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
2355 // Check for bad kills
2356 if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
2357 Node *prior_use = _reg_node[def];
2358 if( prior_use && !edge_from_to(prior_use,n) ) {
2359 tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2360 n->dump();
2361 tty->print_cr("...");
2362 prior_use->dump();
2363 assert_msg(edge_from_to(prior_use,n),msg);
2364 }
2365 _reg_node.map(def,NULL); // Kill live USEs
2366 }
2367 }
2368
2369 //------------------------------verify_good_schedule---------------------------
2370 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2371
2372 // Zap to something reasonable for the verify code
2373 _reg_node.clear();
2374
2375 // Walk over the block backwards. Check to make sure each DEF doesn't
2376 // kill a live value (other than the one it's supposed to). Add each
2377 // USE to the live set.
2378 for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) {
2379 Node *n = b->_nodes[i];
2380 int n_op = n->Opcode();
2381 if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2382 // Fat-proj kills a slew of registers
2383 RegMask rm = n->out_RegMask();// Make local copy
2384 while( rm.is_NotEmpty() ) {
2385 OptoReg::Name kill = rm.find_first_elem();
2386 rm.Remove(kill);
2387 verify_do_def( n, kill, msg );
2388 }
2389 } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2390 // Get DEF'd registers the normal way
2391 verify_do_def( n, _regalloc->get_reg_first(n), msg );
2392 verify_do_def( n, _regalloc->get_reg_second(n), msg );
2393 }
2394
2395 // Now make all USEs live
2396 for( uint i=1; i<n->req(); i++ ) {
2397 Node *def = n->in(i);
2398 assert(def != 0, "input edge required");
2399 OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2400 OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2401 if( OptoReg::is_valid(reg_lo) ) {
2402 assert_msg(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg );
2403 _reg_node.map(reg_lo,n);
2404 }
2405 if( OptoReg::is_valid(reg_hi) ) {
2406 assert_msg(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg );
2407 _reg_node.map(reg_hi,n);
2408 }
2409 }
2410
2411 }
2412
2413 // Zap to something reasonable for the Antidependence code
2414 _reg_node.clear();
2415 }
2416 #endif
2417
2418 // Conditionally add precedence edges. Avoid putting edges on Projs.
2419 static void add_prec_edge_from_to( Node *from, Node *to ) {
2420 if( from->is_Proj() ) { // Put precedence edge on Proj's input
2421 assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" );
2422 from = from->in(0);
2423 }
2424 if( from != to && // No cycles (for things like LD L0,[L0+4] )
2425 !edge_from_to( from, to ) ) // Avoid duplicate edge
2426 from->add_prec(to);
2427 }
2428
2429 //------------------------------anti_do_def------------------------------------
2430 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
2431 if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
2432 return;
2433
2434 Node *pinch = _reg_node[def_reg]; // Get pinch point
2435 if( !pinch || _bbs[pinch->_idx] != b || // No pinch-point yet?
2436 is_def ) { // Check for a true def (not a kill)
2437 _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
2438 return;
2439 }
2440
2441 Node *kill = def; // Rename 'def' to more descriptive 'kill'
2442 debug_only( def = (Node*)0xdeadbeef; )
2443
2444 // After some number of kills there _may_ be a later def
2445 Node *later_def = NULL;
2446
2447 // Finding a kill requires a real pinch-point.
2448 // Check for not already having a pinch-point.
2449 // Pinch points are Op_Node's.
2450 if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point?
2451 later_def = pinch; // Must be def/kill as optimistic pinch-point
2452 if ( _pinch_free_list.size() > 0) {
2453 pinch = _pinch_free_list.pop();
2454 } else {
2455 pinch = new (_cfg->C, 1) Node(1); // Pinch point to-be
2456 }
2457 if (pinch->_idx >= _regalloc->node_regs_max_index()) {
2458 _cfg->C->record_method_not_compilable("too many D-U pinch points");
2459 return;
2460 }
2461 _bbs.map(pinch->_idx,b); // Pretend it's valid in this block (lazy init)
2462 _reg_node.map(def_reg,pinch); // Record pinch-point
2463 //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
2464 if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill
2465 pinch->init_req(0, _cfg->C->top()); // set not NULL for the next call
2466 add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
2467 later_def = NULL; // and no later def
2468 }
2469 pinch->set_req(0,later_def); // Hook later def so we can find it
2470 } else { // Else have valid pinch point
2471 if( pinch->in(0) ) // If there is a later-def
2472 later_def = pinch->in(0); // Get it
2473 }
2474
2475 // Add output-dependence edge from later def to kill
2476 if( later_def ) // If there is some original def
2477 add_prec_edge_from_to(later_def,kill); // Add edge from def to kill
2478
2479 // See if current kill is also a use, and so is forced to be the pinch-point.
2480 if( pinch->Opcode() == Op_Node ) {
2481 Node *uses = kill->is_Proj() ? kill->in(0) : kill;
2482 for( uint i=1; i<uses->req(); i++ ) {
2483 if( _regalloc->get_reg_first(uses->in(i)) == def_reg ||
2484 _regalloc->get_reg_second(uses->in(i)) == def_reg ) {
2485 // Yes, found a use/kill pinch-point
2486 pinch->set_req(0,NULL); //
2487 pinch->replace_by(kill); // Move anti-dep edges up
2488 pinch = kill;
2489 _reg_node.map(def_reg,pinch);
2490 return;
2491 }
2492 }
2493 }
2494
2495 // Add edge from kill to pinch-point
2496 add_prec_edge_from_to(kill,pinch);
2497 }
2498
2499 //------------------------------anti_do_use------------------------------------
2500 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
2501 if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
2502 return;
2503 Node *pinch = _reg_node[use_reg]; // Get pinch point
2504 // Check for no later def_reg/kill in block
2505 if( pinch && _bbs[pinch->_idx] == b &&
2506 // Use has to be block-local as well
2507 _bbs[use->_idx] == b ) {
2508 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
2509 pinch->req() == 1 ) { // pinch not yet in block?
2510 pinch->del_req(0); // yank pointer to later-def, also set flag
2511 // Insert the pinch-point in the block just after the last use
2512 b->_nodes.insert(b->find_node(use)+1,pinch);
2513 _bb_end++; // Increase size scheduled region in block
2514 }
2515
2516 add_prec_edge_from_to(pinch,use);
2517 }
2518 }
2519
2520 //------------------------------ComputeRegisterAntidependences-----------------
2521 // We insert antidependences between the reads and following write of
2522 // allocated registers to prevent illegal code motion. Hopefully, the
2523 // number of added references should be fairly small, especially as we
2524 // are only adding references within the current basic block.
2525 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
2526
2527 #ifdef ASSERT
2528 verify_good_schedule(b,"before block local scheduling");
2529 #endif
2530
2531 // A valid schedule, for each register independently, is an endless cycle
2532 // of: a def, then some uses (connected to the def by true dependencies),
2533 // then some kills (defs with no uses), finally the cycle repeats with a new
2534 // def. The uses are allowed to float relative to each other, as are the
2535 // kills. No use is allowed to slide past a kill (or def). This requires
2536 // antidependencies between all uses of a single def and all kills that
2537 // follow, up to the next def. More edges are redundant, because later defs
2538 // & kills are already serialized with true or antidependencies. To keep
2539 // the edge count down, we add a 'pinch point' node if there's more than
2540 // one use or more than one kill/def.
2541
2542 // We add dependencies in one bottom-up pass.
2543
2544 // For each instruction we handle it's DEFs/KILLs, then it's USEs.
2545
2546 // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this
2547 // register. If not, we record the DEF/KILL in _reg_node, the
2548 // register-to-def mapping. If there is a prior DEF/KILL, we insert a
2549 // "pinch point", a new Node that's in the graph but not in the block.
2550 // We put edges from the prior and current DEF/KILLs to the pinch point.
2551 // We put the pinch point in _reg_node. If there's already a pinch point
2552 // we merely add an edge from the current DEF/KILL to the pinch point.
2553
2554 // After doing the DEF/KILLs, we handle USEs. For each used register, we
2555 // put an edge from the pinch point to the USE.
2556
2557 // To be expedient, the _reg_node array is pre-allocated for the whole
2558 // compilation. _reg_node is lazily initialized; it either contains a NULL,
2559 // or a valid def/kill/pinch-point, or a leftover node from some prior
2560 // block. Leftover node from some prior block is treated like a NULL (no
2561 // prior def, so no anti-dependence needed). Valid def is distinguished by
2562 // it being in the current block.
2563 bool fat_proj_seen = false;
2564 uint last_safept = _bb_end-1;
2565 Node* end_node = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL;
2566 Node* last_safept_node = end_node;
2567 for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
2568 Node *n = b->_nodes[i];
2569 int is_def = n->outcnt(); // def if some uses prior to adding precedence edges
2570 if( n->Opcode() == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2571 // Fat-proj kills a slew of registers
2572 // This can add edges to 'n' and obscure whether or not it was a def,
2573 // hence the is_def flag.
2574 fat_proj_seen = true;
2575 RegMask rm = n->out_RegMask();// Make local copy
2576 while( rm.is_NotEmpty() ) {
2577 OptoReg::Name kill = rm.find_first_elem();
2578 rm.Remove(kill);
2579 anti_do_def( b, n, kill, is_def );
2580 }
2581 } else {
2582 // Get DEF'd registers the normal way
2583 anti_do_def( b, n, _regalloc->get_reg_first(n), is_def );
2584 anti_do_def( b, n, _regalloc->get_reg_second(n), is_def );
2585 }
2586
2587 // Check each register used by this instruction for a following DEF/KILL
2588 // that must occur afterward and requires an anti-dependence edge.
2589 for( uint j=0; j<n->req(); j++ ) {
2590 Node *def = n->in(j);
2591 if( def ) {
2592 assert( def->Opcode() != Op_MachProj || def->ideal_reg() != MachProjNode::fat_proj, "" );
2593 anti_do_use( b, n, _regalloc->get_reg_first(def) );
2594 anti_do_use( b, n, _regalloc->get_reg_second(def) );
2595 }
2596 }
2597 // Do not allow defs of new derived values to float above GC
2598 // points unless the base is definitely available at the GC point.
2599
2600 Node *m = b->_nodes[i];
2601
2602 // Add precedence edge from following safepoint to use of derived pointer
2603 if( last_safept_node != end_node &&
2604 m != last_safept_node) {
2605 for (uint k = 1; k < m->req(); k++) {
2606 const Type *t = m->in(k)->bottom_type();
2607 if( t->isa_oop_ptr() &&
2608 t->is_ptr()->offset() != 0 ) {
2609 last_safept_node->add_prec( m );
2610 break;
2611 }
2612 }
2613 }
2614
2615 if( n->jvms() ) { // Precedence edge from derived to safept
2616 // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
2617 if( b->_nodes[last_safept] != last_safept_node ) {
2618 last_safept = b->find_node(last_safept_node);
2619 }
2620 for( uint j=last_safept; j > i; j-- ) {
2621 Node *mach = b->_nodes[j];
2622 if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
2623 mach->add_prec( n );
2624 }
2625 last_safept = i;
2626 last_safept_node = m;
2627 }
2628 }
2629
2630 if (fat_proj_seen) {
2631 // Garbage collect pinch nodes that were not consumed.
2632 // They are usually created by a fat kill MachProj for a call.
2633 garbage_collect_pinch_nodes();
2634 }
2635 }
2636
2637 //------------------------------garbage_collect_pinch_nodes-------------------------------
2638
2639 // Garbage collect pinch nodes for reuse by other blocks.
2640 //
2641 // The block scheduler's insertion of anti-dependence
2642 // edges creates many pinch nodes when the block contains
2643 // 2 or more Calls. A pinch node is used to prevent a
2644 // combinatorial explosion of edges. If a set of kills for a
2645 // register is anti-dependent on a set of uses (or defs), rather
2646 // than adding an edge in the graph between each pair of kill
2647 // and use (or def), a pinch is inserted between them:
2648 //
2649 // use1 use2 use3
2650 // \ | /
2651 // \ | /
2652 // pinch
2653 // / | \
2654 // / | \
2655 // kill1 kill2 kill3
2656 //
2657 // One pinch node is created per register killed when
2658 // the second call is encountered during a backwards pass
2659 // over the block. Most of these pinch nodes are never
2660 // wired into the graph because the register is never
2661 // used or def'ed in the block.
2662 //
2663 void Scheduling::garbage_collect_pinch_nodes() {
2664 #ifndef PRODUCT
2665 if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
2666 #endif
2667 int trace_cnt = 0;
2668 for (uint k = 0; k < _reg_node.Size(); k++) {
2669 Node* pinch = _reg_node[k];
2670 if (pinch != NULL && pinch->Opcode() == Op_Node &&
2671 // no predecence input edges
2672 (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
2673 cleanup_pinch(pinch);
2674 _pinch_free_list.push(pinch);
2675 _reg_node.map(k, NULL);
2676 #ifndef PRODUCT
2677 if (_cfg->C->trace_opto_output()) {
2678 trace_cnt++;
2679 if (trace_cnt > 40) {
2680 tty->print("\n");
2681 trace_cnt = 0;
2682 }
2683 tty->print(" %d", pinch->_idx);
2684 }
2685 #endif
2686 }
2687 }
2688 #ifndef PRODUCT
2689 if (_cfg->C->trace_opto_output()) tty->print("\n");
2690 #endif
2691 }
2692
2693 // Clean up a pinch node for reuse.
2694 void Scheduling::cleanup_pinch( Node *pinch ) {
2695 assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking");
2696
2697 for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) {
2698 Node* use = pinch->last_out(i);
2699 uint uses_found = 0;
2700 for (uint j = use->req(); j < use->len(); j++) {
2701 if (use->in(j) == pinch) {
2702 use->rm_prec(j);
2703 uses_found++;
2704 }
2705 }
2706 assert(uses_found > 0, "must be a precedence edge");
2707 i -= uses_found; // we deleted 1 or more copies of this edge
2708 }
2709 // May have a later_def entry
2710 pinch->set_req(0, NULL);
2711 }
2712
2713 //------------------------------print_statistics-------------------------------
2714 #ifndef PRODUCT
2715
2716 void Scheduling::dump_available() const {
2717 tty->print("#Availist ");
2718 for (uint i = 0; i < _available.size(); i++)
2719 tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]);
2720 tty->cr();
2721 }
2722
2723 // Print Scheduling Statistics
2724 void Scheduling::print_statistics() {
2725 // Print the size added by nops for bundling
2726 tty->print("Nops added %d bytes to total of %d bytes",
2727 _total_nop_size, _total_method_size);
2728 if (_total_method_size > 0)
2729 tty->print(", for %.2f%%",
2730 ((double)_total_nop_size) / ((double) _total_method_size) * 100.0);
2731 tty->print("\n");
2732
2733 // Print the number of branch shadows filled
2734 if (Pipeline::_branch_has_delay_slot) {
2735 tty->print("Of %d branches, %d had unconditional delay slots filled",
2736 _total_branches, _total_unconditional_delays);
2737 if (_total_branches > 0)
2738 tty->print(", for %.2f%%",
2739 ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0);
2740 tty->print("\n");
2741 }
2742
2743 uint total_instructions = 0, total_bundles = 0;
2744
2745 for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) {
2746 uint bundle_count = _total_instructions_per_bundle[i];
2747 total_instructions += bundle_count * i;
2748 total_bundles += bundle_count;
2749 }
2750
2751 if (total_bundles > 0)
2752 tty->print("Average ILP (excluding nops) is %.2f\n",
2753 ((double)total_instructions) / ((double)total_bundles));
2754 }
2755 #endif