1 /*
2 * Copyright 1998-2007 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 #include "incls/_precompiled.incl"
26 #include "incls/_output.cpp.incl"
27
28 extern uint size_java_to_interp();
29 extern uint reloc_java_to_interp();
30 extern uint size_exception_handler();
31 extern uint size_deopt_handler();
32
33 #ifndef PRODUCT
34 #define DEBUG_ARG(x) , x
35 #else
36 #define DEBUG_ARG(x)
37 #endif
38
39 extern int emit_exception_handler(CodeBuffer &cbuf);
40 extern int emit_deopt_handler(CodeBuffer &cbuf);
41
42 //------------------------------Output-----------------------------------------
43 // Convert Nodes to instruction bits and pass off to the VM
44 void Compile::Output() {
45 // RootNode goes
46 assert( _cfg->_broot->_nodes.size() == 0, "" );
47
48 // Initialize the space for the BufferBlob used to find and verify
49 // instruction size in MachNode::emit_size()
50 init_scratch_buffer_blob();
51 if (failing()) return; // Out of memory
52
53 // Make sure I can find the Start Node
54 Block_Array& bbs = _cfg->_bbs;
55 Block *entry = _cfg->_blocks[1];
56 Block *broot = _cfg->_broot;
57
58 const StartNode *start = entry->_nodes[0]->as_Start();
59
60 // Replace StartNode with prolog
61 MachPrologNode *prolog = new (this) MachPrologNode();
62 entry->_nodes.map( 0, prolog );
63 bbs.map( prolog->_idx, entry );
64 bbs.map( start->_idx, NULL ); // start is no longer in any block
65
66 // Virtual methods need an unverified entry point
67
68 if( is_osr_compilation() ) {
69 if( PoisonOSREntry ) {
70 // TODO: Should use a ShouldNotReachHereNode...
71 _cfg->insert( broot, 0, new (this) MachBreakpointNode() );
72 }
73 } else {
74 if( _method && !_method->flags().is_static() ) {
75 // Insert unvalidated entry point
76 _cfg->insert( broot, 0, new (this) MachUEPNode() );
77 }
78
79 }
80
81
82 // Break before main entry point
83 if( (_method && _method->break_at_execute())
84 #ifndef PRODUCT
85 ||(OptoBreakpoint && is_method_compilation())
86 ||(OptoBreakpointOSR && is_osr_compilation())
87 ||(OptoBreakpointC2R && !_method)
88 #endif
89 ) {
90 // checking for _method means that OptoBreakpoint does not apply to
91 // runtime stubs or frame converters
92 _cfg->insert( entry, 1, new (this) MachBreakpointNode() );
93 }
94
95 // Insert epilogs before every return
96 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
97 Block *b = _cfg->_blocks[i];
98 if( !b->is_connector() && b->non_connector_successor(0) == _cfg->_broot ) { // Found a program exit point?
99 Node *m = b->end();
100 if( m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt ) {
101 MachEpilogNode *epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
102 b->add_inst( epilog );
103 bbs.map(epilog->_idx, b);
104 //_regalloc->set_bad(epilog->_idx); // Already initialized this way.
105 }
106 }
107 }
108
109 # ifdef ENABLE_ZAP_DEAD_LOCALS
110 if ( ZapDeadCompiledLocals ) Insert_zap_nodes();
111 # endif
112
113 ScheduleAndBundle();
114
115 #ifndef PRODUCT
116 if (trace_opto_output()) {
117 tty->print("\n---- After ScheduleAndBundle ----\n");
118 for (uint i = 0; i < _cfg->_num_blocks; i++) {
119 tty->print("\nBB#%03d:\n", i);
120 Block *bb = _cfg->_blocks[i];
121 for (uint j = 0; j < bb->_nodes.size(); j++) {
122 Node *n = bb->_nodes[j];
123 OptoReg::Name reg = _regalloc->get_reg_first(n);
124 tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
125 n->dump();
126 }
127 }
128 }
129 #endif
130
131 if (failing()) return;
132
133 BuildOopMaps();
134
135 if (failing()) return;
136
137 Fill_buffer();
138 }
139
140 bool Compile::need_stack_bang(int frame_size_in_bytes) const {
141 // Determine if we need to generate a stack overflow check.
142 // Do it if the method is not a stub function and
143 // has java calls or has frame size > vm_page_size/8.
144 return (stub_function() == NULL &&
145 (has_java_calls() || frame_size_in_bytes > os::vm_page_size()>>3));
146 }
147
148 bool Compile::need_register_stack_bang() const {
149 // Determine if we need to generate a register stack overflow check.
150 // This is only used on architectures which have split register
151 // and memory stacks (ie. IA64).
152 // Bang if the method is not a stub function and has java calls
153 return (stub_function() == NULL && has_java_calls());
154 }
155
156 # ifdef ENABLE_ZAP_DEAD_LOCALS
157
158
159 // In order to catch compiler oop-map bugs, we have implemented
160 // a debugging mode called ZapDeadCompilerLocals.
161 // This mode causes the compiler to insert a call to a runtime routine,
162 // "zap_dead_locals", right before each place in compiled code
163 // that could potentially be a gc-point (i.e., a safepoint or oop map point).
164 // The runtime routine checks that locations mapped as oops are really
165 // oops, that locations mapped as values do not look like oops,
166 // and that locations mapped as dead are not used later
167 // (by zapping them to an invalid address).
168
169 int Compile::_CompiledZap_count = 0;
170
171 void Compile::Insert_zap_nodes() {
172 bool skip = false;
173
174
175 // Dink with static counts because code code without the extra
176 // runtime calls is MUCH faster for debugging purposes
177
178 if ( CompileZapFirst == 0 ) ; // nothing special
179 else if ( CompileZapFirst > CompiledZap_count() ) skip = true;
180 else if ( CompileZapFirst == CompiledZap_count() )
181 warning("starting zap compilation after skipping");
182
183 if ( CompileZapLast == -1 ) ; // nothing special
184 else if ( CompileZapLast < CompiledZap_count() ) skip = true;
185 else if ( CompileZapLast == CompiledZap_count() )
186 warning("about to compile last zap");
187
188 ++_CompiledZap_count; // counts skipped zaps, too
189
190 if ( skip ) return;
191
192
193 if ( _method == NULL )
194 return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care
195
196 // Insert call to zap runtime stub before every node with an oop map
197 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
198 Block *b = _cfg->_blocks[i];
199 for ( uint j = 0; j < b->_nodes.size(); ++j ) {
200 Node *n = b->_nodes[j];
201
202 // Determining if we should insert a zap-a-lot node in output.
203 // We do that for all nodes that has oopmap info, except for calls
204 // to allocation. Calls to allocation passes in the old top-of-eden pointer
205 // and expect the C code to reset it. Hence, there can be no safepoints between
206 // the inlined-allocation and the call to new_Java, etc.
207 // We also cannot zap monitor calls, as they must hold the microlock
208 // during the call to Zap, which also wants to grab the microlock.
209 bool insert = n->is_MachSafePoint() && (n->as_MachSafePoint()->oop_map() != NULL);
210 if ( insert ) { // it is MachSafePoint
211 if ( !n->is_MachCall() ) {
212 insert = false;
213 } else if ( n->is_MachCall() ) {
214 MachCallNode* call = n->as_MachCall();
215 if (call->entry_point() == OptoRuntime::new_instance_Java() ||
216 call->entry_point() == OptoRuntime::new_array_Java() ||
217 call->entry_point() == OptoRuntime::multianewarray2_Java() ||
218 call->entry_point() == OptoRuntime::multianewarray3_Java() ||
219 call->entry_point() == OptoRuntime::multianewarray4_Java() ||
220 call->entry_point() == OptoRuntime::multianewarray5_Java() ||
221 call->entry_point() == OptoRuntime::slow_arraycopy_Java() ||
222 call->entry_point() == OptoRuntime::complete_monitor_locking_Java()
223 ) {
224 insert = false;
225 }
226 }
227 if (insert) {
228 Node *zap = call_zap_node(n->as_MachSafePoint(), i);
229 b->_nodes.insert( j, zap );
230 _cfg->_bbs.map( zap->_idx, b );
231 ++j;
232 }
233 }
234 }
235 }
236 }
237
238
239 Node* Compile::call_zap_node(MachSafePointNode* node_to_check, int block_no) {
240 const TypeFunc *tf = OptoRuntime::zap_dead_locals_Type();
241 CallStaticJavaNode* ideal_node =
242 new (this, tf->domain()->cnt()) CallStaticJavaNode( tf,
243 OptoRuntime::zap_dead_locals_stub(_method->flags().is_native()),
244 "call zap dead locals stub", 0, TypePtr::BOTTOM);
245 // We need to copy the OopMap from the site we're zapping at.
246 // We have to make a copy, because the zap site might not be
247 // a call site, and zap_dead is a call site.
248 OopMap* clone = node_to_check->oop_map()->deep_copy();
249
250 // Add the cloned OopMap to the zap node
251 ideal_node->set_oop_map(clone);
252 return _matcher->match_sfpt(ideal_node);
253 }
254
255 //------------------------------is_node_getting_a_safepoint--------------------
256 bool Compile::is_node_getting_a_safepoint( Node* n) {
257 // This code duplicates the logic prior to the call of add_safepoint
258 // below in this file.
259 if( n->is_MachSafePoint() ) return true;
260 return false;
261 }
262
263 # endif // ENABLE_ZAP_DEAD_LOCALS
264
265 //------------------------------compute_loop_first_inst_sizes------------------
266 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
267 // of a loop. When aligning a loop we need to provide enough instructions
268 // in cpu's fetch buffer to feed decoders. The loop alignment could be
269 // avoided if we have enough instructions in fetch buffer at the head of a loop.
270 // By default, the size is set to 999999 by Block's constructor so that
271 // a loop will be aligned if the size is not reset here.
272 //
273 // Note: Mach instructions could contain several HW instructions
274 // so the size is estimated only.
275 //
276 void Compile::compute_loop_first_inst_sizes() {
277 // The next condition is used to gate the loop alignment optimization.
278 // Don't aligned a loop if there are enough instructions at the head of a loop
279 // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad
280 // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is
281 // equal to 11 bytes which is the largest address NOP instruction.
282 if( MaxLoopPad < OptoLoopAlignment-1 ) {
283 uint last_block = _cfg->_num_blocks-1;
284 for( uint i=1; i <= last_block; i++ ) {
285 Block *b = _cfg->_blocks[i];
286 // Check the first loop's block which requires an alignment.
287 if( b->head()->is_Loop() &&
288 b->code_alignment() > (uint)relocInfo::addr_unit() ) {
289 uint sum_size = 0;
290 uint inst_cnt = NumberOfLoopInstrToAlign;
291 inst_cnt = b->compute_first_inst_size(sum_size, inst_cnt,
292 _regalloc);
293 // Check the next fallthrough block if first loop's block does not have
294 // enough instructions.
295 if( inst_cnt > 0 && i < last_block ) {
296 // First, check if the first loop's block contains whole loop.
297 // LoopNode::LoopBackControl == 2.
298 Block *bx = _cfg->_bbs[b->pred(2)->_idx];
299 // Skip connector blocks (with limit in case of irreducible loops).
300 int search_limit = 16;
301 while( bx->is_connector() && search_limit-- > 0) {
302 bx = _cfg->_bbs[bx->pred(1)->_idx];
303 }
304 if( bx != b ) { // loop body is in several blocks.
305 Block *nb = NULL;
306 while( inst_cnt > 0 && i < last_block && nb != bx &&
307 !_cfg->_blocks[i+1]->head()->is_Loop() ) {
308 i++;
309 nb = _cfg->_blocks[i];
310 inst_cnt = nb->compute_first_inst_size(sum_size, inst_cnt,
311 _regalloc);
312 } // while( inst_cnt > 0 && i < last_block )
313 } // if( bx != b )
314 } // if( inst_cnt > 0 && i < last_block )
315 b->set_first_inst_size(sum_size);
316 } // f( b->head()->is_Loop() )
317 } // for( i <= last_block )
318 } // if( MaxLoopPad < OptoLoopAlignment-1 )
319 }
320
321 //----------------------Shorten_branches---------------------------------------
322 // The architecture description provides short branch variants for some long
323 // branch instructions. Replace eligible long branches with short branches.
324 void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, int& stub_size, int& const_size) {
325
326 // fill in the nop array for bundling computations
327 MachNode *_nop_list[Bundle::_nop_count];
328 Bundle::initialize_nops(_nop_list, this);
329
330 // ------------------
331 // Compute size of each block, method size, and relocation information size
332 uint *jmp_end = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks);
333 uint *blk_starts = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks+1);
334 DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
335 blk_starts[0] = 0;
336
337 // Initialize the sizes to 0
338 code_size = 0; // Size in bytes of generated code
339 stub_size = 0; // Size in bytes of all stub entries
340 // Size in bytes of all relocation entries, including those in local stubs.
341 // Start with 2-bytes of reloc info for the unvalidated entry point
342 reloc_size = 1; // Number of relocation entries
343 const_size = 0; // size of fp constants in words
344
345 // Make three passes. The first computes pessimistic blk_starts,
346 // relative jmp_end, reloc_size and const_size information.
347 // The second performs short branch substitution using the pessimistic
348 // sizing. The third inserts nops where needed.
349
350 Node *nj; // tmp
351
352 // Step one, perform a pessimistic sizing pass.
353 uint i;
354 uint min_offset_from_last_call = 1; // init to a positive value
355 uint nop_size = (new (this) MachNopNode())->size(_regalloc);
356 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
357 Block *b = _cfg->_blocks[i];
358
359 // Sum all instruction sizes to compute block size
360 uint last_inst = b->_nodes.size();
361 uint blk_size = 0;
362 for( uint j = 0; j<last_inst; j++ ) {
363 nj = b->_nodes[j];
364 uint inst_size = nj->size(_regalloc);
365 blk_size += inst_size;
366 // Handle machine instruction nodes
367 if( nj->is_Mach() ) {
368 MachNode *mach = nj->as_Mach();
369 blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding
370 reloc_size += mach->reloc();
371 const_size += mach->const_size();
372 if( mach->is_MachCall() ) {
373 MachCallNode *mcall = mach->as_MachCall();
374 // This destination address is NOT PC-relative
375
376 mcall->method_set((intptr_t)mcall->entry_point());
377
378 if( mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method ) {
379 stub_size += size_java_to_interp();
380 reloc_size += reloc_java_to_interp();
381 }
382 } else if (mach->is_MachSafePoint()) {
383 // If call/safepoint are adjacent, account for possible
384 // nop to disambiguate the two safepoints.
385 if (min_offset_from_last_call == 0) {
386 blk_size += nop_size;
387 }
388 }
389 }
390 min_offset_from_last_call += inst_size;
391 // Remember end of call offset
392 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
393 min_offset_from_last_call = 0;
394 }
395 }
396
397 // During short branch replacement, we store the relative (to blk_starts)
398 // end of jump in jmp_end, rather than the absolute end of jump. This
399 // is so that we do not need to recompute sizes of all nodes when we compute
400 // correct blk_starts in our next sizing pass.
401 jmp_end[i] = blk_size;
402 DEBUG_ONLY( jmp_target[i] = 0; )
403
404 // When the next block starts a loop, we may insert pad NOP
405 // instructions. Since we cannot know our future alignment,
406 // assume the worst.
407 if( i<_cfg->_num_blocks-1 ) {
408 Block *nb = _cfg->_blocks[i+1];
409 int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit();
410 if( max_loop_pad > 0 ) {
411 assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), "");
412 blk_size += max_loop_pad;
413 }
414 }
415
416 // Save block size; update total method size
417 blk_starts[i+1] = blk_starts[i]+blk_size;
418 }
419
420 // Step two, replace eligible long jumps.
421
422 // Note: this will only get the long branches within short branch
423 // range. Another pass might detect more branches that became
424 // candidates because the shortening in the first pass exposed
425 // more opportunities. Unfortunately, this would require
426 // recomputing the starting and ending positions for the blocks
427 for( i=0; i<_cfg->_num_blocks; i++ ) {
428 Block *b = _cfg->_blocks[i];
429
430 int j;
431 // Find the branch; ignore trailing NOPs.
432 for( j = b->_nodes.size()-1; j>=0; j-- ) {
433 nj = b->_nodes[j];
434 if( !nj->is_Mach() || nj->as_Mach()->ideal_Opcode() != Op_Con )
435 break;
436 }
437
438 if (j >= 0) {
439 if( nj->is_Mach() && nj->as_Mach()->may_be_short_branch() ) {
440 MachNode *mach = nj->as_Mach();
441 // This requires the TRUE branch target be in succs[0]
442 uint bnum = b->non_connector_successor(0)->_pre_order;
443 uintptr_t target = blk_starts[bnum];
444 if( mach->is_pc_relative() ) {
445 int offset = target-(blk_starts[i] + jmp_end[i]);
446 if (_matcher->is_short_branch_offset(offset)) {
447 // We've got a winner. Replace this branch.
448 MachNode *replacement = mach->short_branch_version(this);
449 b->_nodes.map(j, replacement);
450
451 // Update the jmp_end size to save time in our
452 // next pass.
453 jmp_end[i] -= (mach->size(_regalloc) - replacement->size(_regalloc));
454 DEBUG_ONLY( jmp_target[i] = bnum; );
455 }
456 } else {
457 #ifndef PRODUCT
458 mach->dump(3);
459 #endif
460 Unimplemented();
461 }
462 }
463 }
464 }
465
466 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
467 // of a loop. It is used to determine the padding for loop alignment.
468 compute_loop_first_inst_sizes();
469
470 // Step 3, compute the offsets of all the labels
471 uint last_call_adr = max_uint;
472 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
473 // copy the offset of the beginning to the corresponding label
474 assert(labels[i].is_unused(), "cannot patch at this point");
475 labels[i].bind_loc(blk_starts[i], CodeBuffer::SECT_INSTS);
476
477 // insert padding for any instructions that need it
478 Block *b = _cfg->_blocks[i];
479 uint last_inst = b->_nodes.size();
480 uint adr = blk_starts[i];
481 for( uint j = 0; j<last_inst; j++ ) {
482 nj = b->_nodes[j];
483 if( nj->is_Mach() ) {
484 int padding = nj->as_Mach()->compute_padding(adr);
485 // If call/safepoint are adjacent insert a nop (5010568)
486 if (padding == 0 && nj->is_MachSafePoint() && !nj->is_MachCall() &&
487 adr == last_call_adr ) {
488 padding = nop_size;
489 }
490 if(padding > 0) {
491 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
492 int nops_cnt = padding / nop_size;
493 MachNode *nop = new (this) MachNopNode(nops_cnt);
494 b->_nodes.insert(j++, nop);
495 _cfg->_bbs.map( nop->_idx, b );
496 adr += padding;
497 last_inst++;
498 }
499 }
500 adr += nj->size(_regalloc);
501
502 // Remember end of call offset
503 if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
504 last_call_adr = adr;
505 }
506 }
507
508 if ( i != _cfg->_num_blocks-1) {
509 // Get the size of the block
510 uint blk_size = adr - blk_starts[i];
511
512 // When the next block starts a loop, we may insert pad NOP
513 // instructions.
514 Block *nb = _cfg->_blocks[i+1];
515 int current_offset = blk_starts[i] + blk_size;
516 current_offset += nb->alignment_padding(current_offset);
517 // Save block size; update total method size
518 blk_starts[i+1] = current_offset;
519 }
520 }
521
522 #ifdef ASSERT
523 for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
524 if( jmp_target[i] != 0 ) {
525 int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_end[i]);
526 if (!_matcher->is_short_branch_offset(offset)) {
527 tty->print_cr("target (%d) - jmp_end(%d) = offset (%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_end[i], offset, i, jmp_target[i]);
528 }
529 assert(_matcher->is_short_branch_offset(offset), "Displacement too large for short jmp");
530 }
531 }
532 #endif
533
534 // ------------------
535 // Compute size for code buffer
536 code_size = blk_starts[i-1] + jmp_end[i-1];
537
538 // Relocation records
539 reloc_size += 1; // Relo entry for exception handler
540
541 // Adjust reloc_size to number of record of relocation info
542 // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for
543 // a relocation index.
544 // The CodeBuffer will expand the locs array if this estimate is too low.
545 reloc_size *= 10 / sizeof(relocInfo);
546
547 // Adjust const_size to number of bytes
548 const_size *= 2*jintSize; // both float and double take two words per entry
549
550 }
551
552 //------------------------------FillLocArray-----------------------------------
553 // Create a bit of debug info and append it to the array. The mapping is from
554 // Java local or expression stack to constant, register or stack-slot. For
555 // doubles, insert 2 mappings and return 1 (to tell the caller that the next
556 // entry has been taken care of and caller should skip it).
557 static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) {
558 // This should never have accepted Bad before
559 assert(OptoReg::is_valid(regnum), "location must be valid");
560 return (OptoReg::is_reg(regnum))
561 ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) )
562 : new LocationValue(Location::new_stk_loc(l_type, ra->reg2offset(regnum)));
563 }
564
565
566 ObjectValue*
567 Compile::sv_for_node_id(GrowableArray<ScopeValue*> *objs, int id) {
568 for (int i = 0; i < objs->length(); i++) {
569 assert(objs->at(i)->is_object(), "corrupt object cache");
570 ObjectValue* sv = (ObjectValue*) objs->at(i);
571 if (sv->id() == id) {
572 return sv;
573 }
574 }
575 // Otherwise..
576 return NULL;
577 }
578
579 void Compile::set_sv_for_object_node(GrowableArray<ScopeValue*> *objs,
580 ObjectValue* sv ) {
581 assert(sv_for_node_id(objs, sv->id()) == NULL, "Precondition");
582 objs->append(sv);
583 }
584
585
586 void Compile::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local,
587 GrowableArray<ScopeValue*> *array,
588 GrowableArray<ScopeValue*> *objs ) {
589 assert( local, "use _top instead of null" );
590 if (array->length() != idx) {
591 assert(array->length() == idx + 1, "Unexpected array count");
592 // Old functionality:
593 // return
594 // New functionality:
595 // Assert if the local is not top. In product mode let the new node
596 // override the old entry.
597 assert(local == top(), "LocArray collision");
598 if (local == top()) {
599 return;
600 }
601 array->pop();
602 }
603 const Type *t = local->bottom_type();
604
605 // Is it a safepoint scalar object node?
606 if (local->is_SafePointScalarObject()) {
607 SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject();
608
609 ObjectValue* sv = Compile::sv_for_node_id(objs, spobj->_idx);
610 if (sv == NULL) {
611 ciKlass* cik = t->is_oopptr()->klass();
612 assert(cik->is_instance_klass() ||
613 cik->is_array_klass(), "Not supported allocation.");
614 sv = new ObjectValue(spobj->_idx,
615 new ConstantOopWriteValue(cik->encoding()));
616 Compile::set_sv_for_object_node(objs, sv);
617
618 uint first_ind = spobj->first_index();
619 for (uint i = 0; i < spobj->n_fields(); i++) {
620 Node* fld_node = sfpt->in(first_ind+i);
621 (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs);
622 }
623 }
624 array->append(sv);
625 return;
626 }
627
628 // Grab the register number for the local
629 OptoReg::Name regnum = _regalloc->get_reg_first(local);
630 if( OptoReg::is_valid(regnum) ) {// Got a register/stack?
631 // Record the double as two float registers.
632 // The register mask for such a value always specifies two adjacent
633 // float registers, with the lower register number even.
634 // Normally, the allocation of high and low words to these registers
635 // is irrelevant, because nearly all operations on register pairs
636 // (e.g., StoreD) treat them as a single unit.
637 // Here, we assume in addition that the words in these two registers
638 // stored "naturally" (by operations like StoreD and double stores
639 // within the interpreter) such that the lower-numbered register
640 // is written to the lower memory address. This may seem like
641 // a machine dependency, but it is not--it is a requirement on
642 // the author of the <arch>.ad file to ensure that, for every
643 // even/odd double-register pair to which a double may be allocated,
644 // the word in the even single-register is stored to the first
645 // memory word. (Note that register numbers are completely
646 // arbitrary, and are not tied to any machine-level encodings.)
647 #ifdef _LP64
648 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) {
649 array->append(new ConstantIntValue(0));
650 array->append(new_loc_value( _regalloc, regnum, Location::dbl ));
651 } else if ( t->base() == Type::Long ) {
652 array->append(new ConstantIntValue(0));
653 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
654 } else if ( t->base() == Type::RawPtr ) {
655 // jsr/ret return address which must be restored into a the full
656 // width 64-bit stack slot.
657 array->append(new_loc_value( _regalloc, regnum, Location::lng ));
658 }
659 #else //_LP64
660 #ifdef SPARC
661 if (t->base() == Type::Long && OptoReg::is_reg(regnum)) {
662 // For SPARC we have to swap high and low words for
663 // long values stored in a single-register (g0-g7).
664 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
665 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
666 } else
667 #endif //SPARC
668 if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) {
669 // Repack the double/long as two jints.
670 // The convention the interpreter uses is that the second local
671 // holds the first raw word of the native double representation.
672 // This is actually reasonable, since locals and stack arrays
673 // grow downwards in all implementations.
674 // (If, on some machine, the interpreter's Java locals or stack
675 // were to grow upwards, the embedded doubles would be word-swapped.)
676 array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
677 array->append(new_loc_value( _regalloc, regnum , Location::normal ));
678 }
679 #endif //_LP64
680 else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) &&
681 OptoReg::is_reg(regnum) ) {
682 array->append(new_loc_value( _regalloc, regnum, Matcher::float_in_double
683 ? Location::float_in_dbl : Location::normal ));
684 } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) {
685 array->append(new_loc_value( _regalloc, regnum, Matcher::int_in_long
686 ? Location::int_in_long : Location::normal ));
687 } else {
688 array->append(new_loc_value( _regalloc, regnum, _regalloc->is_oop(local) ? Location::oop : Location::normal ));
689 }
690 return;
691 }
692
693 // No register. It must be constant data.
694 switch (t->base()) {
695 case Type::Half: // Second half of a double
696 ShouldNotReachHere(); // Caller should skip 2nd halves
697 break;
698 case Type::AnyPtr:
699 array->append(new ConstantOopWriteValue(NULL));
700 break;
701 case Type::AryPtr:
702 case Type::InstPtr:
703 case Type::KlassPtr: // fall through
704 array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->encoding()));
705 break;
706 case Type::Int:
707 array->append(new ConstantIntValue(t->is_int()->get_con()));
708 break;
709 case Type::RawPtr:
710 // A return address (T_ADDRESS).
711 assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI");
712 #ifdef _LP64
713 // Must be restored to the full-width 64-bit stack slot.
714 array->append(new ConstantLongValue(t->is_ptr()->get_con()));
715 #else
716 array->append(new ConstantIntValue(t->is_ptr()->get_con()));
717 #endif
718 break;
719 case Type::FloatCon: {
720 float f = t->is_float_constant()->getf();
721 array->append(new ConstantIntValue(jint_cast(f)));
722 break;
723 }
724 case Type::DoubleCon: {
725 jdouble d = t->is_double_constant()->getd();
726 #ifdef _LP64
727 array->append(new ConstantIntValue(0));
728 array->append(new ConstantDoubleValue(d));
729 #else
730 // Repack the double as two jints.
731 // The convention the interpreter uses is that the second local
732 // holds the first raw word of the native double representation.
733 // This is actually reasonable, since locals and stack arrays
734 // grow downwards in all implementations.
735 // (If, on some machine, the interpreter's Java locals or stack
736 // were to grow upwards, the embedded doubles would be word-swapped.)
737 jint *dp = (jint*)&d;
738 array->append(new ConstantIntValue(dp[1]));
739 array->append(new ConstantIntValue(dp[0]));
740 #endif
741 break;
742 }
743 case Type::Long: {
744 jlong d = t->is_long()->get_con();
745 #ifdef _LP64
746 array->append(new ConstantIntValue(0));
747 array->append(new ConstantLongValue(d));
748 #else
749 // Repack the long as two jints.
750 // The convention the interpreter uses is that the second local
751 // holds the first raw word of the native double representation.
752 // This is actually reasonable, since locals and stack arrays
753 // grow downwards in all implementations.
754 // (If, on some machine, the interpreter's Java locals or stack
755 // were to grow upwards, the embedded doubles would be word-swapped.)
756 jint *dp = (jint*)&d;
757 array->append(new ConstantIntValue(dp[1]));
758 array->append(new ConstantIntValue(dp[0]));
759 #endif
760 break;
761 }
762 case Type::Top: // Add an illegal value here
763 array->append(new LocationValue(Location()));
764 break;
765 default:
766 ShouldNotReachHere();
767 break;
768 }
769 }
770
771 // Determine if this node starts a bundle
772 bool Compile::starts_bundle(const Node *n) const {
773 return (_node_bundling_limit > n->_idx &&
774 _node_bundling_base[n->_idx].starts_bundle());
775 }
776
777 //--------------------------Process_OopMap_Node--------------------------------
778 void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) {
779
780 // Handle special safepoint nodes for synchronization
781 MachSafePointNode *sfn = mach->as_MachSafePoint();
782 MachCallNode *mcall;
783
784 #ifdef ENABLE_ZAP_DEAD_LOCALS
785 assert( is_node_getting_a_safepoint(mach), "logic does not match; false negative");
786 #endif
787
788 int safepoint_pc_offset = current_offset;
789
790 // Add the safepoint in the DebugInfoRecorder
791 if( !mach->is_MachCall() ) {
792 mcall = NULL;
793 debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map);
794 } else {
795 mcall = mach->as_MachCall();
796 safepoint_pc_offset += mcall->ret_addr_offset();
797 debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map);
798 }
799
800 // Loop over the JVMState list to add scope information
801 // Do not skip safepoints with a NULL method, they need monitor info
802 JVMState* youngest_jvms = sfn->jvms();
803 int max_depth = youngest_jvms->depth();
804
805 // Allocate the object pool for scalar-replaced objects -- the map from
806 // small-integer keys (which can be recorded in the local and ostack
807 // arrays) to descriptions of the object state.
808 GrowableArray<ScopeValue*> *objs = new GrowableArray<ScopeValue*>();
809
810 // Visit scopes from oldest to youngest.
811 for (int depth = 1; depth <= max_depth; depth++) {
812 JVMState* jvms = youngest_jvms->of_depth(depth);
813 int idx;
814 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
815 // Safepoints that do not have method() set only provide oop-map and monitor info
816 // to support GC; these do not support deoptimization.
817 int num_locs = (method == NULL) ? 0 : jvms->loc_size();
818 int num_exps = (method == NULL) ? 0 : jvms->stk_size();
819 int num_mon = jvms->nof_monitors();
820 assert(method == NULL || jvms->bci() < 0 || num_locs == method->max_locals(),
821 "JVMS local count must match that of the method");
822
823 // Add Local and Expression Stack Information
824
825 // Insert locals into the locarray
826 GrowableArray<ScopeValue*> *locarray = new GrowableArray<ScopeValue*>(num_locs);
827 for( idx = 0; idx < num_locs; idx++ ) {
828 FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs );
829 }
830
831 // Insert expression stack entries into the exparray
832 GrowableArray<ScopeValue*> *exparray = new GrowableArray<ScopeValue*>(num_exps);
833 for( idx = 0; idx < num_exps; idx++ ) {
834 FillLocArray( idx, sfn, sfn->stack(jvms, idx), exparray, objs );
835 }
836
837 // Add in mappings of the monitors
838 assert( !method ||
839 !method->is_synchronized() ||
840 method->is_native() ||
841 num_mon > 0 ||
842 !GenerateSynchronizationCode,
843 "monitors must always exist for synchronized methods");
844
845 // Build the growable array of ScopeValues for exp stack
846 GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon);
847
848 // Loop over monitors and insert into array
849 for(idx = 0; idx < num_mon; idx++) {
850 // Grab the node that defines this monitor
851 Node* box_node;
852 Node* obj_node;
853 box_node = sfn->monitor_box(jvms, idx);
854 obj_node = sfn->monitor_obj(jvms, idx);
855
856 // Create ScopeValue for object
857 ScopeValue *scval = NULL;
858
859 if( obj_node->is_SafePointScalarObject() ) {
860 SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject();
861 scval = Compile::sv_for_node_id(objs, spobj->_idx);
862 if (scval == NULL) {
863 const Type *t = obj_node->bottom_type();
864 ciKlass* cik = t->is_oopptr()->klass();
865 assert(cik->is_instance_klass() ||
866 cik->is_array_klass(), "Not supported allocation.");
867 ObjectValue* sv = new ObjectValue(spobj->_idx,
868 new ConstantOopWriteValue(cik->encoding()));
869 Compile::set_sv_for_object_node(objs, sv);
870
871 uint first_ind = spobj->first_index();
872 for (uint i = 0; i < spobj->n_fields(); i++) {
873 Node* fld_node = sfn->in(first_ind+i);
874 (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs);
875 }
876 scval = sv;
877 }
878 } else if( !obj_node->is_Con() ) {
879 OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node);
880 scval = new_loc_value( _regalloc, obj_reg, Location::oop );
881 } else {
882 scval = new ConstantOopWriteValue(obj_node->bottom_type()->is_instptr()->const_oop()->encoding());
883 }
884
885 OptoReg::Name box_reg = BoxLockNode::stack_slot(box_node);
886 Location basic_lock = Location::new_stk_loc(Location::normal,_regalloc->reg2offset(box_reg));
887 monarray->append(new MonitorValue(scval, basic_lock, box_node->as_BoxLock()->is_eliminated()));
888 }
889
890 // We dump the object pool first, since deoptimization reads it in first.
891 debug_info()->dump_object_pool(objs);
892
893 // Build first class objects to pass to scope
894 DebugToken *locvals = debug_info()->create_scope_values(locarray);
895 DebugToken *expvals = debug_info()->create_scope_values(exparray);
896 DebugToken *monvals = debug_info()->create_monitor_values(monarray);
897
898 // Make method available for all Safepoints
899 ciMethod* scope_method = method ? method : _method;
900 // Describe the scope here
901 assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI");
902 // Now we can describe the scope.
903 debug_info()->describe_scope(safepoint_pc_offset,scope_method,jvms->bci(),locvals,expvals,monvals);
904 } // End jvms loop
905
906 // Mark the end of the scope set.
907 debug_info()->end_safepoint(safepoint_pc_offset);
908 }
909
910
911
912 // A simplified version of Process_OopMap_Node, to handle non-safepoints.
913 class NonSafepointEmitter {
914 Compile* C;
915 JVMState* _pending_jvms;
916 int _pending_offset;
917
918 void emit_non_safepoint();
919
920 public:
921 NonSafepointEmitter(Compile* compile) {
922 this->C = compile;
923 _pending_jvms = NULL;
924 _pending_offset = 0;
925 }
926
927 void observe_instruction(Node* n, int pc_offset) {
928 if (!C->debug_info()->recording_non_safepoints()) return;
929
930 Node_Notes* nn = C->node_notes_at(n->_idx);
931 if (nn == NULL || nn->jvms() == NULL) return;
932 if (_pending_jvms != NULL &&
933 _pending_jvms->same_calls_as(nn->jvms())) {
934 // Repeated JVMS? Stretch it up here.
935 _pending_offset = pc_offset;
936 } else {
937 if (_pending_jvms != NULL &&
938 _pending_offset < pc_offset) {
939 emit_non_safepoint();
940 }
941 _pending_jvms = NULL;
942 if (pc_offset > C->debug_info()->last_pc_offset()) {
943 // This is the only way _pending_jvms can become non-NULL:
944 _pending_jvms = nn->jvms();
945 _pending_offset = pc_offset;
946 }
947 }
948 }
949
950 // Stay out of the way of real safepoints:
951 void observe_safepoint(JVMState* jvms, int pc_offset) {
952 if (_pending_jvms != NULL &&
953 !_pending_jvms->same_calls_as(jvms) &&
954 _pending_offset < pc_offset) {
955 emit_non_safepoint();
956 }
957 _pending_jvms = NULL;
958 }
959
960 void flush_at_end() {
961 if (_pending_jvms != NULL) {
962 emit_non_safepoint();
963 }
964 _pending_jvms = NULL;
965 }
966 };
967
968 void NonSafepointEmitter::emit_non_safepoint() {
969 JVMState* youngest_jvms = _pending_jvms;
970 int pc_offset = _pending_offset;
971
972 // Clear it now:
973 _pending_jvms = NULL;
974
975 DebugInformationRecorder* debug_info = C->debug_info();
976 assert(debug_info->recording_non_safepoints(), "sanity");
977
978 debug_info->add_non_safepoint(pc_offset);
979 int max_depth = youngest_jvms->depth();
980
981 // Visit scopes from oldest to youngest.
982 for (int depth = 1; depth <= max_depth; depth++) {
983 JVMState* jvms = youngest_jvms->of_depth(depth);
984 ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
985 debug_info->describe_scope(pc_offset, method, jvms->bci());
986 }
987
988 // Mark the end of the scope set.
989 debug_info->end_non_safepoint(pc_offset);
990 }
991
992
993
994 // helper for Fill_buffer bailout logic
995 static void turn_off_compiler(Compile* C) {
996 if (CodeCache::unallocated_capacity() >= CodeCacheMinimumFreeSpace*10) {
997 // Do not turn off compilation if a single giant method has
998 // blown the code cache size.
999 C->record_failure("excessive request to CodeCache");
1000 } else {
1001 // Let CompilerBroker disable further compilations.
1002 C->record_failure("CodeCache is full");
1003 }
1004 }
1005
1006
1007 //------------------------------Fill_buffer------------------------------------
1008 void Compile::Fill_buffer() {
1009
1010 // Set the initially allocated size
1011 int code_req = initial_code_capacity;
1012 int locs_req = initial_locs_capacity;
1013 int stub_req = TraceJumps ? initial_stub_capacity * 10 : initial_stub_capacity;
1014 int const_req = initial_const_capacity;
1015 bool labels_not_set = true;
1016
1017 int pad_req = NativeCall::instruction_size;
1018 // The extra spacing after the code is necessary on some platforms.
1019 // Sometimes we need to patch in a jump after the last instruction,
1020 // if the nmethod has been deoptimized. (See 4932387, 4894843.)
1021
1022 uint i;
1023 // Compute the byte offset where we can store the deopt pc.
1024 if (fixed_slots() != 0) {
1025 _orig_pc_slot_offset_in_bytes = _regalloc->reg2offset(OptoReg::stack2reg(_orig_pc_slot));
1026 }
1027
1028 // Compute prolog code size
1029 _method_size = 0;
1030 _frame_slots = OptoReg::reg2stack(_matcher->_old_SP)+_regalloc->_framesize;
1031 #ifdef IA64
1032 if (save_argument_registers()) {
1033 // 4815101: this is a stub with implicit and unknown precision fp args.
1034 // The usual spill mechanism can only generate stfd's in this case, which
1035 // doesn't work if the fp reg to spill contains a single-precision denorm.
1036 // Instead, we hack around the normal spill mechanism using stfspill's and
1037 // ldffill's in the MachProlog and MachEpilog emit methods. We allocate
1038 // space here for the fp arg regs (f8-f15) we're going to thusly spill.
1039 //
1040 // If we ever implement 16-byte 'registers' == stack slots, we can
1041 // get rid of this hack and have SpillCopy generate stfspill/ldffill
1042 // instead of stfd/stfs/ldfd/ldfs.
1043 _frame_slots += 8*(16/BytesPerInt);
1044 }
1045 #endif
1046 assert( _frame_slots >= 0 && _frame_slots < 1000000, "sanity check" );
1047
1048 // Create an array of unused labels, one for each basic block
1049 Label *blk_labels = NEW_RESOURCE_ARRAY(Label, _cfg->_num_blocks+1);
1050
1051 for( i=0; i <= _cfg->_num_blocks; i++ ) {
1052 blk_labels[i].init();
1053 }
1054
1055 // If this machine supports different size branch offsets, then pre-compute
1056 // the length of the blocks
1057 if( _matcher->is_short_branch_offset(0) ) {
1058 Shorten_branches(blk_labels, code_req, locs_req, stub_req, const_req);
1059 labels_not_set = false;
1060 }
1061
1062 // nmethod and CodeBuffer count stubs & constants as part of method's code.
1063 int exception_handler_req = size_exception_handler();
1064 int deopt_handler_req = size_deopt_handler();
1065 exception_handler_req += MAX_stubs_size; // add marginal slop for handler
1066 deopt_handler_req += MAX_stubs_size; // add marginal slop for handler
1067 stub_req += MAX_stubs_size; // ensure per-stub margin
1068 code_req += MAX_inst_size; // ensure per-instruction margin
1069 if (StressCodeBuffers)
1070 code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10; // force expansion
1071 int total_req = code_req + pad_req + stub_req + exception_handler_req + deopt_handler_req + const_req;
1072 CodeBuffer* cb = code_buffer();
1073 cb->initialize(total_req, locs_req);
1074
1075 // Have we run out of code space?
1076 if (cb->blob() == NULL) {
1077 turn_off_compiler(this);
1078 return;
1079 }
1080 // Configure the code buffer.
1081 cb->initialize_consts_size(const_req);
1082 cb->initialize_stubs_size(stub_req);
1083 cb->initialize_oop_recorder(env()->oop_recorder());
1084
1085 // fill in the nop array for bundling computations
1086 MachNode *_nop_list[Bundle::_nop_count];
1087 Bundle::initialize_nops(_nop_list, this);
1088
1089 // Create oopmap set.
1090 _oop_map_set = new OopMapSet();
1091
1092 // !!!!! This preserves old handling of oopmaps for now
1093 debug_info()->set_oopmaps(_oop_map_set);
1094
1095 // Count and start of implicit null check instructions
1096 uint inct_cnt = 0;
1097 uint *inct_starts = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1098
1099 // Count and start of calls
1100 uint *call_returns = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1101
1102 uint return_offset = 0;
1103 MachNode *nop = new (this) MachNopNode();
1104
1105 int previous_offset = 0;
1106 int current_offset = 0;
1107 int last_call_offset = -1;
1108
1109 // Create an array of unused labels, one for each basic block, if printing is enabled
1110 #ifndef PRODUCT
1111 int *node_offsets = NULL;
1112 uint node_offset_limit = unique();
1113
1114
1115 if ( print_assembly() )
1116 node_offsets = NEW_RESOURCE_ARRAY(int, node_offset_limit);
1117 #endif
1118
1119 NonSafepointEmitter non_safepoints(this); // emit non-safepoints lazily
1120
1121 // ------------------
1122 // Now fill in the code buffer
1123 Node *delay_slot = NULL;
1124
1125 for( i=0; i < _cfg->_num_blocks; i++ ) {
1126 Block *b = _cfg->_blocks[i];
1127
1128 Node *head = b->head();
1129
1130 // If this block needs to start aligned (i.e, can be reached other
1131 // than by falling-thru from the previous block), then force the
1132 // start of a new bundle.
1133 if( Pipeline::requires_bundling() && starts_bundle(head) )
1134 cb->flush_bundle(true);
1135
1136 // Define the label at the beginning of the basic block
1137 if( labels_not_set )
1138 MacroAssembler(cb).bind( blk_labels[b->_pre_order] );
1139
1140 else
1141 assert( blk_labels[b->_pre_order].loc_pos() == cb->code_size(),
1142 "label position does not match code offset" );
1143
1144 uint last_inst = b->_nodes.size();
1145
1146 // Emit block normally, except for last instruction.
1147 // Emit means "dump code bits into code buffer".
1148 for( uint j = 0; j<last_inst; j++ ) {
1149
1150 // Get the node
1151 Node* n = b->_nodes[j];
1152
1153 // See if delay slots are supported
1154 if (valid_bundle_info(n) &&
1155 node_bundling(n)->used_in_unconditional_delay()) {
1156 assert(delay_slot == NULL, "no use of delay slot node");
1157 assert(n->size(_regalloc) == Pipeline::instr_unit_size(), "delay slot instruction wrong size");
1158
1159 delay_slot = n;
1160 continue;
1161 }
1162
1163 // If this starts a new instruction group, then flush the current one
1164 // (but allow split bundles)
1165 if( Pipeline::requires_bundling() && starts_bundle(n) )
1166 cb->flush_bundle(false);
1167
1168 // The following logic is duplicated in the code ifdeffed for
1169 // ENABLE_ZAP_DEAD_LOCALS which apppears above in this file. It
1170 // should be factored out. Or maybe dispersed to the nodes?
1171
1172 // Special handling for SafePoint/Call Nodes
1173 bool is_mcall = false;
1174 if( n->is_Mach() ) {
1175 MachNode *mach = n->as_Mach();
1176 is_mcall = n->is_MachCall();
1177 bool is_sfn = n->is_MachSafePoint();
1178
1179 // If this requires all previous instructions be flushed, then do so
1180 if( is_sfn || is_mcall || mach->alignment_required() != 1) {
1181 cb->flush_bundle(true);
1182 current_offset = cb->code_size();
1183 }
1184
1185 // align the instruction if necessary
1186 int nop_size = nop->size(_regalloc);
1187 int padding = mach->compute_padding(current_offset);
1188 // Make sure safepoint node for polling is distinct from a call's
1189 // return by adding a nop if needed.
1190 if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset ) {
1191 padding = nop_size;
1192 }
1193 assert( labels_not_set || padding == 0, "instruction should already be aligned")
1194
1195 if(padding > 0) {
1196 assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
1197 int nops_cnt = padding / nop_size;
1198 MachNode *nop = new (this) MachNopNode(nops_cnt);
1199 b->_nodes.insert(j++, nop);
1200 last_inst++;
1201 _cfg->_bbs.map( nop->_idx, b );
1202 nop->emit(*cb, _regalloc);
1203 cb->flush_bundle(true);
1204 current_offset = cb->code_size();
1205 }
1206
1207 // Remember the start of the last call in a basic block
1208 if (is_mcall) {
1209 MachCallNode *mcall = mach->as_MachCall();
1210
1211 // This destination address is NOT PC-relative
1212 mcall->method_set((intptr_t)mcall->entry_point());
1213
1214 // Save the return address
1215 call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset();
1216
1217 if (!mcall->is_safepoint_node()) {
1218 is_mcall = false;
1219 is_sfn = false;
1220 }
1221 }
1222
1223 // sfn will be valid whenever mcall is valid now because of inheritance
1224 if( is_sfn || is_mcall ) {
1225
1226 // Handle special safepoint nodes for synchronization
1227 if( !is_mcall ) {
1228 MachSafePointNode *sfn = mach->as_MachSafePoint();
1229 // !!!!! Stubs only need an oopmap right now, so bail out
1230 if( sfn->jvms()->method() == NULL) {
1231 // Write the oopmap directly to the code blob??!!
1232 # ifdef ENABLE_ZAP_DEAD_LOCALS
1233 assert( !is_node_getting_a_safepoint(sfn), "logic does not match; false positive");
1234 # endif
1235 continue;
1236 }
1237 } // End synchronization
1238
1239 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1240 current_offset);
1241 Process_OopMap_Node(mach, current_offset);
1242 } // End if safepoint
1243
1244 // If this is a null check, then add the start of the previous instruction to the list
1245 else if( mach->is_MachNullCheck() ) {
1246 inct_starts[inct_cnt++] = previous_offset;
1247 }
1248
1249 // If this is a branch, then fill in the label with the target BB's label
1250 else if ( mach->is_Branch() ) {
1251
1252 if ( mach->ideal_Opcode() == Op_Jump ) {
1253 for (uint h = 0; h < b->_num_succs; h++ ) {
1254 Block* succs_block = b->_succs[h];
1255 for (uint j = 1; j < succs_block->num_preds(); j++) {
1256 Node* jpn = succs_block->pred(j);
1257 if ( jpn->is_JumpProj() && jpn->in(0) == mach ) {
1258 uint block_num = succs_block->non_connector()->_pre_order;
1259 Label *blkLabel = &blk_labels[block_num];
1260 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
1261 }
1262 }
1263 }
1264 } else {
1265 // For Branchs
1266 // This requires the TRUE branch target be in succs[0]
1267 uint block_num = b->non_connector_successor(0)->_pre_order;
1268 mach->label_set( blk_labels[block_num], block_num );
1269 }
1270 }
1271
1272 #ifdef ASSERT
1273 // Check that oop-store preceeds the card-mark
1274 else if( mach->ideal_Opcode() == Op_StoreCM ) {
1275 uint storeCM_idx = j;
1276 Node *oop_store = mach->in(mach->_cnt); // First precedence edge
1277 assert( oop_store != NULL, "storeCM expects a precedence edge");
1278 uint i4;
1279 for( i4 = 0; i4 < last_inst; ++i4 ) {
1280 if( b->_nodes[i4] == oop_store ) break;
1281 }
1282 // Note: This test can provide a false failure if other precedence
1283 // edges have been added to the storeCMNode.
1284 assert( i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
1285 }
1286 #endif
1287
1288 else if( !n->is_Proj() ) {
1289 // Remember the begining of the previous instruction, in case
1290 // it's followed by a flag-kill and a null-check. Happens on
1291 // Intel all the time, with add-to-memory kind of opcodes.
1292 previous_offset = current_offset;
1293 }
1294 }
1295
1296 // Verify that there is sufficient space remaining
1297 cb->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size);
1298 if (cb->blob() == NULL) {
1299 turn_off_compiler(this);
1300 return;
1301 }
1302
1303 // Save the offset for the listing
1304 #ifndef PRODUCT
1305 if( node_offsets && n->_idx < node_offset_limit )
1306 node_offsets[n->_idx] = cb->code_size();
1307 #endif
1308
1309 // "Normal" instruction case
1310 n->emit(*cb, _regalloc);
1311 current_offset = cb->code_size();
1312 non_safepoints.observe_instruction(n, current_offset);
1313
1314 // mcall is last "call" that can be a safepoint
1315 // record it so we can see if a poll will directly follow it
1316 // in which case we'll need a pad to make the PcDesc sites unique
1317 // see 5010568. This can be slightly inaccurate but conservative
1318 // in the case that return address is not actually at current_offset.
1319 // This is a small price to pay.
1320
1321 if (is_mcall) {
1322 last_call_offset = current_offset;
1323 }
1324
1325 // See if this instruction has a delay slot
1326 if ( valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) {
1327 assert(delay_slot != NULL, "expecting delay slot node");
1328
1329 // Back up 1 instruction
1330 cb->set_code_end(
1331 cb->code_end()-Pipeline::instr_unit_size());
1332
1333 // Save the offset for the listing
1334 #ifndef PRODUCT
1335 if( node_offsets && delay_slot->_idx < node_offset_limit )
1336 node_offsets[delay_slot->_idx] = cb->code_size();
1337 #endif
1338
1339 // Support a SafePoint in the delay slot
1340 if( delay_slot->is_MachSafePoint() ) {
1341 MachNode *mach = delay_slot->as_Mach();
1342 // !!!!! Stubs only need an oopmap right now, so bail out
1343 if( !mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == NULL ) {
1344 // Write the oopmap directly to the code blob??!!
1345 # ifdef ENABLE_ZAP_DEAD_LOCALS
1346 assert( !is_node_getting_a_safepoint(mach), "logic does not match; false positive");
1347 # endif
1348 delay_slot = NULL;
1349 continue;
1350 }
1351
1352 int adjusted_offset = current_offset - Pipeline::instr_unit_size();
1353 non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1354 adjusted_offset);
1355 // Generate an OopMap entry
1356 Process_OopMap_Node(mach, adjusted_offset);
1357 }
1358
1359 // Insert the delay slot instruction
1360 delay_slot->emit(*cb, _regalloc);
1361
1362 // Don't reuse it
1363 delay_slot = NULL;
1364 }
1365
1366 } // End for all instructions in block
1367
1368 // If the next block _starts_ a loop, pad this block out to align
1369 // the loop start a little. Helps prevent pipe stalls at loop starts
1370 int nop_size = (new (this) MachNopNode())->size(_regalloc);
1371 if( i<_cfg->_num_blocks-1 ) {
1372 Block *nb = _cfg->_blocks[i+1];
1373 uint padding = nb->alignment_padding(current_offset);
1374 if( padding > 0 ) {
1375 MachNode *nop = new (this) MachNopNode(padding / nop_size);
1376 b->_nodes.insert( b->_nodes.size(), nop );
1377 _cfg->_bbs.map( nop->_idx, b );
1378 nop->emit(*cb, _regalloc);
1379 current_offset = cb->code_size();
1380 }
1381 }
1382
1383 } // End of for all blocks
1384
1385 non_safepoints.flush_at_end();
1386
1387 // Offset too large?
1388 if (failing()) return;
1389
1390 // Define a pseudo-label at the end of the code
1391 MacroAssembler(cb).bind( blk_labels[_cfg->_num_blocks] );
1392
1393 // Compute the size of the first block
1394 _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos();
1395
1396 assert(cb->code_size() < 500000, "method is unreasonably large");
1397
1398 // ------------------
1399
1400 #ifndef PRODUCT
1401 // Information on the size of the method, without the extraneous code
1402 Scheduling::increment_method_size(cb->code_size());
1403 #endif
1404
1405 // ------------------
1406 // Fill in exception table entries.
1407 FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels);
1408
1409 // Only java methods have exception handlers and deopt handlers
1410 if (_method) {
1411 // Emit the exception handler code.
1412 _code_offsets.set_value(CodeOffsets::Exceptions, emit_exception_handler(*cb));
1413 // Emit the deopt handler code.
1414 _code_offsets.set_value(CodeOffsets::Deopt, emit_deopt_handler(*cb));
1415 }
1416
1417 // One last check for failed CodeBuffer::expand:
1418 if (cb->blob() == NULL) {
1419 turn_off_compiler(this);
1420 return;
1421 }
1422
1423 #ifndef PRODUCT
1424 // Dump the assembly code, including basic-block numbers
1425 if (print_assembly()) {
1426 ttyLocker ttyl; // keep the following output all in one block
1427 if (!VMThread::should_terminate()) { // test this under the tty lock
1428 // This output goes directly to the tty, not the compiler log.
1429 // To enable tools to match it up with the compilation activity,
1430 // be sure to tag this tty output with the compile ID.
1431 if (xtty != NULL) {
1432 xtty->head("opto_assembly compile_id='%d'%s", compile_id(),
1433 is_osr_compilation() ? " compile_kind='osr'" :
1434 "");
1435 }
1436 if (method() != NULL) {
1437 method()->print_oop();
1438 print_codes();
1439 }
1440 dump_asm(node_offsets, node_offset_limit);
1441 if (xtty != NULL) {
1442 xtty->tail("opto_assembly");
1443 }
1444 }
1445 }
1446 #endif
1447
1448 }
1449
1450 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
1451 _inc_table.set_size(cnt);
1452
1453 uint inct_cnt = 0;
1454 for( uint i=0; i<_cfg->_num_blocks; i++ ) {
1455 Block *b = _cfg->_blocks[i];
1456 Node *n = NULL;
1457 int j;
1458
1459 // Find the branch; ignore trailing NOPs.
1460 for( j = b->_nodes.size()-1; j>=0; j-- ) {
1461 n = b->_nodes[j];
1462 if( !n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con )
1463 break;
1464 }
1465
1466 // If we didn't find anything, continue
1467 if( j < 0 ) continue;
1468
1469 // Compute ExceptionHandlerTable subtable entry and add it
1470 // (skip empty blocks)
1471 if( n->is_Catch() ) {
1472
1473 // Get the offset of the return from the call
1474 uint call_return = call_returns[b->_pre_order];
1475 #ifdef ASSERT
1476 assert( call_return > 0, "no call seen for this basic block" );
1477 while( b->_nodes[--j]->Opcode() == Op_MachProj ) ;
1478 assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" );
1479 #endif
1480 // last instruction is a CatchNode, find it's CatchProjNodes
1481 int nof_succs = b->_num_succs;
1482 // allocate space
1483 GrowableArray<intptr_t> handler_bcis(nof_succs);
1484 GrowableArray<intptr_t> handler_pcos(nof_succs);
1485 // iterate through all successors
1486 for (int j = 0; j < nof_succs; j++) {
1487 Block* s = b->_succs[j];
1488 bool found_p = false;
1489 for( uint k = 1; k < s->num_preds(); k++ ) {
1490 Node *pk = s->pred(k);
1491 if( pk->is_CatchProj() && pk->in(0) == n ) {
1492 const CatchProjNode* p = pk->as_CatchProj();
1493 found_p = true;
1494 // add the corresponding handler bci & pco information
1495 if( p->_con != CatchProjNode::fall_through_index ) {
1496 // p leads to an exception handler (and is not fall through)
1497 assert(s == _cfg->_blocks[s->_pre_order],"bad numbering");
1498 // no duplicates, please
1499 if( !handler_bcis.contains(p->handler_bci()) ) {
1500 uint block_num = s->non_connector()->_pre_order;
1501 handler_bcis.append(p->handler_bci());
1502 handler_pcos.append(blk_labels[block_num].loc_pos());
1503 }
1504 }
1505 }
1506 }
1507 assert(found_p, "no matching predecessor found");
1508 // Note: Due to empty block removal, one block may have
1509 // several CatchProj inputs, from the same Catch.
1510 }
1511
1512 // Set the offset of the return from the call
1513 _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos);
1514 continue;
1515 }
1516
1517 // Handle implicit null exception table updates
1518 if( n->is_MachNullCheck() ) {
1519 uint block_num = b->non_connector_successor(0)->_pre_order;
1520 _inc_table.append( inct_starts[inct_cnt++], blk_labels[block_num].loc_pos() );
1521 continue;
1522 }
1523 } // End of for all blocks fill in exception table entries
1524 }
1525
1526 // Static Variables
1527 #ifndef PRODUCT
1528 uint Scheduling::_total_nop_size = 0;
1529 uint Scheduling::_total_method_size = 0;
1530 uint Scheduling::_total_branches = 0;
1531 uint Scheduling::_total_unconditional_delays = 0;
1532 uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1];
1533 #endif
1534
1535 // Initializer for class Scheduling
1536
1537 Scheduling::Scheduling(Arena *arena, Compile &compile)
1538 : _arena(arena),
1539 _cfg(compile.cfg()),
1540 _bbs(compile.cfg()->_bbs),
1541 _regalloc(compile.regalloc()),
1542 _reg_node(arena),
1543 _bundle_instr_count(0),
1544 _bundle_cycle_number(0),
1545 _scheduled(arena),
1546 _available(arena),
1547 _next_node(NULL),
1548 _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]),
1549 _pinch_free_list(arena)
1550 #ifndef PRODUCT
1551 , _branches(0)
1552 , _unconditional_delays(0)
1553 #endif
1554 {
1555 // Create a MachNopNode
1556 _nop = new (&compile) MachNopNode();
1557
1558 // Now that the nops are in the array, save the count
1559 // (but allow entries for the nops)
1560 _node_bundling_limit = compile.unique();
1561 uint node_max = _regalloc->node_regs_max_index();
1562
1563 compile.set_node_bundling_limit(_node_bundling_limit);
1564
1565 // This one is persistant within the Compile class
1566 _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max);
1567
1568 // Allocate space for fixed-size arrays
1569 _node_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1570 _uses = NEW_ARENA_ARRAY(arena, short, node_max);
1571 _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1572
1573 // Clear the arrays
1574 memset(_node_bundling_base, 0, node_max * sizeof(Bundle));
1575 memset(_node_latency, 0, node_max * sizeof(unsigned short));
1576 memset(_uses, 0, node_max * sizeof(short));
1577 memset(_current_latency, 0, node_max * sizeof(unsigned short));
1578
1579 // Clear the bundling information
1580 memcpy(_bundle_use_elements,
1581 Pipeline_Use::elaborated_elements,
1582 sizeof(Pipeline_Use::elaborated_elements));
1583
1584 // Get the last node
1585 Block *bb = _cfg->_blocks[_cfg->_blocks.size()-1];
1586
1587 _next_node = bb->_nodes[bb->_nodes.size()-1];
1588 }
1589
1590 #ifndef PRODUCT
1591 // Scheduling destructor
1592 Scheduling::~Scheduling() {
1593 _total_branches += _branches;
1594 _total_unconditional_delays += _unconditional_delays;
1595 }
1596 #endif
1597
1598 // Step ahead "i" cycles
1599 void Scheduling::step(uint i) {
1600
1601 Bundle *bundle = node_bundling(_next_node);
1602 bundle->set_starts_bundle();
1603
1604 // Update the bundle record, but leave the flags information alone
1605 if (_bundle_instr_count > 0) {
1606 bundle->set_instr_count(_bundle_instr_count);
1607 bundle->set_resources_used(_bundle_use.resourcesUsed());
1608 }
1609
1610 // Update the state information
1611 _bundle_instr_count = 0;
1612 _bundle_cycle_number += i;
1613 _bundle_use.step(i);
1614 }
1615
1616 void Scheduling::step_and_clear() {
1617 Bundle *bundle = node_bundling(_next_node);
1618 bundle->set_starts_bundle();
1619
1620 // Update the bundle record
1621 if (_bundle_instr_count > 0) {
1622 bundle->set_instr_count(_bundle_instr_count);
1623 bundle->set_resources_used(_bundle_use.resourcesUsed());
1624
1625 _bundle_cycle_number += 1;
1626 }
1627
1628 // Clear the bundling information
1629 _bundle_instr_count = 0;
1630 _bundle_use.reset();
1631
1632 memcpy(_bundle_use_elements,
1633 Pipeline_Use::elaborated_elements,
1634 sizeof(Pipeline_Use::elaborated_elements));
1635 }
1636
1637 //------------------------------ScheduleAndBundle------------------------------
1638 // Perform instruction scheduling and bundling over the sequence of
1639 // instructions in backwards order.
1640 void Compile::ScheduleAndBundle() {
1641
1642 // Don't optimize this if it isn't a method
1643 if (!_method)
1644 return;
1645
1646 // Don't optimize this if scheduling is disabled
1647 if (!do_scheduling())
1648 return;
1649
1650 NOT_PRODUCT( TracePhase t2("isched", &_t_instrSched, TimeCompiler); )
1651
1652 // Create a data structure for all the scheduling information
1653 Scheduling scheduling(Thread::current()->resource_area(), *this);
1654
1655 // Walk backwards over each basic block, computing the needed alignment
1656 // Walk over all the basic blocks
1657 scheduling.DoScheduling();
1658 }
1659
1660 //------------------------------ComputeLocalLatenciesForward-------------------
1661 // Compute the latency of all the instructions. This is fairly simple,
1662 // because we already have a legal ordering. Walk over the instructions
1663 // from first to last, and compute the latency of the instruction based
1664 // on the latency of the preceeding instruction(s).
1665 void Scheduling::ComputeLocalLatenciesForward(const Block *bb) {
1666 #ifndef PRODUCT
1667 if (_cfg->C->trace_opto_output())
1668 tty->print("# -> ComputeLocalLatenciesForward\n");
1669 #endif
1670
1671 // Walk over all the schedulable instructions
1672 for( uint j=_bb_start; j < _bb_end; j++ ) {
1673
1674 // This is a kludge, forcing all latency calculations to start at 1.
1675 // Used to allow latency 0 to force an instruction to the beginning
1676 // of the bb
1677 uint latency = 1;
1678 Node *use = bb->_nodes[j];
1679 uint nlen = use->len();
1680
1681 // Walk over all the inputs
1682 for ( uint k=0; k < nlen; k++ ) {
1683 Node *def = use->in(k);
1684 if (!def)
1685 continue;
1686
1687 uint l = _node_latency[def->_idx] + use->latency(k);
1688 if (latency < l)
1689 latency = l;
1690 }
1691
1692 _node_latency[use->_idx] = latency;
1693
1694 #ifndef PRODUCT
1695 if (_cfg->C->trace_opto_output()) {
1696 tty->print("# latency %4d: ", latency);
1697 use->dump();
1698 }
1699 #endif
1700 }
1701
1702 #ifndef PRODUCT
1703 if (_cfg->C->trace_opto_output())
1704 tty->print("# <- ComputeLocalLatenciesForward\n");
1705 #endif
1706
1707 } // end ComputeLocalLatenciesForward
1708
1709 // See if this node fits into the present instruction bundle
1710 bool Scheduling::NodeFitsInBundle(Node *n) {
1711 uint n_idx = n->_idx;
1712
1713 // If this is the unconditional delay instruction, then it fits
1714 if (n == _unconditional_delay_slot) {
1715 #ifndef PRODUCT
1716 if (_cfg->C->trace_opto_output())
1717 tty->print("# NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx);
1718 #endif
1719 return (true);
1720 }
1721
1722 // If the node cannot be scheduled this cycle, skip it
1723 if (_current_latency[n_idx] > _bundle_cycle_number) {
1724 #ifndef PRODUCT
1725 if (_cfg->C->trace_opto_output())
1726 tty->print("# NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n",
1727 n->_idx, _current_latency[n_idx], _bundle_cycle_number);
1728 #endif
1729 return (false);
1730 }
1731
1732 const Pipeline *node_pipeline = n->pipeline();
1733
1734 uint instruction_count = node_pipeline->instructionCount();
1735 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
1736 instruction_count = 0;
1737 else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
1738 instruction_count++;
1739
1740 if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) {
1741 #ifndef PRODUCT
1742 if (_cfg->C->trace_opto_output())
1743 tty->print("# NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n",
1744 n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle);
1745 #endif
1746 return (false);
1747 }
1748
1749 // Don't allow non-machine nodes to be handled this way
1750 if (!n->is_Mach() && instruction_count == 0)
1751 return (false);
1752
1753 // See if there is any overlap
1754 uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse());
1755
1756 if (delay > 0) {
1757 #ifndef PRODUCT
1758 if (_cfg->C->trace_opto_output())
1759 tty->print("# NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx);
1760 #endif
1761 return false;
1762 }
1763
1764 #ifndef PRODUCT
1765 if (_cfg->C->trace_opto_output())
1766 tty->print("# NodeFitsInBundle [%4d]: TRUE\n", n_idx);
1767 #endif
1768
1769 return true;
1770 }
1771
1772 Node * Scheduling::ChooseNodeToBundle() {
1773 uint siz = _available.size();
1774
1775 if (siz == 0) {
1776
1777 #ifndef PRODUCT
1778 if (_cfg->C->trace_opto_output())
1779 tty->print("# ChooseNodeToBundle: NULL\n");
1780 #endif
1781 return (NULL);
1782 }
1783
1784 // Fast path, if only 1 instruction in the bundle
1785 if (siz == 1) {
1786 #ifndef PRODUCT
1787 if (_cfg->C->trace_opto_output()) {
1788 tty->print("# ChooseNodeToBundle (only 1): ");
1789 _available[0]->dump();
1790 }
1791 #endif
1792 return (_available[0]);
1793 }
1794
1795 // Don't bother, if the bundle is already full
1796 if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) {
1797 for ( uint i = 0; i < siz; i++ ) {
1798 Node *n = _available[i];
1799
1800 // Skip projections, we'll handle them another way
1801 if (n->is_Proj())
1802 continue;
1803
1804 // This presupposed that instructions are inserted into the
1805 // available list in a legality order; i.e. instructions that
1806 // must be inserted first are at the head of the list
1807 if (NodeFitsInBundle(n)) {
1808 #ifndef PRODUCT
1809 if (_cfg->C->trace_opto_output()) {
1810 tty->print("# ChooseNodeToBundle: ");
1811 n->dump();
1812 }
1813 #endif
1814 return (n);
1815 }
1816 }
1817 }
1818
1819 // Nothing fits in this bundle, choose the highest priority
1820 #ifndef PRODUCT
1821 if (_cfg->C->trace_opto_output()) {
1822 tty->print("# ChooseNodeToBundle: ");
1823 _available[0]->dump();
1824 }
1825 #endif
1826
1827 return _available[0];
1828 }
1829
1830 //------------------------------AddNodeToAvailableList-------------------------
1831 void Scheduling::AddNodeToAvailableList(Node *n) {
1832 assert( !n->is_Proj(), "projections never directly made available" );
1833 #ifndef PRODUCT
1834 if (_cfg->C->trace_opto_output()) {
1835 tty->print("# AddNodeToAvailableList: ");
1836 n->dump();
1837 }
1838 #endif
1839
1840 int latency = _current_latency[n->_idx];
1841
1842 // Insert in latency order (insertion sort)
1843 uint i;
1844 for ( i=0; i < _available.size(); i++ )
1845 if (_current_latency[_available[i]->_idx] > latency)
1846 break;
1847
1848 // Special Check for compares following branches
1849 if( n->is_Mach() && _scheduled.size() > 0 ) {
1850 int op = n->as_Mach()->ideal_Opcode();
1851 Node *last = _scheduled[0];
1852 if( last->is_MachIf() && last->in(1) == n &&
1853 ( op == Op_CmpI ||
1854 op == Op_CmpU ||
1855 op == Op_CmpP ||
1856 op == Op_CmpF ||
1857 op == Op_CmpD ||
1858 op == Op_CmpL ) ) {
1859
1860 // Recalculate position, moving to front of same latency
1861 for ( i=0 ; i < _available.size(); i++ )
1862 if (_current_latency[_available[i]->_idx] >= latency)
1863 break;
1864 }
1865 }
1866
1867 // Insert the node in the available list
1868 _available.insert(i, n);
1869
1870 #ifndef PRODUCT
1871 if (_cfg->C->trace_opto_output())
1872 dump_available();
1873 #endif
1874 }
1875
1876 //------------------------------DecrementUseCounts-----------------------------
1877 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
1878 for ( uint i=0; i < n->len(); i++ ) {
1879 Node *def = n->in(i);
1880 if (!def) continue;
1881 if( def->is_Proj() ) // If this is a machine projection, then
1882 def = def->in(0); // propagate usage thru to the base instruction
1883
1884 if( _bbs[def->_idx] != bb ) // Ignore if not block-local
1885 continue;
1886
1887 // Compute the latency
1888 uint l = _bundle_cycle_number + n->latency(i);
1889 if (_current_latency[def->_idx] < l)
1890 _current_latency[def->_idx] = l;
1891
1892 // If this does not have uses then schedule it
1893 if ((--_uses[def->_idx]) == 0)
1894 AddNodeToAvailableList(def);
1895 }
1896 }
1897
1898 //------------------------------AddNodeToBundle--------------------------------
1899 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) {
1900 #ifndef PRODUCT
1901 if (_cfg->C->trace_opto_output()) {
1902 tty->print("# AddNodeToBundle: ");
1903 n->dump();
1904 }
1905 #endif
1906
1907 // Remove this from the available list
1908 uint i;
1909 for (i = 0; i < _available.size(); i++)
1910 if (_available[i] == n)
1911 break;
1912 assert(i < _available.size(), "entry in _available list not found");
1913 _available.remove(i);
1914
1915 // See if this fits in the current bundle
1916 const Pipeline *node_pipeline = n->pipeline();
1917 const Pipeline_Use& node_usage = node_pipeline->resourceUse();
1918
1919 // Check for instructions to be placed in the delay slot. We
1920 // do this before we actually schedule the current instruction,
1921 // because the delay slot follows the current instruction.
1922 if (Pipeline::_branch_has_delay_slot &&
1923 node_pipeline->hasBranchDelay() &&
1924 !_unconditional_delay_slot) {
1925
1926 uint siz = _available.size();
1927
1928 // Conditional branches can support an instruction that
1929 // is unconditionally executed and not dependant by the
1930 // branch, OR a conditionally executed instruction if
1931 // the branch is taken. In practice, this means that
1932 // the first instruction at the branch target is
1933 // copied to the delay slot, and the branch goes to
1934 // the instruction after that at the branch target
1935 if ( n->is_Mach() && n->is_Branch() ) {
1936
1937 assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" );
1938 assert( !n->is_Catch(), "should not look for delay slot for Catch" );
1939
1940 #ifndef PRODUCT
1941 _branches++;
1942 #endif
1943
1944 // At least 1 instruction is on the available list
1945 // that is not dependant on the branch
1946 for (uint i = 0; i < siz; i++) {
1947 Node *d = _available[i];
1948 const Pipeline *avail_pipeline = d->pipeline();
1949
1950 // Don't allow safepoints in the branch shadow, that will
1951 // cause a number of difficulties
1952 if ( avail_pipeline->instructionCount() == 1 &&
1953 !avail_pipeline->hasMultipleBundles() &&
1954 !avail_pipeline->hasBranchDelay() &&
1955 Pipeline::instr_has_unit_size() &&
1956 d->size(_regalloc) == Pipeline::instr_unit_size() &&
1957 NodeFitsInBundle(d) &&
1958 !node_bundling(d)->used_in_delay()) {
1959
1960 if (d->is_Mach() && !d->is_MachSafePoint()) {
1961 // A node that fits in the delay slot was found, so we need to
1962 // set the appropriate bits in the bundle pipeline information so
1963 // that it correctly indicates resource usage. Later, when we
1964 // attempt to add this instruction to the bundle, we will skip
1965 // setting the resource usage.
1966 _unconditional_delay_slot = d;
1967 node_bundling(n)->set_use_unconditional_delay();
1968 node_bundling(d)->set_used_in_unconditional_delay();
1969 _bundle_use.add_usage(avail_pipeline->resourceUse());
1970 _current_latency[d->_idx] = _bundle_cycle_number;
1971 _next_node = d;
1972 ++_bundle_instr_count;
1973 #ifndef PRODUCT
1974 _unconditional_delays++;
1975 #endif
1976 break;
1977 }
1978 }
1979 }
1980 }
1981
1982 // No delay slot, add a nop to the usage
1983 if (!_unconditional_delay_slot) {
1984 // See if adding an instruction in the delay slot will overflow
1985 // the bundle.
1986 if (!NodeFitsInBundle(_nop)) {
1987 #ifndef PRODUCT
1988 if (_cfg->C->trace_opto_output())
1989 tty->print("# *** STEP(1 instruction for delay slot) ***\n");
1990 #endif
1991 step(1);
1992 }
1993
1994 _bundle_use.add_usage(_nop->pipeline()->resourceUse());
1995 _next_node = _nop;
1996 ++_bundle_instr_count;
1997 }
1998
1999 // See if the instruction in the delay slot requires a
2000 // step of the bundles
2001 if (!NodeFitsInBundle(n)) {
2002 #ifndef PRODUCT
2003 if (_cfg->C->trace_opto_output())
2004 tty->print("# *** STEP(branch won't fit) ***\n");
2005 #endif
2006 // Update the state information
2007 _bundle_instr_count = 0;
2008 _bundle_cycle_number += 1;
2009 _bundle_use.step(1);
2010 }
2011 }
2012
2013 // Get the number of instructions
2014 uint instruction_count = node_pipeline->instructionCount();
2015 if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
2016 instruction_count = 0;
2017
2018 // Compute the latency information
2019 uint delay = 0;
2020
2021 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) {
2022 int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number;
2023 if (relative_latency < 0)
2024 relative_latency = 0;
2025
2026 delay = _bundle_use.full_latency(relative_latency, node_usage);
2027
2028 // Does not fit in this bundle, start a new one
2029 if (delay > 0) {
2030 step(delay);
2031
2032 #ifndef PRODUCT
2033 if (_cfg->C->trace_opto_output())
2034 tty->print("# *** STEP(%d) ***\n", delay);
2035 #endif
2036 }
2037 }
2038
2039 // If this was placed in the delay slot, ignore it
2040 if (n != _unconditional_delay_slot) {
2041
2042 if (delay == 0) {
2043 if (node_pipeline->hasMultipleBundles()) {
2044 #ifndef PRODUCT
2045 if (_cfg->C->trace_opto_output())
2046 tty->print("# *** STEP(multiple instructions) ***\n");
2047 #endif
2048 step(1);
2049 }
2050
2051 else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) {
2052 #ifndef PRODUCT
2053 if (_cfg->C->trace_opto_output())
2054 tty->print("# *** STEP(%d >= %d instructions) ***\n",
2055 instruction_count + _bundle_instr_count,
2056 Pipeline::_max_instrs_per_cycle);
2057 #endif
2058 step(1);
2059 }
2060 }
2061
2062 if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
2063 _bundle_instr_count++;
2064
2065 // Set the node's latency
2066 _current_latency[n->_idx] = _bundle_cycle_number;
2067
2068 // Now merge the functional unit information
2069 if (instruction_count > 0 || !node_pipeline->mayHaveNoCode())
2070 _bundle_use.add_usage(node_usage);
2071
2072 // Increment the number of instructions in this bundle
2073 _bundle_instr_count += instruction_count;
2074
2075 // Remember this node for later
2076 if (n->is_Mach())
2077 _next_node = n;
2078 }
2079
2080 // It's possible to have a BoxLock in the graph and in the _bbs mapping but
2081 // not in the bb->_nodes array. This happens for debug-info-only BoxLocks.
2082 // 'Schedule' them (basically ignore in the schedule) but do not insert them
2083 // into the block. All other scheduled nodes get put in the schedule here.
2084 int op = n->Opcode();
2085 if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR
2086 (op != Op_Node && // Not an unused antidepedence node and
2087 // not an unallocated boxlock
2088 (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
2089
2090 // Push any trailing projections
2091 if( bb->_nodes[bb->_nodes.size()-1] != n ) {
2092 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2093 Node *foi = n->fast_out(i);
2094 if( foi->is_Proj() )
2095 _scheduled.push(foi);
2096 }
2097 }
2098
2099 // Put the instruction in the schedule list
2100 _scheduled.push(n);
2101 }
2102
2103 #ifndef PRODUCT
2104 if (_cfg->C->trace_opto_output())
2105 dump_available();
2106 #endif
2107
2108 // Walk all the definitions, decrementing use counts, and
2109 // if a definition has a 0 use count, place it in the available list.
2110 DecrementUseCounts(n,bb);
2111 }
2112
2113 //------------------------------ComputeUseCount--------------------------------
2114 // This method sets the use count within a basic block. We will ignore all
2115 // uses outside the current basic block. As we are doing a backwards walk,
2116 // any node we reach that has a use count of 0 may be scheduled. This also
2117 // avoids the problem of cyclic references from phi nodes, as long as phi
2118 // nodes are at the front of the basic block. This method also initializes
2119 // the available list to the set of instructions that have no uses within this
2120 // basic block.
2121 void Scheduling::ComputeUseCount(const Block *bb) {
2122 #ifndef PRODUCT
2123 if (_cfg->C->trace_opto_output())
2124 tty->print("# -> ComputeUseCount\n");
2125 #endif
2126
2127 // Clear the list of available and scheduled instructions, just in case
2128 _available.clear();
2129 _scheduled.clear();
2130
2131 // No delay slot specified
2132 _unconditional_delay_slot = NULL;
2133
2134 #ifdef ASSERT
2135 for( uint i=0; i < bb->_nodes.size(); i++ )
2136 assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" );
2137 #endif
2138
2139 // Force the _uses count to never go to zero for unscheduable pieces
2140 // of the block
2141 for( uint k = 0; k < _bb_start; k++ )
2142 _uses[bb->_nodes[k]->_idx] = 1;
2143 for( uint l = _bb_end; l < bb->_nodes.size(); l++ )
2144 _uses[bb->_nodes[l]->_idx] = 1;
2145
2146 // Iterate backwards over the instructions in the block. Don't count the
2147 // branch projections at end or the block header instructions.
2148 for( uint j = _bb_end-1; j >= _bb_start; j-- ) {
2149 Node *n = bb->_nodes[j];
2150 if( n->is_Proj() ) continue; // Projections handled another way
2151
2152 // Account for all uses
2153 for ( uint k = 0; k < n->len(); k++ ) {
2154 Node *inp = n->in(k);
2155 if (!inp) continue;
2156 assert(inp != n, "no cycles allowed" );
2157 if( _bbs[inp->_idx] == bb ) { // Block-local use?
2158 if( inp->is_Proj() ) // Skip through Proj's
2159 inp = inp->in(0);
2160 ++_uses[inp->_idx]; // Count 1 block-local use
2161 }
2162 }
2163
2164 // If this instruction has a 0 use count, then it is available
2165 if (!_uses[n->_idx]) {
2166 _current_latency[n->_idx] = _bundle_cycle_number;
2167 AddNodeToAvailableList(n);
2168 }
2169
2170 #ifndef PRODUCT
2171 if (_cfg->C->trace_opto_output()) {
2172 tty->print("# uses: %3d: ", _uses[n->_idx]);
2173 n->dump();
2174 }
2175 #endif
2176 }
2177
2178 #ifndef PRODUCT
2179 if (_cfg->C->trace_opto_output())
2180 tty->print("# <- ComputeUseCount\n");
2181 #endif
2182 }
2183
2184 // This routine performs scheduling on each basic block in reverse order,
2185 // using instruction latencies and taking into account function unit
2186 // availability.
2187 void Scheduling::DoScheduling() {
2188 #ifndef PRODUCT
2189 if (_cfg->C->trace_opto_output())
2190 tty->print("# -> DoScheduling\n");
2191 #endif
2192
2193 Block *succ_bb = NULL;
2194 Block *bb;
2195
2196 // Walk over all the basic blocks in reverse order
2197 for( int i=_cfg->_num_blocks-1; i >= 0; succ_bb = bb, i-- ) {
2198 bb = _cfg->_blocks[i];
2199
2200 #ifndef PRODUCT
2201 if (_cfg->C->trace_opto_output()) {
2202 tty->print("# Schedule BB#%03d (initial)\n", i);
2203 for (uint j = 0; j < bb->_nodes.size(); j++)
2204 bb->_nodes[j]->dump();
2205 }
2206 #endif
2207
2208 // On the head node, skip processing
2209 if( bb == _cfg->_broot )
2210 continue;
2211
2212 // Skip empty, connector blocks
2213 if (bb->is_connector())
2214 continue;
2215
2216 // If the following block is not the sole successor of
2217 // this one, then reset the pipeline information
2218 if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) {
2219 #ifndef PRODUCT
2220 if (_cfg->C->trace_opto_output()) {
2221 tty->print("*** bundle start of next BB, node %d, for %d instructions\n",
2222 _next_node->_idx, _bundle_instr_count);
2223 }
2224 #endif
2225 step_and_clear();
2226 }
2227
2228 // Leave untouched the starting instruction, any Phis, a CreateEx node
2229 // or Top. bb->_nodes[_bb_start] is the first schedulable instruction.
2230 _bb_end = bb->_nodes.size()-1;
2231 for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
2232 Node *n = bb->_nodes[_bb_start];
2233 // Things not matched, like Phinodes and ProjNodes don't get scheduled.
2234 // Also, MachIdealNodes do not get scheduled
2235 if( !n->is_Mach() ) continue; // Skip non-machine nodes
2236 MachNode *mach = n->as_Mach();
2237 int iop = mach->ideal_Opcode();
2238 if( iop == Op_CreateEx ) continue; // CreateEx is pinned
2239 if( iop == Op_Con ) continue; // Do not schedule Top
2240 if( iop == Op_Node && // Do not schedule PhiNodes, ProjNodes
2241 mach->pipeline() == MachNode::pipeline_class() &&
2242 !n->is_SpillCopy() ) // Breakpoints, Prolog, etc
2243 continue;
2244 break; // Funny loop structure to be sure...
2245 }
2246 // Compute last "interesting" instruction in block - last instruction we
2247 // might schedule. _bb_end points just after last schedulable inst. We
2248 // normally schedule conditional branches (despite them being forced last
2249 // in the block), because they have delay slots we can fill. Calls all
2250 // have their delay slots filled in the template expansions, so we don't
2251 // bother scheduling them.
2252 Node *last = bb->_nodes[_bb_end];
2253 if( last->is_Catch() ||
2254 (last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
2255 // There must be a prior call. Skip it.
2256 while( !bb->_nodes[--_bb_end]->is_Call() ) {
2257 assert( bb->_nodes[_bb_end]->is_Proj(), "skipping projections after expected call" );
2258 }
2259 } else if( last->is_MachNullCheck() ) {
2260 // Backup so the last null-checked memory instruction is
2261 // outside the schedulable range. Skip over the nullcheck,
2262 // projection, and the memory nodes.
2263 Node *mem = last->in(1);
2264 do {
2265 _bb_end--;
2266 } while (mem != bb->_nodes[_bb_end]);
2267 } else {
2268 // Set _bb_end to point after last schedulable inst.
2269 _bb_end++;
2270 }
2271
2272 assert( _bb_start <= _bb_end, "inverted block ends" );
2273
2274 // Compute the register antidependencies for the basic block
2275 ComputeRegisterAntidependencies(bb);
2276 if (_cfg->C->failing()) return; // too many D-U pinch points
2277
2278 // Compute intra-bb latencies for the nodes
2279 ComputeLocalLatenciesForward(bb);
2280
2281 // Compute the usage within the block, and set the list of all nodes
2282 // in the block that have no uses within the block.
2283 ComputeUseCount(bb);
2284
2285 // Schedule the remaining instructions in the block
2286 while ( _available.size() > 0 ) {
2287 Node *n = ChooseNodeToBundle();
2288 AddNodeToBundle(n,bb);
2289 }
2290
2291 assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" );
2292 #ifdef ASSERT
2293 for( uint l = _bb_start; l < _bb_end; l++ ) {
2294 Node *n = bb->_nodes[l];
2295 uint m;
2296 for( m = 0; m < _bb_end-_bb_start; m++ )
2297 if( _scheduled[m] == n )
2298 break;
2299 assert( m < _bb_end-_bb_start, "instruction missing in schedule" );
2300 }
2301 #endif
2302
2303 // Now copy the instructions (in reverse order) back to the block
2304 for ( uint k = _bb_start; k < _bb_end; k++ )
2305 bb->_nodes.map(k, _scheduled[_bb_end-k-1]);
2306
2307 #ifndef PRODUCT
2308 if (_cfg->C->trace_opto_output()) {
2309 tty->print("# Schedule BB#%03d (final)\n", i);
2310 uint current = 0;
2311 for (uint j = 0; j < bb->_nodes.size(); j++) {
2312 Node *n = bb->_nodes[j];
2313 if( valid_bundle_info(n) ) {
2314 Bundle *bundle = node_bundling(n);
2315 if (bundle->instr_count() > 0 || bundle->flags() > 0) {
2316 tty->print("*** Bundle: ");
2317 bundle->dump();
2318 }
2319 n->dump();
2320 }
2321 }
2322 }
2323 #endif
2324 #ifdef ASSERT
2325 verify_good_schedule(bb,"after block local scheduling");
2326 #endif
2327 }
2328
2329 #ifndef PRODUCT
2330 if (_cfg->C->trace_opto_output())
2331 tty->print("# <- DoScheduling\n");
2332 #endif
2333
2334 // Record final node-bundling array location
2335 _regalloc->C->set_node_bundling_base(_node_bundling_base);
2336
2337 } // end DoScheduling
2338
2339 //------------------------------verify_good_schedule---------------------------
2340 // Verify that no live-range used in the block is killed in the block by a
2341 // wrong DEF. This doesn't verify live-ranges that span blocks.
2342
2343 // Check for edge existence. Used to avoid adding redundant precedence edges.
2344 static bool edge_from_to( Node *from, Node *to ) {
2345 for( uint i=0; i<from->len(); i++ )
2346 if( from->in(i) == to )
2347 return true;
2348 return false;
2349 }
2350
2351 #ifdef ASSERT
2352 //------------------------------verify_do_def----------------------------------
2353 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
2354 // Check for bad kills
2355 if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
2356 Node *prior_use = _reg_node[def];
2357 if( prior_use && !edge_from_to(prior_use,n) ) {
2358 tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2359 n->dump();
2360 tty->print_cr("...");
2361 prior_use->dump();
2362 assert_msg(edge_from_to(prior_use,n),msg);
2363 }
2364 _reg_node.map(def,NULL); // Kill live USEs
2365 }
2366 }
2367
2368 //------------------------------verify_good_schedule---------------------------
2369 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2370
2371 // Zap to something reasonable for the verify code
2372 _reg_node.clear();
2373
2374 // Walk over the block backwards. Check to make sure each DEF doesn't
2375 // kill a live value (other than the one it's supposed to). Add each
2376 // USE to the live set.
2377 for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) {
2378 Node *n = b->_nodes[i];
2379 int n_op = n->Opcode();
2380 if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2381 // Fat-proj kills a slew of registers
2382 RegMask rm = n->out_RegMask();// Make local copy
2383 while( rm.is_NotEmpty() ) {
2384 OptoReg::Name kill = rm.find_first_elem();
2385 rm.Remove(kill);
2386 verify_do_def( n, kill, msg );
2387 }
2388 } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2389 // Get DEF'd registers the normal way
2390 verify_do_def( n, _regalloc->get_reg_first(n), msg );
2391 verify_do_def( n, _regalloc->get_reg_second(n), msg );
2392 }
2393
2394 // Now make all USEs live
2395 for( uint i=1; i<n->req(); i++ ) {
2396 Node *def = n->in(i);
2397 assert(def != 0, "input edge required");
2398 OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2399 OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2400 if( OptoReg::is_valid(reg_lo) ) {
2401 assert_msg(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg );
2402 _reg_node.map(reg_lo,n);
2403 }
2404 if( OptoReg::is_valid(reg_hi) ) {
2405 assert_msg(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg );
2406 _reg_node.map(reg_hi,n);
2407 }
2408 }
2409
2410 }
2411
2412 // Zap to something reasonable for the Antidependence code
2413 _reg_node.clear();
2414 }
2415 #endif
2416
2417 // Conditionally add precedence edges. Avoid putting edges on Projs.
2418 static void add_prec_edge_from_to( Node *from, Node *to ) {
2419 if( from->is_Proj() ) { // Put precedence edge on Proj's input
2420 assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" );
2421 from = from->in(0);
2422 }
2423 if( from != to && // No cycles (for things like LD L0,[L0+4] )
2424 !edge_from_to( from, to ) ) // Avoid duplicate edge
2425 from->add_prec(to);
2426 }
2427
2428 //------------------------------anti_do_def------------------------------------
2429 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
2430 if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
2431 return;
2432
2433 Node *pinch = _reg_node[def_reg]; // Get pinch point
2434 if( !pinch || _bbs[pinch->_idx] != b || // No pinch-point yet?
2435 is_def ) { // Check for a true def (not a kill)
2436 _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
2437 return;
2438 }
2439
2440 Node *kill = def; // Rename 'def' to more descriptive 'kill'
2441 debug_only( def = (Node*)0xdeadbeef; )
2442
2443 // After some number of kills there _may_ be a later def
2444 Node *later_def = NULL;
2445
2446 // Finding a kill requires a real pinch-point.
2447 // Check for not already having a pinch-point.
2448 // Pinch points are Op_Node's.
2449 if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point?
2450 later_def = pinch; // Must be def/kill as optimistic pinch-point
2451 if ( _pinch_free_list.size() > 0) {
2452 pinch = _pinch_free_list.pop();
2453 } else {
2454 pinch = new (_cfg->C, 1) Node(1); // Pinch point to-be
2455 }
2456 if (pinch->_idx >= _regalloc->node_regs_max_index()) {
2457 _cfg->C->record_method_not_compilable("too many D-U pinch points");
2458 return;
2459 }
2460 _bbs.map(pinch->_idx,b); // Pretend it's valid in this block (lazy init)
2461 _reg_node.map(def_reg,pinch); // Record pinch-point
2462 //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
2463 if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill
2464 pinch->init_req(0, _cfg->C->top()); // set not NULL for the next call
2465 add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
2466 later_def = NULL; // and no later def
2467 }
2468 pinch->set_req(0,later_def); // Hook later def so we can find it
2469 } else { // Else have valid pinch point
2470 if( pinch->in(0) ) // If there is a later-def
2471 later_def = pinch->in(0); // Get it
2472 }
2473
2474 // Add output-dependence edge from later def to kill
2475 if( later_def ) // If there is some original def
2476 add_prec_edge_from_to(later_def,kill); // Add edge from def to kill
2477
2478 // See if current kill is also a use, and so is forced to be the pinch-point.
2479 if( pinch->Opcode() == Op_Node ) {
2480 Node *uses = kill->is_Proj() ? kill->in(0) : kill;
2481 for( uint i=1; i<uses->req(); i++ ) {
2482 if( _regalloc->get_reg_first(uses->in(i)) == def_reg ||
2483 _regalloc->get_reg_second(uses->in(i)) == def_reg ) {
2484 // Yes, found a use/kill pinch-point
2485 pinch->set_req(0,NULL); //
2486 pinch->replace_by(kill); // Move anti-dep edges up
2487 pinch = kill;
2488 _reg_node.map(def_reg,pinch);
2489 return;
2490 }
2491 }
2492 }
2493
2494 // Add edge from kill to pinch-point
2495 add_prec_edge_from_to(kill,pinch);
2496 }
2497
2498 //------------------------------anti_do_use------------------------------------
2499 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
2500 if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
2501 return;
2502 Node *pinch = _reg_node[use_reg]; // Get pinch point
2503 // Check for no later def_reg/kill in block
2504 if( pinch && _bbs[pinch->_idx] == b &&
2505 // Use has to be block-local as well
2506 _bbs[use->_idx] == b ) {
2507 if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
2508 pinch->req() == 1 ) { // pinch not yet in block?
2509 pinch->del_req(0); // yank pointer to later-def, also set flag
2510 // Insert the pinch-point in the block just after the last use
2511 b->_nodes.insert(b->find_node(use)+1,pinch);
2512 _bb_end++; // Increase size scheduled region in block
2513 }
2514
2515 add_prec_edge_from_to(pinch,use);
2516 }
2517 }
2518
2519 //------------------------------ComputeRegisterAntidependences-----------------
2520 // We insert antidependences between the reads and following write of
2521 // allocated registers to prevent illegal code motion. Hopefully, the
2522 // number of added references should be fairly small, especially as we
2523 // are only adding references within the current basic block.
2524 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
2525
2526 #ifdef ASSERT
2527 verify_good_schedule(b,"before block local scheduling");
2528 #endif
2529
2530 // A valid schedule, for each register independently, is an endless cycle
2531 // of: a def, then some uses (connected to the def by true dependencies),
2532 // then some kills (defs with no uses), finally the cycle repeats with a new
2533 // def. The uses are allowed to float relative to each other, as are the
2534 // kills. No use is allowed to slide past a kill (or def). This requires
2535 // antidependencies between all uses of a single def and all kills that
2536 // follow, up to the next def. More edges are redundant, because later defs
2537 // & kills are already serialized with true or antidependencies. To keep
2538 // the edge count down, we add a 'pinch point' node if there's more than
2539 // one use or more than one kill/def.
2540
2541 // We add dependencies in one bottom-up pass.
2542
2543 // For each instruction we handle it's DEFs/KILLs, then it's USEs.
2544
2545 // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this
2546 // register. If not, we record the DEF/KILL in _reg_node, the
2547 // register-to-def mapping. If there is a prior DEF/KILL, we insert a
2548 // "pinch point", a new Node that's in the graph but not in the block.
2549 // We put edges from the prior and current DEF/KILLs to the pinch point.
2550 // We put the pinch point in _reg_node. If there's already a pinch point
2551 // we merely add an edge from the current DEF/KILL to the pinch point.
2552
2553 // After doing the DEF/KILLs, we handle USEs. For each used register, we
2554 // put an edge from the pinch point to the USE.
2555
2556 // To be expedient, the _reg_node array is pre-allocated for the whole
2557 // compilation. _reg_node is lazily initialized; it either contains a NULL,
2558 // or a valid def/kill/pinch-point, or a leftover node from some prior
2559 // block. Leftover node from some prior block is treated like a NULL (no
2560 // prior def, so no anti-dependence needed). Valid def is distinguished by
2561 // it being in the current block.
2562 bool fat_proj_seen = false;
2563 uint last_safept = _bb_end-1;
2564 Node* end_node = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL;
2565 Node* last_safept_node = end_node;
2566 for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
2567 Node *n = b->_nodes[i];
2568 int is_def = n->outcnt(); // def if some uses prior to adding precedence edges
2569 if( n->Opcode() == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2570 // Fat-proj kills a slew of registers
2571 // This can add edges to 'n' and obscure whether or not it was a def,
2572 // hence the is_def flag.
2573 fat_proj_seen = true;
2574 RegMask rm = n->out_RegMask();// Make local copy
2575 while( rm.is_NotEmpty() ) {
2576 OptoReg::Name kill = rm.find_first_elem();
2577 rm.Remove(kill);
2578 anti_do_def( b, n, kill, is_def );
2579 }
2580 } else {
2581 // Get DEF'd registers the normal way
2582 anti_do_def( b, n, _regalloc->get_reg_first(n), is_def );
2583 anti_do_def( b, n, _regalloc->get_reg_second(n), is_def );
2584 }
2585
2586 // Check each register used by this instruction for a following DEF/KILL
2587 // that must occur afterward and requires an anti-dependence edge.
2588 for( uint j=0; j<n->req(); j++ ) {
2589 Node *def = n->in(j);
2590 if( def ) {
2591 assert( def->Opcode() != Op_MachProj || def->ideal_reg() != MachProjNode::fat_proj, "" );
2592 anti_do_use( b, n, _regalloc->get_reg_first(def) );
2593 anti_do_use( b, n, _regalloc->get_reg_second(def) );
2594 }
2595 }
2596 // Do not allow defs of new derived values to float above GC
2597 // points unless the base is definitely available at the GC point.
2598
2599 Node *m = b->_nodes[i];
2600
2601 // Add precedence edge from following safepoint to use of derived pointer
2602 if( last_safept_node != end_node &&
2603 m != last_safept_node) {
2604 for (uint k = 1; k < m->req(); k++) {
2605 const Type *t = m->in(k)->bottom_type();
2606 if( t->isa_oop_ptr() &&
2607 t->is_ptr()->offset() != 0 ) {
2608 last_safept_node->add_prec( m );
2609 break;
2610 }
2611 }
2612 }
2613
2614 if( n->jvms() ) { // Precedence edge from derived to safept
2615 // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
2616 if( b->_nodes[last_safept] != last_safept_node ) {
2617 last_safept = b->find_node(last_safept_node);
2618 }
2619 for( uint j=last_safept; j > i; j-- ) {
2620 Node *mach = b->_nodes[j];
2621 if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
2622 mach->add_prec( n );
2623 }
2624 last_safept = i;
2625 last_safept_node = m;
2626 }
2627 }
2628
2629 if (fat_proj_seen) {
2630 // Garbage collect pinch nodes that were not consumed.
2631 // They are usually created by a fat kill MachProj for a call.
2632 garbage_collect_pinch_nodes();
2633 }
2634 }
2635
2636 //------------------------------garbage_collect_pinch_nodes-------------------------------
2637
2638 // Garbage collect pinch nodes for reuse by other blocks.
2639 //
2640 // The block scheduler's insertion of anti-dependence
2641 // edges creates many pinch nodes when the block contains
2642 // 2 or more Calls. A pinch node is used to prevent a
2643 // combinatorial explosion of edges. If a set of kills for a
2644 // register is anti-dependent on a set of uses (or defs), rather
2645 // than adding an edge in the graph between each pair of kill
2646 // and use (or def), a pinch is inserted between them:
2647 //
2648 // use1 use2 use3
2649 // \ | /
2650 // \ | /
2651 // pinch
2652 // / | \
2653 // / | \
2654 // kill1 kill2 kill3
2655 //
2656 // One pinch node is created per register killed when
2657 // the second call is encountered during a backwards pass
2658 // over the block. Most of these pinch nodes are never
2659 // wired into the graph because the register is never
2660 // used or def'ed in the block.
2661 //
2662 void Scheduling::garbage_collect_pinch_nodes() {
2663 #ifndef PRODUCT
2664 if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
2665 #endif
2666 int trace_cnt = 0;
2667 for (uint k = 0; k < _reg_node.Size(); k++) {
2668 Node* pinch = _reg_node[k];
2669 if (pinch != NULL && pinch->Opcode() == Op_Node &&
2670 // no predecence input edges
2671 (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
2672 cleanup_pinch(pinch);
2673 _pinch_free_list.push(pinch);
2674 _reg_node.map(k, NULL);
2675 #ifndef PRODUCT
2676 if (_cfg->C->trace_opto_output()) {
2677 trace_cnt++;
2678 if (trace_cnt > 40) {
2679 tty->print("\n");
2680 trace_cnt = 0;
2681 }
2682 tty->print(" %d", pinch->_idx);
2683 }
2684 #endif
2685 }
2686 }
2687 #ifndef PRODUCT
2688 if (_cfg->C->trace_opto_output()) tty->print("\n");
2689 #endif
2690 }
2691
2692 // Clean up a pinch node for reuse.
2693 void Scheduling::cleanup_pinch( Node *pinch ) {
2694 assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking");
2695
2696 for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) {
2697 Node* use = pinch->last_out(i);
2698 uint uses_found = 0;
2699 for (uint j = use->req(); j < use->len(); j++) {
2700 if (use->in(j) == pinch) {
2701 use->rm_prec(j);
2702 uses_found++;
2703 }
2704 }
2705 assert(uses_found > 0, "must be a precedence edge");
2706 i -= uses_found; // we deleted 1 or more copies of this edge
2707 }
2708 // May have a later_def entry
2709 pinch->set_req(0, NULL);
2710 }
2711
2712 //------------------------------print_statistics-------------------------------
2713 #ifndef PRODUCT
2714
2715 void Scheduling::dump_available() const {
2716 tty->print("#Availist ");
2717 for (uint i = 0; i < _available.size(); i++)
2718 tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]);
2719 tty->cr();
2720 }
2721
2722 // Print Scheduling Statistics
2723 void Scheduling::print_statistics() {
2724 // Print the size added by nops for bundling
2725 tty->print("Nops added %d bytes to total of %d bytes",
2726 _total_nop_size, _total_method_size);
2727 if (_total_method_size > 0)
2728 tty->print(", for %.2f%%",
2729 ((double)_total_nop_size) / ((double) _total_method_size) * 100.0);
2730 tty->print("\n");
2731
2732 // Print the number of branch shadows filled
2733 if (Pipeline::_branch_has_delay_slot) {
2734 tty->print("Of %d branches, %d had unconditional delay slots filled",
2735 _total_branches, _total_unconditional_delays);
2736 if (_total_branches > 0)
2737 tty->print(", for %.2f%%",
2738 ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0);
2739 tty->print("\n");
2740 }
2741
2742 uint total_instructions = 0, total_bundles = 0;
2743
2744 for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) {
2745 uint bundle_count = _total_instructions_per_bundle[i];
2746 total_instructions += bundle_count * i;
2747 total_bundles += bundle_count;
2748 }
2749
2750 if (total_bundles > 0)
2751 tty->print("Average ILP (excluding nops) is %.2f\n",
2752 ((double)total_instructions) / ((double)total_bundles));
2753 }
2754 #endif