src/share/vm/opto/c2_globals.hpp
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src/share/vm/opto/c2_globals.hpp

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 174                                                                             \
 175   product(bool, ReduceBulkZeroing, true,                                    \
 176           "When bulk-initializing, try to avoid needless zeroing")          \
 177                                                                             \
 178   develop_pd(intx, RegisterCostAreaRatio,                                   \
 179           "Spill selection in reg allocator: scale area by (X/64K) before " \
 180           "adding cost")                                                    \
 181                                                                             \
 182   develop_pd(bool, UseCISCSpill,                                            \
 183           "Use ADLC supplied cisc instructions during allocation")          \
 184                                                                             \
 185   notproduct(bool, VerifyGraphEdges , false,                                \
 186           "Verify Bi-directional Edges")                                    \
 187                                                                             \
 188   notproduct(bool, VerifyDUIterators, true,                                 \
 189           "Verify the safety of all iterations of Bi-directional Edges")    \
 190                                                                             \
 191   notproduct(bool, VerifyHashTableKeys, true,                               \
 192           "Verify the immutability of keys in the VN hash tables")          \
 193                                                                             \



 194   develop_pd(intx, FLOATPRESSURE,                                           \
 195           "Number of float LRG's that constitute high register pressure")   \
 196                                                                             \
 197   develop_pd(intx, INTPRESSURE,                                             \
 198           "Number of integer LRG's that constitute high register pressure") \
 199                                                                             \
 200   notproduct(bool, TraceOptoPipelining, false,                              \
 201           "Trace pipelining information")                                   \
 202                                                                             \
 203   notproduct(bool, TraceOptoOutput, false,                                  \
 204           "Trace pipelining information")                                   \
 205                                                                             \
 206   product_pd(bool, OptoScheduling,                                          \
 207           "Instruction Scheduling after register allocation")               \
 208                                                                             \
 209   product(bool, PartialPeelLoop, true,                                      \
 210           "Partial peel (rotate) loops")                                    \
 211                                                                             \
 212   product(intx, PartialPeelNewPhiDelta, 0,                                  \
 213           "Additional phis that can be created by partial peeling")         \




 174                                                                             \
 175   product(bool, ReduceBulkZeroing, true,                                    \
 176           "When bulk-initializing, try to avoid needless zeroing")          \
 177                                                                             \
 178   develop_pd(intx, RegisterCostAreaRatio,                                   \
 179           "Spill selection in reg allocator: scale area by (X/64K) before " \
 180           "adding cost")                                                    \
 181                                                                             \
 182   develop_pd(bool, UseCISCSpill,                                            \
 183           "Use ADLC supplied cisc instructions during allocation")          \
 184                                                                             \
 185   notproduct(bool, VerifyGraphEdges , false,                                \
 186           "Verify Bi-directional Edges")                                    \
 187                                                                             \
 188   notproduct(bool, VerifyDUIterators, true,                                 \
 189           "Verify the safety of all iterations of Bi-directional Edges")    \
 190                                                                             \
 191   notproduct(bool, VerifyHashTableKeys, true,                               \
 192           "Verify the immutability of keys in the VN hash tables")          \
 193                                                                             \
 194   notproduct(bool, VerifyRegisterAllocator , false,                         \
 195           "Verify Register Allocator")                                      \
 196                                                                             \
 197   develop_pd(intx, FLOATPRESSURE,                                           \
 198           "Number of float LRG's that constitute high register pressure")   \
 199                                                                             \
 200   develop_pd(intx, INTPRESSURE,                                             \
 201           "Number of integer LRG's that constitute high register pressure") \
 202                                                                             \
 203   notproduct(bool, TraceOptoPipelining, false,                              \
 204           "Trace pipelining information")                                   \
 205                                                                             \
 206   notproduct(bool, TraceOptoOutput, false,                                  \
 207           "Trace pipelining information")                                   \
 208                                                                             \
 209   product_pd(bool, OptoScheduling,                                          \
 210           "Instruction Scheduling after register allocation")               \
 211                                                                             \
 212   product(bool, PartialPeelLoop, true,                                      \
 213           "Partial peel (rotate) loops")                                    \
 214                                                                             \
 215   product(intx, PartialPeelNewPhiDelta, 0,                                  \
 216           "Additional phis that can be created by partial peeling")         \


src/share/vm/opto/c2_globals.hpp
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