1 /*
2 * Copyright 1997-2007 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 #include "incls/_precompiled.incl"
26 #include "incls/_machnode.cpp.incl"
27
28 //=============================================================================
29 // Return the value requested
30 // result register lookup, corresponding to int_format
31 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node) const {
32 return (int)ra_->get_encode(node);
33 }
34 // input register lookup, corresponding to ext_format
35 int MachOper::reg(PhaseRegAlloc *ra_, const Node *node, int idx) const {
36 return (int)(ra_->get_encode(node->in(idx)));
37 }
38 intptr_t MachOper::constant() const { return 0x00; }
39 bool MachOper::constant_is_oop() const { return false; }
40 jdouble MachOper::constantD() const { ShouldNotReachHere(); return 0.0; }
41 jfloat MachOper::constantF() const { ShouldNotReachHere(); return 0.0; }
42 jlong MachOper::constantL() const { ShouldNotReachHere(); return CONST64(0) ; }
43 TypeOopPtr *MachOper::oop() const { return NULL; }
44 int MachOper::ccode() const { return 0x00; }
45 // A zero, default, indicates this value is not needed.
46 // May need to lookup the base register, as done in int_ and ext_format
47 int MachOper::base (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; }
48 int MachOper::index(PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; }
49 int MachOper::scale() const { return 0x00; }
50 int MachOper::disp (PhaseRegAlloc *ra_, const Node *node, int idx) const { return 0x00; }
51 int MachOper::constant_disp() const { return 0; }
52 int MachOper::base_position() const { return -1; } // no base input
53 int MachOper::index_position() const { return -1; } // no index input
54 // Check for PC-Relative displacement
55 bool MachOper::disp_is_oop() const { return false; }
56 // Return the label
57 Label* MachOper::label() const { ShouldNotReachHere(); return 0; }
58 intptr_t MachOper::method() const { ShouldNotReachHere(); return 0; }
59
60
61 //------------------------------negate-----------------------------------------
62 // Negate conditional branches. Error for non-branch operands
63 void MachOper::negate() {
64 ShouldNotCallThis();
65 }
66
67 //-----------------------------type--------------------------------------------
68 const Type *MachOper::type() const {
69 return Type::BOTTOM;
70 }
71
72 //------------------------------in_RegMask-------------------------------------
73 const RegMask *MachOper::in_RegMask(int index) const {
74 ShouldNotReachHere();
75 return NULL;
76 }
77
78 //------------------------------dump_spec--------------------------------------
79 // Print any per-operand special info
80 #ifndef PRODUCT
81 void MachOper::dump_spec(outputStream *st) const { }
82 #endif
83
84 //------------------------------hash-------------------------------------------
85 // Print any per-operand special info
86 uint MachOper::hash() const {
87 ShouldNotCallThis();
88 return 5;
89 }
90
91 //------------------------------cmp--------------------------------------------
92 // Print any per-operand special info
93 uint MachOper::cmp( const MachOper &oper ) const {
94 ShouldNotCallThis();
95 return opcode() == oper.opcode();
96 }
97
98 //------------------------------hash-------------------------------------------
99 // Print any per-operand special info
100 uint labelOper::hash() const {
101 return _block_num;
102 }
103
104 //------------------------------cmp--------------------------------------------
105 // Print any per-operand special info
106 uint labelOper::cmp( const MachOper &oper ) const {
107 return (opcode() == oper.opcode()) && (_label == oper.label());
108 }
109
110 //------------------------------hash-------------------------------------------
111 // Print any per-operand special info
112 uint methodOper::hash() const {
113 return (uint)_method;
114 }
115
116 //------------------------------cmp--------------------------------------------
117 // Print any per-operand special info
118 uint methodOper::cmp( const MachOper &oper ) const {
119 return (opcode() == oper.opcode()) && (_method == oper.method());
120 }
121
122
123 //=============================================================================
124 //------------------------------MachNode---------------------------------------
125
126 //------------------------------emit-------------------------------------------
127 void MachNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
128 #ifdef ASSERT
129 tty->print("missing MachNode emit function: ");
130 dump();
131 #endif
132 ShouldNotCallThis();
133 }
134
135 //------------------------------size-------------------------------------------
136 // Size of instruction in bytes
137 uint MachNode::size(PhaseRegAlloc *ra_) const {
138 // If a virtual was not defined for this specific instruction,
139 // Call the helper which finds the size by emiting the bits.
140 return MachNode::emit_size(ra_);
141 }
142
143 //------------------------------size-------------------------------------------
144 // Helper function that computes size by emitting code
145 uint MachNode::emit_size(PhaseRegAlloc *ra_) const {
146 // Emit into a trash buffer and count bytes emitted.
147 assert(ra_ == ra_->C->regalloc(), "sanity");
148 return ra_->C->scratch_emit_size(this);
149 }
150
151
152
153 //------------------------------hash-------------------------------------------
154 uint MachNode::hash() const {
155 uint no = num_opnds();
156 uint sum = rule();
157 for( uint i=0; i<no; i++ )
158 sum += _opnds[i]->hash();
159 return sum+Node::hash();
160 }
161
162 //-----------------------------cmp---------------------------------------------
163 uint MachNode::cmp( const Node &node ) const {
164 MachNode& n = *((Node&)node).as_Mach();
165 uint no = num_opnds();
166 if( no != n.num_opnds() ) return 0;
167 if( rule() != n.rule() ) return 0;
168 for( uint i=0; i<no; i++ ) // All operands must match
169 if( !_opnds[i]->cmp( *n._opnds[i] ) )
170 return 0; // mis-matched operands
171 return 1; // match
172 }
173
174 // Return an equivalent instruction using memory for cisc_operand position
175 MachNode *MachNode::cisc_version(int offset, Compile* C) {
176 ShouldNotCallThis();
177 return NULL;
178 }
179
180 void MachNode::use_cisc_RegMask() {
181 ShouldNotReachHere();
182 }
183
184
185 //-----------------------------in_RegMask--------------------------------------
186 const RegMask &MachNode::in_RegMask( uint idx ) const {
187 uint numopnds = num_opnds(); // Virtual call for number of operands
188 uint skipped = oper_input_base(); // Sum of leaves skipped so far
189 if( idx < skipped ) {
190 assert( ideal_Opcode() == Op_AddP, "expected base ptr here" );
191 assert( idx == 1, "expected base ptr here" );
192 // debug info can be anywhere
193 return *Compile::current()->matcher()->idealreg2spillmask[Op_RegP];
194 }
195 uint opcnt = 1; // First operand
196 uint num_edges = _opnds[1]->num_edges(); // leaves for first operand
197 while( idx >= skipped+num_edges ) {
198 skipped += num_edges;
199 opcnt++; // Bump operand count
200 assert( opcnt < numopnds, "Accessing non-existent operand" );
201 num_edges = _opnds[opcnt]->num_edges(); // leaves for next operand
202 }
203
204 const RegMask *rm = cisc_RegMask();
205 if( rm == NULL || (int)opcnt != cisc_operand() ) {
206 rm = _opnds[opcnt]->in_RegMask(idx-skipped);
207 }
208 return *rm;
209 }
210
211 //-----------------------------memory_inputs--------------------------------
212 const MachOper* MachNode::memory_inputs(Node* &base, Node* &index) const {
213 const MachOper* oper = memory_operand();
214
215 if (oper == (MachOper*)-1) {
216 base = NodeSentinel;
217 index = NodeSentinel;
218 } else {
219 base = NULL;
220 index = NULL;
221 if (oper != NULL) {
222 // It has a unique memory operand. Find its index.
223 int oper_idx = num_opnds();
224 while (--oper_idx >= 0) {
225 if (_opnds[oper_idx] == oper) break;
226 }
227 int oper_pos = operand_index(oper_idx);
228 int base_pos = oper->base_position();
229 if (base_pos >= 0) {
230 base = _in[oper_pos+base_pos];
231 }
232 int index_pos = oper->index_position();
233 if (index_pos >= 0) {
234 index = _in[oper_pos+index_pos];
235 }
236 }
237 }
238
239 return oper;
240 }
241
242 //-----------------------------get_base_and_disp----------------------------
243 const Node* MachNode::get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const {
244
245 // Find the memory inputs using our helper function
246 Node* base;
247 Node* index;
248 const MachOper* oper = memory_inputs(base, index);
249
250 if (oper == NULL) {
251 // Base has been set to NULL
252 offset = 0;
253 } else if (oper == (MachOper*)-1) {
254 // Base has been set to NodeSentinel
255 // There is not a unique memory use here. We will fall to AliasIdxBot.
256 offset = Type::OffsetBot;
257 } else {
258 // Base may be NULL, even if offset turns out to be != 0
259
260 intptr_t disp = oper->constant_disp();
261 int scale = oper->scale();
262 // Now we have collected every part of the ADLC MEMORY_INTER.
263 // See if it adds up to a base + offset.
264 if (index != NULL) {
265 const TypeNarrowOop* narrowoop = index->bottom_type()->isa_narrowoop();
266 if (narrowoop != NULL) { // EncodeN, LoadN, LoadConN, LoadNKlass.
267 // Memory references through narrow oops have a
268 // funny base so grab the type from the index:
269 // [R12 + narrow_oop_reg<<3 + offset]
270 assert(base == NULL, "Memory references through narrow oops have no base");
271 offset = disp;
272 adr_type = narrowoop->make_oopptr()->add_offset(offset);
273 return NULL;
274 } else if (!index->is_Con()) {
275 disp = Type::OffsetBot;
276 } else if (disp != Type::OffsetBot) {
277 const TypeX* ti = index->bottom_type()->isa_intptr_t();
278 if (ti == NULL) {
279 disp = Type::OffsetBot; // a random constant??
280 } else {
281 disp += ti->get_con() << scale;
282 }
283 }
284 }
285 offset = disp;
286
287 // In i486.ad, indOffset32X uses base==RegI and disp==RegP,
288 // this will prevent alias analysis without the following support:
289 // Lookup the TypePtr used by indOffset32X, a compile-time constant oop,
290 // Add the offset determined by the "base", or use Type::OffsetBot.
291 if( adr_type == TYPE_PTR_SENTINAL ) {
292 const TypePtr *t_disp = oper->disp_as_type(); // only !NULL for indOffset32X
293 if (t_disp != NULL) {
294 offset = Type::OffsetBot;
295 const Type* t_base = base->bottom_type();
296 if (t_base->isa_intptr_t()) {
297 const TypeX *t_offset = t_base->is_intptr_t();
298 if( t_offset->is_con() ) {
299 offset = t_offset->get_con();
300 }
301 }
302 adr_type = t_disp->add_offset(offset);
303 }
304 }
305
306 }
307 return base;
308 }
309
310
311 //---------------------------------adr_type---------------------------------
312 const class TypePtr *MachNode::adr_type() const {
313 intptr_t offset = 0;
314 const TypePtr *adr_type = TYPE_PTR_SENTINAL; // attempt computing adr_type
315 const Node *base = get_base_and_disp(offset, adr_type);
316 if( adr_type != TYPE_PTR_SENTINAL ) {
317 return adr_type; // get_base_and_disp has the answer
318 }
319
320 // Direct addressing modes have no base node, simply an indirect
321 // offset, which is always to raw memory.
322 // %%%%% Someday we'd like to allow constant oop offsets which
323 // would let Intel load from static globals in 1 instruction.
324 // Currently Intel requires 2 instructions and a register temp.
325 if (base == NULL) {
326 // NULL base, zero offset means no memory at all (a null pointer!)
327 if (offset == 0) {
328 return NULL;
329 }
330 // NULL base, any offset means any pointer whatever
331 if (offset == Type::OffsetBot) {
332 return TypePtr::BOTTOM;
333 }
334 // %%% make offset be intptr_t
335 assert(!Universe::heap()->is_in_reserved((oop)offset), "must be a raw ptr");
336 return TypeRawPtr::BOTTOM;
337 }
338
339 // base of -1 with no particular offset means all of memory
340 if (base == NodeSentinel) return TypePtr::BOTTOM;
341
342 const Type* t = base->bottom_type();
343 if (t->isa_intptr_t() && offset != 0 && offset != Type::OffsetBot) {
344 // We cannot assert that the offset does not look oop-ish here.
345 // Depending on the heap layout the cardmark base could land
346 // inside some oopish region. It definitely does for Win2K.
347 // The sum of cardmark-base plus shift-by-9-oop lands outside
348 // the oop-ish area but we can't assert for that statically.
349 return TypeRawPtr::BOTTOM;
350 }
351
352 const TypePtr *tp = t->isa_ptr();
353
354 // be conservative if we do not recognize the type
355 if (tp == NULL) {
356 return TypePtr::BOTTOM;
357 }
358 assert(tp->base() != Type::AnyPtr, "not a bare pointer");
359
360 return tp->add_offset(offset);
361 }
362
363
364 //-----------------------------operand_index---------------------------------
365 int MachNode::operand_index( uint operand ) const {
366 if( operand < 1 ) return -1;
367 assert(operand < num_opnds(), "oob");
368 if( _opnds[operand]->num_edges() == 0 ) return -1;
369
370 uint skipped = oper_input_base(); // Sum of leaves skipped so far
371 for (uint opcnt = 1; opcnt < operand; opcnt++) {
372 uint num_edges = _opnds[opcnt]->num_edges(); // leaves for operand
373 skipped += num_edges;
374 }
375 return skipped;
376 }
377
378
379 //------------------------------negate-----------------------------------------
380 // Negate conditional branches. Error for non-branch Nodes
381 void MachNode::negate() {
382 ShouldNotCallThis();
383 }
384
385 //------------------------------peephole---------------------------------------
386 // Apply peephole rule(s) to this instruction
387 MachNode *MachNode::peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ) {
388 return NULL;
389 }
390
391 //------------------------------add_case_label---------------------------------
392 // Adds the label for the case
393 void MachNode::add_case_label( int index_num, Label* blockLabel) {
394 ShouldNotCallThis();
395 }
396
397 //------------------------------label_set--------------------------------------
398 // Set the Label for a LabelOper, if an operand for this instruction
399 void MachNode::label_set( Label& label, uint block_num ) {
400 ShouldNotCallThis();
401 }
402
403 //------------------------------method_set-------------------------------------
404 // Set the absolute address of a method
405 void MachNode::method_set( intptr_t addr ) {
406 ShouldNotCallThis();
407 }
408
409 //------------------------------rematerialize----------------------------------
410 bool MachNode::rematerialize() const {
411 // Temps are always rematerializable
412 if (is_MachTemp()) return true;
413
414 uint r = rule(); // Match rule
415 if( r < Matcher::_begin_rematerialize ||
416 r >= Matcher::_end_rematerialize )
417 return false;
418
419 // For 2-address instructions, the input live range is also the output
420 // live range. Remateralizing does not make progress on the that live range.
421 if( two_adr() ) return false;
422
423 // Check for rematerializing float constants, or not
424 if( !Matcher::rematerialize_float_constants ) {
425 int op = ideal_Opcode();
426 if( op == Op_ConF || op == Op_ConD )
427 return false;
428 }
429
430 // Defining flags - can't spill these! Must remateralize.
431 if( ideal_reg() == Op_RegFlags )
432 return true;
433
434 // Stretching lots of inputs - don't do it.
435 if( req() > 2 )
436 return false;
437
438 // Don't remateralize somebody with bound inputs - it stretches a
439 // fixed register lifetime.
440 uint idx = oper_input_base();
441 if( req() > idx ) {
442 const RegMask &rm = in_RegMask(idx);
443 if( rm.is_bound1() || rm.is_bound2() )
444 return false;
445 }
446
447 return true;
448 }
449
450 #ifndef PRODUCT
451 //------------------------------dump_spec--------------------------------------
452 // Print any per-operand special info
453 void MachNode::dump_spec(outputStream *st) const {
454 uint cnt = num_opnds();
455 for( uint i=0; i<cnt; i++ )
456 _opnds[i]->dump_spec(st);
457 const TypePtr *t = adr_type();
458 if( t ) {
459 Compile* C = Compile::current();
460 if( C->alias_type(t)->is_volatile() )
461 st->print(" Volatile!");
462 }
463 }
464
465 //------------------------------dump_format------------------------------------
466 // access to virtual
467 void MachNode::dump_format(PhaseRegAlloc *ra, outputStream *st) const {
468 format(ra, st); // access to virtual
469 }
470 #endif
471
472 //=============================================================================
473 #ifndef PRODUCT
474 void MachTypeNode::dump_spec(outputStream *st) const {
475 _bottom_type->dump_on(st);
476 }
477 #endif
478
479 //=============================================================================
480 #ifndef PRODUCT
481 void MachNullCheckNode::format( PhaseRegAlloc *ra_, outputStream *st ) const {
482 int reg = ra_->get_reg_first(in(1)->in(_vidx));
483 tty->print("%s %s", Name(), Matcher::regName[reg]);
484 }
485 #endif
486
487 void MachNullCheckNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
488 // only emits entries in the null-pointer exception handler table
489 }
490
491 const RegMask &MachNullCheckNode::in_RegMask( uint idx ) const {
492 if( idx == 0 ) return RegMask::Empty;
493 else return in(1)->as_Mach()->out_RegMask();
494 }
495
496 //=============================================================================
497 const Type *MachProjNode::bottom_type() const {
498 if( _ideal_reg == fat_proj ) return Type::BOTTOM;
499 // Try the normal mechanism first
500 const Type *t = in(0)->bottom_type();
501 if( t->base() == Type::Tuple ) {
502 const TypeTuple *tt = t->is_tuple();
503 if (_con < tt->cnt())
504 return tt->field_at(_con);
505 }
506 // Else use generic type from ideal register set
507 assert((uint)_ideal_reg < (uint)_last_machine_leaf && Type::mreg2type[_ideal_reg], "in bounds");
508 return Type::mreg2type[_ideal_reg];
509 }
510
511 const TypePtr *MachProjNode::adr_type() const {
512 if (bottom_type() == Type::MEMORY) {
513 // in(0) might be a narrow MemBar; otherwise we will report TypePtr::BOTTOM
514 const TypePtr* adr_type = in(0)->adr_type();
515 #ifdef ASSERT
516 if (!is_error_reported() && !Node::in_dump())
517 assert(adr_type != NULL, "source must have adr_type");
518 #endif
519 return adr_type;
520 }
521 assert(bottom_type()->base() != Type::Memory, "no other memories?");
522 return NULL;
523 }
524
525 #ifndef PRODUCT
526 void MachProjNode::dump_spec(outputStream *st) const {
527 ProjNode::dump_spec(st);
528 switch (_ideal_reg) {
529 case unmatched_proj: st->print("/unmatched"); break;
530 case fat_proj: st->print("/fat"); if (WizardMode) _rout.dump(); break;
531 }
532 }
533 #endif
534
535 //=============================================================================
536 #ifndef PRODUCT
537 void MachIfNode::dump_spec(outputStream *st) const {
538 st->print("P=%f, C=%f",_prob, _fcnt);
539 }
540 #endif
541
542 //=============================================================================
543 uint MachReturnNode::size_of() const { return sizeof(*this); }
544
545 //------------------------------Registers--------------------------------------
546 const RegMask &MachReturnNode::in_RegMask( uint idx ) const {
547 return _in_rms[idx];
548 }
549
550 const TypePtr *MachReturnNode::adr_type() const {
551 // most returns and calls are assumed to consume & modify all of memory
552 // the matcher will copy non-wide adr_types from ideal originals
553 return _adr_type;
554 }
555
556 //=============================================================================
557 const Type *MachSafePointNode::bottom_type() const { return TypeTuple::MEMBAR; }
558
559 //------------------------------Registers--------------------------------------
560 const RegMask &MachSafePointNode::in_RegMask( uint idx ) const {
561 // Values in the domain use the users calling convention, embodied in the
562 // _in_rms array of RegMasks.
563 if( idx < TypeFunc::Parms ) return _in_rms[idx];
564
565 if (SafePointNode::needs_polling_address_input() &&
566 idx == TypeFunc::Parms &&
567 ideal_Opcode() == Op_SafePoint) {
568 return MachNode::in_RegMask(idx);
569 }
570
571 // Values outside the domain represent debug info
572 return *Compile::current()->matcher()->idealreg2spillmask[in(idx)->ideal_reg()];
573 }
574
575
576 //=============================================================================
577
578 uint MachCallNode::cmp( const Node &n ) const
579 { return _tf == ((MachCallNode&)n)._tf; }
580 const Type *MachCallNode::bottom_type() const { return tf()->range(); }
581 const Type *MachCallNode::Value(PhaseTransform *phase) const { return tf()->range(); }
582
583 #ifndef PRODUCT
584 void MachCallNode::dump_spec(outputStream *st) const {
585 st->print("# ");
586 tf()->dump_on(st);
587 if (_cnt != COUNT_UNKNOWN) st->print(" C=%f",_cnt);
588 if (jvms() != NULL) jvms()->dump_spec(st);
589 }
590 #endif
591
592
593 bool MachCallNode::return_value_is_used() const {
594 if (tf()->range()->cnt() == TypeFunc::Parms) {
595 // void return
596 return false;
597 }
598
599 // find the projection corresponding to the return value
600 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
601 Node *use = fast_out(i);
602 if (!use->is_Proj()) continue;
603 if (use->as_Proj()->_con == TypeFunc::Parms) {
604 return true;
605 }
606 }
607 return false;
608 }
609
610
611 //------------------------------Registers--------------------------------------
612 const RegMask &MachCallNode::in_RegMask( uint idx ) const {
613 // Values in the domain use the users calling convention, embodied in the
614 // _in_rms array of RegMasks.
615 if (idx < tf()->domain()->cnt()) return _in_rms[idx];
616 // Values outside the domain represent debug info
617 return *Compile::current()->matcher()->idealreg2debugmask[in(idx)->ideal_reg()];
618 }
619
620 //=============================================================================
621 uint MachCallJavaNode::size_of() const { return sizeof(*this); }
622 uint MachCallJavaNode::cmp( const Node &n ) const {
623 MachCallJavaNode &call = (MachCallJavaNode&)n;
624 return MachCallNode::cmp(call) && _method->equals(call._method);
625 }
626 #ifndef PRODUCT
627 void MachCallJavaNode::dump_spec(outputStream *st) const {
628 if( _method ) {
629 _method->print_short_name(st);
630 st->print(" ");
631 }
632 MachCallNode::dump_spec(st);
633 }
634 #endif
635
636 //=============================================================================
637 uint MachCallStaticJavaNode::size_of() const { return sizeof(*this); }
638 uint MachCallStaticJavaNode::cmp( const Node &n ) const {
639 MachCallStaticJavaNode &call = (MachCallStaticJavaNode&)n;
640 return MachCallJavaNode::cmp(call) && _name == call._name;
641 }
642
643 //----------------------------uncommon_trap_request----------------------------
644 // If this is an uncommon trap, return the request code, else zero.
645 int MachCallStaticJavaNode::uncommon_trap_request() const {
646 if (_name != NULL && !strcmp(_name, "uncommon_trap")) {
647 return CallStaticJavaNode::extract_uncommon_trap_request(this);
648 }
649 return 0;
650 }
651
652 #ifndef PRODUCT
653 // Helper for summarizing uncommon_trap arguments.
654 void MachCallStaticJavaNode::dump_trap_args(outputStream *st) const {
655 int trap_req = uncommon_trap_request();
656 if (trap_req != 0) {
657 char buf[100];
658 st->print("(%s)",
659 Deoptimization::format_trap_request(buf, sizeof(buf),
660 trap_req));
661 }
662 }
663
664 void MachCallStaticJavaNode::dump_spec(outputStream *st) const {
665 st->print("Static ");
666 if (_name != NULL) {
667 st->print("wrapper for: %s", _name );
668 dump_trap_args(st);
669 st->print(" ");
670 }
671 MachCallJavaNode::dump_spec(st);
672 }
673 #endif
674
675 //=============================================================================
676 #ifndef PRODUCT
677 void MachCallDynamicJavaNode::dump_spec(outputStream *st) const {
678 st->print("Dynamic ");
679 MachCallJavaNode::dump_spec(st);
680 }
681 #endif
682 //=============================================================================
683 uint MachCallRuntimeNode::size_of() const { return sizeof(*this); }
684 uint MachCallRuntimeNode::cmp( const Node &n ) const {
685 MachCallRuntimeNode &call = (MachCallRuntimeNode&)n;
686 return MachCallNode::cmp(call) && !strcmp(_name,call._name);
687 }
688 #ifndef PRODUCT
689 void MachCallRuntimeNode::dump_spec(outputStream *st) const {
690 st->print("%s ",_name);
691 MachCallNode::dump_spec(st);
692 }
693 #endif
694 //=============================================================================
695 // A shared JVMState for all HaltNodes. Indicates the start of debug info
696 // is at TypeFunc::Parms. Only required for SOE register spill handling -
697 // to indicate where the stack-slot-only debug info inputs begin.
698 // There is no other JVM state needed here.
699 JVMState jvms_for_throw(0);
700 JVMState *MachHaltNode::jvms() const {
701 return &jvms_for_throw;
702 }
703
704 //=============================================================================
705 #ifndef PRODUCT
706 void labelOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
707 st->print("B%d", _block_num);
708 }
709 #endif // PRODUCT
710
711 //=============================================================================
712 #ifndef PRODUCT
713 void methodOper::int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const {
714 st->print(INTPTR_FORMAT, _method);
715 }
716 #endif // PRODUCT