1 /*
   2  * Copyright 1998-2008 Sun Microsystems, Inc.  All Rights Reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
  20  * CA 95054 USA or visit www.sun.com if you need additional information or
  21  * have any questions.
  22  *
  23  */
  24 
  25 #include "incls/_precompiled.incl"
  26 #include "incls/_output.cpp.incl"
  27 
  28 extern uint size_java_to_interp();
  29 extern uint reloc_java_to_interp();
  30 extern uint size_exception_handler();
  31 extern uint size_deopt_handler();
  32 
  33 #ifndef PRODUCT
  34 #define DEBUG_ARG(x) , x
  35 #else
  36 #define DEBUG_ARG(x)
  37 #endif
  38 
  39 extern int emit_exception_handler(CodeBuffer &cbuf);
  40 extern int emit_deopt_handler(CodeBuffer &cbuf);
  41 
  42 //------------------------------Output-----------------------------------------
  43 // Convert Nodes to instruction bits and pass off to the VM
  44 void Compile::Output() {
  45   // RootNode goes
  46   assert( _cfg->_broot->_nodes.size() == 0, "" );
  47 
  48   // Initialize the space for the BufferBlob used to find and verify
  49   // instruction size in MachNode::emit_size()
  50   init_scratch_buffer_blob();
  51   if (failing())  return; // Out of memory
  52 
  53   // Make sure I can find the Start Node
  54   Block_Array& bbs = _cfg->_bbs;
  55   Block *entry = _cfg->_blocks[1];
  56   Block *broot = _cfg->_broot;
  57 
  58   const StartNode *start = entry->_nodes[0]->as_Start();
  59 
  60   // Replace StartNode with prolog
  61   MachPrologNode *prolog = new (this) MachPrologNode();
  62   entry->_nodes.map( 0, prolog );
  63   bbs.map( prolog->_idx, entry );
  64   bbs.map( start->_idx, NULL ); // start is no longer in any block
  65 
  66   // Virtual methods need an unverified entry point
  67 
  68   if( is_osr_compilation() ) {
  69     if( PoisonOSREntry ) {
  70       // TODO: Should use a ShouldNotReachHereNode...
  71       _cfg->insert( broot, 0, new (this) MachBreakpointNode() );
  72     }
  73   } else {
  74     if( _method && !_method->flags().is_static() ) {
  75       // Insert unvalidated entry point
  76       _cfg->insert( broot, 0, new (this) MachUEPNode() );
  77     }
  78 
  79   }
  80 
  81 
  82   // Break before main entry point
  83   if( (_method && _method->break_at_execute())
  84 #ifndef PRODUCT
  85     ||(OptoBreakpoint && is_method_compilation())
  86     ||(OptoBreakpointOSR && is_osr_compilation())
  87     ||(OptoBreakpointC2R && !_method)
  88 #endif
  89     ) {
  90     // checking for _method means that OptoBreakpoint does not apply to
  91     // runtime stubs or frame converters
  92     _cfg->insert( entry, 1, new (this) MachBreakpointNode() );
  93   }
  94 
  95   // Insert epilogs before every return
  96   for( uint i=0; i<_cfg->_num_blocks; i++ ) {
  97     Block *b = _cfg->_blocks[i];
  98     if( !b->is_connector() && b->non_connector_successor(0) == _cfg->_broot ) { // Found a program exit point?
  99       Node *m = b->end();
 100       if( m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt ) {
 101         MachEpilogNode *epilog = new (this) MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
 102         b->add_inst( epilog );
 103         bbs.map(epilog->_idx, b);
 104         //_regalloc->set_bad(epilog->_idx); // Already initialized this way.
 105       }
 106     }
 107   }
 108 
 109 # ifdef ENABLE_ZAP_DEAD_LOCALS
 110   if ( ZapDeadCompiledLocals )  Insert_zap_nodes();
 111 # endif
 112 
 113   ScheduleAndBundle();
 114 
 115 #ifndef PRODUCT
 116   if (trace_opto_output()) {
 117     tty->print("\n---- After ScheduleAndBundle ----\n");
 118     for (uint i = 0; i < _cfg->_num_blocks; i++) {
 119       tty->print("\nBB#%03d:\n", i);
 120       Block *bb = _cfg->_blocks[i];
 121       for (uint j = 0; j < bb->_nodes.size(); j++) {
 122         Node *n = bb->_nodes[j];
 123         OptoReg::Name reg = _regalloc->get_reg_first(n);
 124         tty->print(" %-6s ", reg >= 0 && reg < REG_COUNT ? Matcher::regName[reg] : "");
 125         n->dump();
 126       }
 127     }
 128   }
 129 #endif
 130 
 131   if (failing())  return;
 132 
 133   BuildOopMaps();
 134 
 135   if (failing())  return;
 136 
 137   Fill_buffer();
 138 }
 139 
 140 bool Compile::need_stack_bang(int frame_size_in_bytes) const {
 141   // Determine if we need to generate a stack overflow check.
 142   // Do it if the method is not a stub function and
 143   // has java calls or has frame size > vm_page_size/8.
 144   return (stub_function() == NULL &&
 145           (has_java_calls() || frame_size_in_bytes > os::vm_page_size()>>3));
 146 }
 147 
 148 bool Compile::need_register_stack_bang() const {
 149   // Determine if we need to generate a register stack overflow check.
 150   // This is only used on architectures which have split register
 151   // and memory stacks (ie. IA64).
 152   // Bang if the method is not a stub function and has java calls
 153   return (stub_function() == NULL && has_java_calls());
 154 }
 155 
 156 # ifdef ENABLE_ZAP_DEAD_LOCALS
 157 
 158 
 159 // In order to catch compiler oop-map bugs, we have implemented
 160 // a debugging mode called ZapDeadCompilerLocals.
 161 // This mode causes the compiler to insert a call to a runtime routine,
 162 // "zap_dead_locals", right before each place in compiled code
 163 // that could potentially be a gc-point (i.e., a safepoint or oop map point).
 164 // The runtime routine checks that locations mapped as oops are really
 165 // oops, that locations mapped as values do not look like oops,
 166 // and that locations mapped as dead are not used later
 167 // (by zapping them to an invalid address).
 168 
 169 int Compile::_CompiledZap_count = 0;
 170 
 171 void Compile::Insert_zap_nodes() {
 172   bool skip = false;
 173 
 174 
 175   // Dink with static counts because code code without the extra
 176   // runtime calls is MUCH faster for debugging purposes
 177 
 178        if ( CompileZapFirst  ==  0  ) ; // nothing special
 179   else if ( CompileZapFirst  >  CompiledZap_count() )  skip = true;
 180   else if ( CompileZapFirst  == CompiledZap_count() )
 181     warning("starting zap compilation after skipping");
 182 
 183        if ( CompileZapLast  ==  -1  ) ; // nothing special
 184   else if ( CompileZapLast  <   CompiledZap_count() )  skip = true;
 185   else if ( CompileZapLast  ==  CompiledZap_count() )
 186     warning("about to compile last zap");
 187 
 188   ++_CompiledZap_count; // counts skipped zaps, too
 189 
 190   if ( skip )  return;
 191 
 192 
 193   if ( _method == NULL )
 194     return; // no safepoints/oopmaps emitted for calls in stubs,so we don't care
 195 
 196   // Insert call to zap runtime stub before every node with an oop map
 197   for( uint i=0; i<_cfg->_num_blocks; i++ ) {
 198     Block *b = _cfg->_blocks[i];
 199     for ( uint j = 0;  j < b->_nodes.size();  ++j ) {
 200       Node *n = b->_nodes[j];
 201 
 202       // Determining if we should insert a zap-a-lot node in output.
 203       // We do that for all nodes that has oopmap info, except for calls
 204       // to allocation.  Calls to allocation passes in the old top-of-eden pointer
 205       // and expect the C code to reset it.  Hence, there can be no safepoints between
 206       // the inlined-allocation and the call to new_Java, etc.
 207       // We also cannot zap monitor calls, as they must hold the microlock
 208       // during the call to Zap, which also wants to grab the microlock.
 209       bool insert = n->is_MachSafePoint() && (n->as_MachSafePoint()->oop_map() != NULL);
 210       if ( insert ) { // it is MachSafePoint
 211         if ( !n->is_MachCall() ) {
 212           insert = false;
 213         } else if ( n->is_MachCall() ) {
 214           MachCallNode* call = n->as_MachCall();
 215           if (call->entry_point() == OptoRuntime::new_instance_Java() ||
 216               call->entry_point() == OptoRuntime::new_array_Java() ||
 217               call->entry_point() == OptoRuntime::multianewarray2_Java() ||
 218               call->entry_point() == OptoRuntime::multianewarray3_Java() ||
 219               call->entry_point() == OptoRuntime::multianewarray4_Java() ||
 220               call->entry_point() == OptoRuntime::multianewarray5_Java() ||
 221               call->entry_point() == OptoRuntime::slow_arraycopy_Java() ||
 222               call->entry_point() == OptoRuntime::complete_monitor_locking_Java()
 223               ) {
 224             insert = false;
 225           }
 226         }
 227         if (insert) {
 228           Node *zap = call_zap_node(n->as_MachSafePoint(), i);
 229           b->_nodes.insert( j, zap );
 230           _cfg->_bbs.map( zap->_idx, b );
 231           ++j;
 232         }
 233       }
 234     }
 235   }
 236 }
 237 
 238 
 239 Node* Compile::call_zap_node(MachSafePointNode* node_to_check, int block_no) {
 240   const TypeFunc *tf = OptoRuntime::zap_dead_locals_Type();
 241   CallStaticJavaNode* ideal_node =
 242     new (this, tf->domain()->cnt()) CallStaticJavaNode( tf,
 243          OptoRuntime::zap_dead_locals_stub(_method->flags().is_native()),
 244                             "call zap dead locals stub", 0, TypePtr::BOTTOM);
 245   // We need to copy the OopMap from the site we're zapping at.
 246   // We have to make a copy, because the zap site might not be
 247   // a call site, and zap_dead is a call site.
 248   OopMap* clone = node_to_check->oop_map()->deep_copy();
 249 
 250   // Add the cloned OopMap to the zap node
 251   ideal_node->set_oop_map(clone);
 252   return _matcher->match_sfpt(ideal_node);
 253 }
 254 
 255 //------------------------------is_node_getting_a_safepoint--------------------
 256 bool Compile::is_node_getting_a_safepoint( Node* n) {
 257   // This code duplicates the logic prior to the call of add_safepoint
 258   // below in this file.
 259   if( n->is_MachSafePoint() ) return true;
 260   return false;
 261 }
 262 
 263 # endif // ENABLE_ZAP_DEAD_LOCALS
 264 
 265 //------------------------------compute_loop_first_inst_sizes------------------
 266 // Compute the size of first NumberOfLoopInstrToAlign instructions at head
 267 // of a loop. When aligning a loop we need to provide enough instructions
 268 // in cpu's fetch buffer to feed decoders. The loop alignment could be
 269 // avoided if we have enough instructions in fetch buffer at the head of a loop.
 270 // By default, the size is set to 999999 by Block's constructor so that
 271 // a loop will be aligned if the size is not reset here.
 272 //
 273 // Note: Mach instructions could contain several HW instructions
 274 // so the size is estimated only.
 275 //
 276 void Compile::compute_loop_first_inst_sizes() {
 277   // The next condition is used to gate the loop alignment optimization.
 278   // Don't aligned a loop if there are enough instructions at the head of a loop
 279   // or alignment padding is larger then MaxLoopPad. By default, MaxLoopPad
 280   // is equal to OptoLoopAlignment-1 except on new Intel cpus, where it is
 281   // equal to 11 bytes which is the largest address NOP instruction.
 282   if( MaxLoopPad < OptoLoopAlignment-1 ) {
 283     uint last_block = _cfg->_num_blocks-1;
 284     for( uint i=1; i <= last_block; i++ ) {
 285       Block *b = _cfg->_blocks[i];
 286       // Check the first loop's block which requires an alignment.
 287       if( b->head()->is_Loop() &&
 288           b->code_alignment() > (uint)relocInfo::addr_unit() ) {
 289         uint sum_size = 0;
 290         uint inst_cnt = NumberOfLoopInstrToAlign;
 291         inst_cnt = b->compute_first_inst_size(sum_size, inst_cnt,
 292                                               _regalloc);
 293         // Check the next fallthrough block if first loop's block does not have
 294         // enough instructions.
 295         if( inst_cnt > 0 && i < last_block ) {
 296           // First, check if the first loop's block contains whole loop.
 297           // LoopNode::LoopBackControl == 2.
 298           Block *bx = _cfg->_bbs[b->pred(2)->_idx];
 299           // Skip connector blocks (with limit in case of irreducible loops).
 300           int search_limit = 16;
 301           while( bx->is_connector() && search_limit-- > 0) {
 302             bx = _cfg->_bbs[bx->pred(1)->_idx];
 303           }
 304           if( bx != b ) { // loop body is in several blocks.
 305             Block *nb = NULL;
 306             while( inst_cnt > 0 && i < last_block && nb != bx &&
 307                   !_cfg->_blocks[i+1]->head()->is_Loop() ) {
 308               i++;
 309               nb = _cfg->_blocks[i];
 310               inst_cnt  = nb->compute_first_inst_size(sum_size, inst_cnt,
 311                                                       _regalloc);
 312             } // while( inst_cnt > 0 && i < last_block  )
 313           } // if( bx != b )
 314         } // if( inst_cnt > 0 && i < last_block )
 315         b->set_first_inst_size(sum_size);
 316       } // f( b->head()->is_Loop() )
 317     } // for( i <= last_block )
 318   } // if( MaxLoopPad < OptoLoopAlignment-1 )
 319 }
 320 
 321 //----------------------Shorten_branches---------------------------------------
 322 // The architecture description provides short branch variants for some long
 323 // branch instructions. Replace eligible long branches with short branches.
 324 void Compile::Shorten_branches(Label *labels, int& code_size, int& reloc_size, int& stub_size, int& const_size) {
 325 
 326   // fill in the nop array for bundling computations
 327   MachNode *_nop_list[Bundle::_nop_count];
 328   Bundle::initialize_nops(_nop_list, this);
 329 
 330   // ------------------
 331   // Compute size of each block, method size, and relocation information size
 332   uint *jmp_end    = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks);
 333   uint *blk_starts = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks+1);
 334   DEBUG_ONLY( uint *jmp_target = NEW_RESOURCE_ARRAY(uint,_cfg->_num_blocks); )
 335   blk_starts[0]    = 0;
 336 
 337   // Initialize the sizes to 0
 338   code_size  = 0;          // Size in bytes of generated code
 339   stub_size  = 0;          // Size in bytes of all stub entries
 340   // Size in bytes of all relocation entries, including those in local stubs.
 341   // Start with 2-bytes of reloc info for the unvalidated entry point
 342   reloc_size = 1;          // Number of relocation entries
 343   const_size = 0;          // size of fp constants in words
 344 
 345   // Make three passes.  The first computes pessimistic blk_starts,
 346   // relative jmp_end, reloc_size and const_size information.
 347   // The second performs short branch substitution using the pessimistic
 348   // sizing. The third inserts nops where needed.
 349 
 350   Node *nj; // tmp
 351 
 352   // Step one, perform a pessimistic sizing pass.
 353   uint i;
 354   uint min_offset_from_last_call = 1;  // init to a positive value
 355   uint nop_size = (new (this) MachNopNode())->size(_regalloc);
 356   for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
 357     Block *b = _cfg->_blocks[i];
 358 
 359     // Sum all instruction sizes to compute block size
 360     uint last_inst = b->_nodes.size();
 361     uint blk_size = 0;
 362     for( uint j = 0; j<last_inst; j++ ) {
 363       nj = b->_nodes[j];
 364       uint inst_size = nj->size(_regalloc);
 365       blk_size += inst_size;
 366       // Handle machine instruction nodes
 367       if( nj->is_Mach() ) {
 368         MachNode *mach = nj->as_Mach();
 369         blk_size += (mach->alignment_required() - 1) * relocInfo::addr_unit(); // assume worst case padding
 370         reloc_size += mach->reloc();
 371         const_size += mach->const_size();
 372         if( mach->is_MachCall() ) {
 373           MachCallNode *mcall = mach->as_MachCall();
 374           // This destination address is NOT PC-relative
 375 
 376           mcall->method_set((intptr_t)mcall->entry_point());
 377 
 378           if( mcall->is_MachCallJava() && mcall->as_MachCallJava()->_method ) {
 379             stub_size  += size_java_to_interp();
 380             reloc_size += reloc_java_to_interp();
 381           }
 382         } else if (mach->is_MachSafePoint()) {
 383           // If call/safepoint are adjacent, account for possible
 384           // nop to disambiguate the two safepoints.
 385           if (min_offset_from_last_call == 0) {
 386             blk_size += nop_size;
 387           }
 388         }
 389       }
 390       min_offset_from_last_call += inst_size;
 391       // Remember end of call offset
 392       if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
 393         min_offset_from_last_call = 0;
 394       }
 395     }
 396 
 397     // During short branch replacement, we store the relative (to blk_starts)
 398     // end of jump in jmp_end, rather than the absolute end of jump.  This
 399     // is so that we do not need to recompute sizes of all nodes when we compute
 400     // correct blk_starts in our next sizing pass.
 401     jmp_end[i] = blk_size;
 402     DEBUG_ONLY( jmp_target[i] = 0; )
 403 
 404     // When the next block starts a loop, we may insert pad NOP
 405     // instructions.  Since we cannot know our future alignment,
 406     // assume the worst.
 407     if( i<_cfg->_num_blocks-1 ) {
 408       Block *nb = _cfg->_blocks[i+1];
 409       int max_loop_pad = nb->code_alignment()-relocInfo::addr_unit();
 410       if( max_loop_pad > 0 ) {
 411         assert(is_power_of_2(max_loop_pad+relocInfo::addr_unit()), "");
 412         blk_size += max_loop_pad;
 413       }
 414     }
 415 
 416     // Save block size; update total method size
 417     blk_starts[i+1] = blk_starts[i]+blk_size;
 418   }
 419 
 420   // Step two, replace eligible long jumps.
 421 
 422   // Note: this will only get the long branches within short branch
 423   //   range. Another pass might detect more branches that became
 424   //   candidates because the shortening in the first pass exposed
 425   //   more opportunities. Unfortunately, this would require
 426   //   recomputing the starting and ending positions for the blocks
 427   for( i=0; i<_cfg->_num_blocks; i++ ) {
 428     Block *b = _cfg->_blocks[i];
 429 
 430     int j;
 431     // Find the branch; ignore trailing NOPs.
 432     for( j = b->_nodes.size()-1; j>=0; j-- ) {
 433       nj = b->_nodes[j];
 434       if( !nj->is_Mach() || nj->as_Mach()->ideal_Opcode() != Op_Con )
 435         break;
 436     }
 437 
 438     if (j >= 0) {
 439       if( nj->is_Mach() && nj->as_Mach()->may_be_short_branch() ) {
 440         MachNode *mach = nj->as_Mach();
 441         // This requires the TRUE branch target be in succs[0]
 442         uint bnum = b->non_connector_successor(0)->_pre_order;
 443         uintptr_t target = blk_starts[bnum];
 444         if( mach->is_pc_relative() ) {
 445           int offset = target-(blk_starts[i] + jmp_end[i]);
 446           if (_matcher->is_short_branch_offset(offset)) {
 447             // We've got a winner.  Replace this branch.
 448             MachNode *replacement = mach->short_branch_version(this);
 449             b->_nodes.map(j, replacement);
 450             mach->subsume_by(replacement);
 451 
 452             // Update the jmp_end size to save time in our
 453             // next pass.
 454             jmp_end[i] -= (mach->size(_regalloc) - replacement->size(_regalloc));
 455             DEBUG_ONLY( jmp_target[i] = bnum; );
 456           }
 457         } else {
 458 #ifndef PRODUCT
 459           mach->dump(3);
 460 #endif
 461           Unimplemented();
 462         }
 463       }
 464     }
 465   }
 466 
 467   // Compute the size of first NumberOfLoopInstrToAlign instructions at head
 468   // of a loop. It is used to determine the padding for loop alignment.
 469   compute_loop_first_inst_sizes();
 470 
 471   // Step 3, compute the offsets of all the labels
 472   uint last_call_adr = max_uint;
 473   for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
 474     // copy the offset of the beginning to the corresponding label
 475     assert(labels[i].is_unused(), "cannot patch at this point");
 476     labels[i].bind_loc(blk_starts[i], CodeBuffer::SECT_INSTS);
 477 
 478     // insert padding for any instructions that need it
 479     Block *b = _cfg->_blocks[i];
 480     uint last_inst = b->_nodes.size();
 481     uint adr = blk_starts[i];
 482     for( uint j = 0; j<last_inst; j++ ) {
 483       nj = b->_nodes[j];
 484       if( nj->is_Mach() ) {
 485         int padding = nj->as_Mach()->compute_padding(adr);
 486         // If call/safepoint are adjacent insert a nop (5010568)
 487         if (padding == 0 && nj->is_MachSafePoint() && !nj->is_MachCall() &&
 488             adr == last_call_adr ) {
 489           padding = nop_size;
 490         }
 491         if(padding > 0) {
 492           assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
 493           int nops_cnt = padding / nop_size;
 494           MachNode *nop = new (this) MachNopNode(nops_cnt);
 495           b->_nodes.insert(j++, nop);
 496           _cfg->_bbs.map( nop->_idx, b );
 497           adr += padding;
 498           last_inst++;
 499         }
 500       }
 501       adr += nj->size(_regalloc);
 502 
 503       // Remember end of call offset
 504       if (nj->is_MachCall() && nj->as_MachCall()->is_safepoint_node()) {
 505         last_call_adr = adr;
 506       }
 507     }
 508 
 509     if ( i != _cfg->_num_blocks-1) {
 510       // Get the size of the block
 511       uint blk_size = adr - blk_starts[i];
 512 
 513       // When the next block starts a loop, we may insert pad NOP
 514       // instructions.
 515       Block *nb = _cfg->_blocks[i+1];
 516       int current_offset = blk_starts[i] + blk_size;
 517       current_offset += nb->alignment_padding(current_offset);
 518       // Save block size; update total method size
 519       blk_starts[i+1] = current_offset;
 520     }
 521   }
 522 
 523 #ifdef ASSERT
 524   for( i=0; i<_cfg->_num_blocks; i++ ) { // For all blocks
 525     if( jmp_target[i] != 0 ) {
 526       int offset = blk_starts[jmp_target[i]]-(blk_starts[i] + jmp_end[i]);
 527       if (!_matcher->is_short_branch_offset(offset)) {
 528         tty->print_cr("target (%d) - jmp_end(%d) = offset (%d), jmp_block B%d, target_block B%d", blk_starts[jmp_target[i]], blk_starts[i] + jmp_end[i], offset, i, jmp_target[i]);
 529       }
 530       assert(_matcher->is_short_branch_offset(offset), "Displacement too large for short jmp");
 531     }
 532   }
 533 #endif
 534 
 535   // ------------------
 536   // Compute size for code buffer
 537   code_size   = blk_starts[i-1] + jmp_end[i-1];
 538 
 539   // Relocation records
 540   reloc_size += 1;              // Relo entry for exception handler
 541 
 542   // Adjust reloc_size to number of record of relocation info
 543   // Min is 2 bytes, max is probably 6 or 8, with a tax up to 25% for
 544   // a relocation index.
 545   // The CodeBuffer will expand the locs array if this estimate is too low.
 546   reloc_size   *= 10 / sizeof(relocInfo);
 547 
 548   // Adjust const_size to number of bytes
 549   const_size   *= 2*jintSize; // both float and double take two words per entry
 550 
 551 }
 552 
 553 //------------------------------FillLocArray-----------------------------------
 554 // Create a bit of debug info and append it to the array.  The mapping is from
 555 // Java local or expression stack to constant, register or stack-slot.  For
 556 // doubles, insert 2 mappings and return 1 (to tell the caller that the next
 557 // entry has been taken care of and caller should skip it).
 558 static LocationValue *new_loc_value( PhaseRegAlloc *ra, OptoReg::Name regnum, Location::Type l_type ) {
 559   // This should never have accepted Bad before
 560   assert(OptoReg::is_valid(regnum), "location must be valid");
 561   return (OptoReg::is_reg(regnum))
 562     ? new LocationValue(Location::new_reg_loc(l_type, OptoReg::as_VMReg(regnum)) )
 563     : new LocationValue(Location::new_stk_loc(l_type,  ra->reg2offset(regnum)));
 564 }
 565 
 566 
 567 ObjectValue*
 568 Compile::sv_for_node_id(GrowableArray<ScopeValue*> *objs, int id) {
 569   for (int i = 0; i < objs->length(); i++) {
 570     assert(objs->at(i)->is_object(), "corrupt object cache");
 571     ObjectValue* sv = (ObjectValue*) objs->at(i);
 572     if (sv->id() == id) {
 573       return sv;
 574     }
 575   }
 576   // Otherwise..
 577   return NULL;
 578 }
 579 
 580 void Compile::set_sv_for_object_node(GrowableArray<ScopeValue*> *objs,
 581                                      ObjectValue* sv ) {
 582   assert(sv_for_node_id(objs, sv->id()) == NULL, "Precondition");
 583   objs->append(sv);
 584 }
 585 
 586 
 587 void Compile::FillLocArray( int idx, MachSafePointNode* sfpt, Node *local,
 588                             GrowableArray<ScopeValue*> *array,
 589                             GrowableArray<ScopeValue*> *objs ) {
 590   assert( local, "use _top instead of null" );
 591   if (array->length() != idx) {
 592     assert(array->length() == idx + 1, "Unexpected array count");
 593     // Old functionality:
 594     //   return
 595     // New functionality:
 596     //   Assert if the local is not top. In product mode let the new node
 597     //   override the old entry.
 598     assert(local == top(), "LocArray collision");
 599     if (local == top()) {
 600       return;
 601     }
 602     array->pop();
 603   }
 604   const Type *t = local->bottom_type();
 605 
 606   // Is it a safepoint scalar object node?
 607   if (local->is_SafePointScalarObject()) {
 608     SafePointScalarObjectNode* spobj = local->as_SafePointScalarObject();
 609 
 610     ObjectValue* sv = Compile::sv_for_node_id(objs, spobj->_idx);
 611     if (sv == NULL) {
 612       ciKlass* cik = t->is_oopptr()->klass();
 613       assert(cik->is_instance_klass() ||
 614              cik->is_array_klass(), "Not supported allocation.");
 615       sv = new ObjectValue(spobj->_idx,
 616                            new ConstantOopWriteValue(cik->encoding()));
 617       Compile::set_sv_for_object_node(objs, sv);
 618 
 619       uint first_ind = spobj->first_index();
 620       for (uint i = 0; i < spobj->n_fields(); i++) {
 621         Node* fld_node = sfpt->in(first_ind+i);
 622         (void)FillLocArray(sv->field_values()->length(), sfpt, fld_node, sv->field_values(), objs);
 623       }
 624     }
 625     array->append(sv);
 626     return;
 627   }
 628 
 629   // Grab the register number for the local
 630   OptoReg::Name regnum = _regalloc->get_reg_first(local);
 631   if( OptoReg::is_valid(regnum) ) {// Got a register/stack?
 632     // Record the double as two float registers.
 633     // The register mask for such a value always specifies two adjacent
 634     // float registers, with the lower register number even.
 635     // Normally, the allocation of high and low words to these registers
 636     // is irrelevant, because nearly all operations on register pairs
 637     // (e.g., StoreD) treat them as a single unit.
 638     // Here, we assume in addition that the words in these two registers
 639     // stored "naturally" (by operations like StoreD and double stores
 640     // within the interpreter) such that the lower-numbered register
 641     // is written to the lower memory address.  This may seem like
 642     // a machine dependency, but it is not--it is a requirement on
 643     // the author of the <arch>.ad file to ensure that, for every
 644     // even/odd double-register pair to which a double may be allocated,
 645     // the word in the even single-register is stored to the first
 646     // memory word.  (Note that register numbers are completely
 647     // arbitrary, and are not tied to any machine-level encodings.)
 648 #ifdef _LP64
 649     if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon ) {
 650       array->append(new ConstantIntValue(0));
 651       array->append(new_loc_value( _regalloc, regnum, Location::dbl ));
 652     } else if ( t->base() == Type::Long ) {
 653       array->append(new ConstantIntValue(0));
 654       array->append(new_loc_value( _regalloc, regnum, Location::lng ));
 655     } else if ( t->base() == Type::RawPtr ) {
 656       // jsr/ret return address which must be restored into a the full
 657       // width 64-bit stack slot.
 658       array->append(new_loc_value( _regalloc, regnum, Location::lng ));
 659     }
 660 #else //_LP64
 661 #ifdef SPARC
 662     if (t->base() == Type::Long && OptoReg::is_reg(regnum)) {
 663       // For SPARC we have to swap high and low words for
 664       // long values stored in a single-register (g0-g7).
 665       array->append(new_loc_value( _regalloc,              regnum   , Location::normal ));
 666       array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
 667     } else
 668 #endif //SPARC
 669     if( t->base() == Type::DoubleBot || t->base() == Type::DoubleCon || t->base() == Type::Long ) {
 670       // Repack the double/long as two jints.
 671       // The convention the interpreter uses is that the second local
 672       // holds the first raw word of the native double representation.
 673       // This is actually reasonable, since locals and stack arrays
 674       // grow downwards in all implementations.
 675       // (If, on some machine, the interpreter's Java locals or stack
 676       // were to grow upwards, the embedded doubles would be word-swapped.)
 677       array->append(new_loc_value( _regalloc, OptoReg::add(regnum,1), Location::normal ));
 678       array->append(new_loc_value( _regalloc,              regnum   , Location::normal ));
 679     }
 680 #endif //_LP64
 681     else if( (t->base() == Type::FloatBot || t->base() == Type::FloatCon) &&
 682                OptoReg::is_reg(regnum) ) {
 683       array->append(new_loc_value( _regalloc, regnum, Matcher::float_in_double
 684                                    ? Location::float_in_dbl : Location::normal ));
 685     } else if( t->base() == Type::Int && OptoReg::is_reg(regnum) ) {
 686       array->append(new_loc_value( _regalloc, regnum, Matcher::int_in_long
 687                                    ? Location::int_in_long : Location::normal ));
 688     } else if( t->base() == Type::NarrowOop ) {
 689       array->append(new_loc_value( _regalloc, regnum, Location::narrowoop ));
 690     } else {
 691       array->append(new_loc_value( _regalloc, regnum, _regalloc->is_oop(local) ? Location::oop : Location::normal ));
 692     }
 693     return;
 694   }
 695 
 696   // No register.  It must be constant data.
 697   switch (t->base()) {
 698   case Type::Half:              // Second half of a double
 699     ShouldNotReachHere();       // Caller should skip 2nd halves
 700     break;
 701   case Type::AnyPtr:
 702     array->append(new ConstantOopWriteValue(NULL));
 703     break;
 704   case Type::AryPtr:
 705   case Type::InstPtr:
 706   case Type::KlassPtr:          // fall through
 707     array->append(new ConstantOopWriteValue(t->isa_oopptr()->const_oop()->encoding()));
 708     break;
 709   case Type::NarrowOop:
 710     if (t == TypeNarrowOop::NULL_PTR) {
 711       array->append(new ConstantOopWriteValue(NULL));
 712     } else {
 713       array->append(new ConstantOopWriteValue(t->make_ptr()->isa_oopptr()->const_oop()->encoding()));
 714     }
 715     break;
 716   case Type::Int:
 717     array->append(new ConstantIntValue(t->is_int()->get_con()));
 718     break;
 719   case Type::RawPtr:
 720     // A return address (T_ADDRESS).
 721     assert((intptr_t)t->is_ptr()->get_con() < (intptr_t)0x10000, "must be a valid BCI");
 722 #ifdef _LP64
 723     // Must be restored to the full-width 64-bit stack slot.
 724     array->append(new ConstantLongValue(t->is_ptr()->get_con()));
 725 #else
 726     array->append(new ConstantIntValue(t->is_ptr()->get_con()));
 727 #endif
 728     break;
 729   case Type::FloatCon: {
 730     float f = t->is_float_constant()->getf();
 731     array->append(new ConstantIntValue(jint_cast(f)));
 732     break;
 733   }
 734   case Type::DoubleCon: {
 735     jdouble d = t->is_double_constant()->getd();
 736 #ifdef _LP64
 737     array->append(new ConstantIntValue(0));
 738     array->append(new ConstantDoubleValue(d));
 739 #else
 740     // Repack the double as two jints.
 741     // The convention the interpreter uses is that the second local
 742     // holds the first raw word of the native double representation.
 743     // This is actually reasonable, since locals and stack arrays
 744     // grow downwards in all implementations.
 745     // (If, on some machine, the interpreter's Java locals or stack
 746     // were to grow upwards, the embedded doubles would be word-swapped.)
 747     jint   *dp = (jint*)&d;
 748     array->append(new ConstantIntValue(dp[1]));
 749     array->append(new ConstantIntValue(dp[0]));
 750 #endif
 751     break;
 752   }
 753   case Type::Long: {
 754     jlong d = t->is_long()->get_con();
 755 #ifdef _LP64
 756     array->append(new ConstantIntValue(0));
 757     array->append(new ConstantLongValue(d));
 758 #else
 759     // Repack the long as two jints.
 760     // The convention the interpreter uses is that the second local
 761     // holds the first raw word of the native double representation.
 762     // This is actually reasonable, since locals and stack arrays
 763     // grow downwards in all implementations.
 764     // (If, on some machine, the interpreter's Java locals or stack
 765     // were to grow upwards, the embedded doubles would be word-swapped.)
 766     jint *dp = (jint*)&d;
 767     array->append(new ConstantIntValue(dp[1]));
 768     array->append(new ConstantIntValue(dp[0]));
 769 #endif
 770     break;
 771   }
 772   case Type::Top:               // Add an illegal value here
 773     array->append(new LocationValue(Location()));
 774     break;
 775   default:
 776     ShouldNotReachHere();
 777     break;
 778   }
 779 }
 780 
 781 // Determine if this node starts a bundle
 782 bool Compile::starts_bundle(const Node *n) const {
 783   return (_node_bundling_limit > n->_idx &&
 784           _node_bundling_base[n->_idx].starts_bundle());
 785 }
 786 
 787 //--------------------------Process_OopMap_Node--------------------------------
 788 void Compile::Process_OopMap_Node(MachNode *mach, int current_offset) {
 789 
 790   // Handle special safepoint nodes for synchronization
 791   MachSafePointNode *sfn   = mach->as_MachSafePoint();
 792   MachCallNode      *mcall;
 793 
 794 #ifdef ENABLE_ZAP_DEAD_LOCALS
 795   assert( is_node_getting_a_safepoint(mach),  "logic does not match; false negative");
 796 #endif
 797 
 798   int safepoint_pc_offset = current_offset;
 799 
 800   // Add the safepoint in the DebugInfoRecorder
 801   if( !mach->is_MachCall() ) {
 802     mcall = NULL;
 803     debug_info()->add_safepoint(safepoint_pc_offset, sfn->_oop_map);
 804   } else {
 805     mcall = mach->as_MachCall();
 806     safepoint_pc_offset += mcall->ret_addr_offset();
 807     debug_info()->add_safepoint(safepoint_pc_offset, mcall->_oop_map);
 808   }
 809 
 810   // Loop over the JVMState list to add scope information
 811   // Do not skip safepoints with a NULL method, they need monitor info
 812   JVMState* youngest_jvms = sfn->jvms();
 813   int max_depth = youngest_jvms->depth();
 814 
 815   // Allocate the object pool for scalar-replaced objects -- the map from
 816   // small-integer keys (which can be recorded in the local and ostack
 817   // arrays) to descriptions of the object state.
 818   GrowableArray<ScopeValue*> *objs = new GrowableArray<ScopeValue*>();
 819 
 820   // Visit scopes from oldest to youngest.
 821   for (int depth = 1; depth <= max_depth; depth++) {
 822     JVMState* jvms = youngest_jvms->of_depth(depth);
 823     int idx;
 824     ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
 825     // Safepoints that do not have method() set only provide oop-map and monitor info
 826     // to support GC; these do not support deoptimization.
 827     int num_locs = (method == NULL) ? 0 : jvms->loc_size();
 828     int num_exps = (method == NULL) ? 0 : jvms->stk_size();
 829     int num_mon  = jvms->nof_monitors();
 830     assert(method == NULL || jvms->bci() < 0 || num_locs == method->max_locals(),
 831            "JVMS local count must match that of the method");
 832 
 833     // Add Local and Expression Stack Information
 834 
 835     // Insert locals into the locarray
 836     GrowableArray<ScopeValue*> *locarray = new GrowableArray<ScopeValue*>(num_locs);
 837     for( idx = 0; idx < num_locs; idx++ ) {
 838       FillLocArray( idx, sfn, sfn->local(jvms, idx), locarray, objs );
 839     }
 840 
 841     // Insert expression stack entries into the exparray
 842     GrowableArray<ScopeValue*> *exparray = new GrowableArray<ScopeValue*>(num_exps);
 843     for( idx = 0; idx < num_exps; idx++ ) {
 844       FillLocArray( idx,  sfn, sfn->stack(jvms, idx), exparray, objs );
 845     }
 846 
 847     // Add in mappings of the monitors
 848     assert( !method ||
 849             !method->is_synchronized() ||
 850             method->is_native() ||
 851             num_mon > 0 ||
 852             !GenerateSynchronizationCode,
 853             "monitors must always exist for synchronized methods");
 854 
 855     // Build the growable array of ScopeValues for exp stack
 856     GrowableArray<MonitorValue*> *monarray = new GrowableArray<MonitorValue*>(num_mon);
 857 
 858     // Loop over monitors and insert into array
 859     for(idx = 0; idx < num_mon; idx++) {
 860       // Grab the node that defines this monitor
 861       Node* box_node;
 862       Node* obj_node;
 863       box_node = sfn->monitor_box(jvms, idx);
 864       obj_node = sfn->monitor_obj(jvms, idx);
 865 
 866       // Create ScopeValue for object
 867       ScopeValue *scval = NULL;
 868 
 869       if( obj_node->is_SafePointScalarObject() ) {
 870         SafePointScalarObjectNode* spobj = obj_node->as_SafePointScalarObject();
 871         scval = Compile::sv_for_node_id(objs, spobj->_idx);
 872         if (scval == NULL) {
 873           const Type *t = obj_node->bottom_type();
 874           ciKlass* cik = t->is_oopptr()->klass();
 875           assert(cik->is_instance_klass() ||
 876                  cik->is_array_klass(), "Not supported allocation.");
 877           ObjectValue* sv = new ObjectValue(spobj->_idx,
 878                                 new ConstantOopWriteValue(cik->encoding()));
 879           Compile::set_sv_for_object_node(objs, sv);
 880 
 881           uint first_ind = spobj->first_index();
 882           for (uint i = 0; i < spobj->n_fields(); i++) {
 883             Node* fld_node = sfn->in(first_ind+i);
 884             (void)FillLocArray(sv->field_values()->length(), sfn, fld_node, sv->field_values(), objs);
 885           }
 886           scval = sv;
 887         }
 888       } else if( !obj_node->is_Con() ) {
 889         OptoReg::Name obj_reg = _regalloc->get_reg_first(obj_node);
 890         if( obj_node->bottom_type()->base() == Type::NarrowOop ) {
 891           scval = new_loc_value( _regalloc, obj_reg, Location::narrowoop );
 892         } else {
 893           scval = new_loc_value( _regalloc, obj_reg, Location::oop );
 894         }
 895       } else {
 896         const TypePtr *tp = obj_node->bottom_type()->make_ptr();
 897         scval = new ConstantOopWriteValue(tp->is_instptr()->const_oop()->encoding());
 898       }
 899 
 900       OptoReg::Name box_reg = BoxLockNode::stack_slot(box_node);
 901       Location basic_lock = Location::new_stk_loc(Location::normal,_regalloc->reg2offset(box_reg));
 902       monarray->append(new MonitorValue(scval, basic_lock, box_node->as_BoxLock()->is_eliminated()));
 903     }
 904 
 905     // We dump the object pool first, since deoptimization reads it in first.
 906     debug_info()->dump_object_pool(objs);
 907 
 908     // Build first class objects to pass to scope
 909     DebugToken *locvals = debug_info()->create_scope_values(locarray);
 910     DebugToken *expvals = debug_info()->create_scope_values(exparray);
 911     DebugToken *monvals = debug_info()->create_monitor_values(monarray);
 912 
 913     // Make method available for all Safepoints
 914     ciMethod* scope_method = method ? method : _method;
 915     // Describe the scope here
 916     assert(jvms->bci() >= InvocationEntryBci && jvms->bci() <= 0x10000, "must be a valid or entry BCI");
 917     // Now we can describe the scope.
 918     debug_info()->describe_scope(safepoint_pc_offset,scope_method,jvms->bci(),locvals,expvals,monvals);
 919   } // End jvms loop
 920 
 921   // Mark the end of the scope set.
 922   debug_info()->end_safepoint(safepoint_pc_offset);
 923 }
 924 
 925 
 926 
 927 // A simplified version of Process_OopMap_Node, to handle non-safepoints.
 928 class NonSafepointEmitter {
 929   Compile*  C;
 930   JVMState* _pending_jvms;
 931   int       _pending_offset;
 932 
 933   void emit_non_safepoint();
 934 
 935  public:
 936   NonSafepointEmitter(Compile* compile) {
 937     this->C = compile;
 938     _pending_jvms = NULL;
 939     _pending_offset = 0;
 940   }
 941 
 942   void observe_instruction(Node* n, int pc_offset) {
 943     if (!C->debug_info()->recording_non_safepoints())  return;
 944 
 945     Node_Notes* nn = C->node_notes_at(n->_idx);
 946     if (nn == NULL || nn->jvms() == NULL)  return;
 947     if (_pending_jvms != NULL &&
 948         _pending_jvms->same_calls_as(nn->jvms())) {
 949       // Repeated JVMS?  Stretch it up here.
 950       _pending_offset = pc_offset;
 951     } else {
 952       if (_pending_jvms != NULL &&
 953           _pending_offset < pc_offset) {
 954         emit_non_safepoint();
 955       }
 956       _pending_jvms = NULL;
 957       if (pc_offset > C->debug_info()->last_pc_offset()) {
 958         // This is the only way _pending_jvms can become non-NULL:
 959         _pending_jvms = nn->jvms();
 960         _pending_offset = pc_offset;
 961       }
 962     }
 963   }
 964 
 965   // Stay out of the way of real safepoints:
 966   void observe_safepoint(JVMState* jvms, int pc_offset) {
 967     if (_pending_jvms != NULL &&
 968         !_pending_jvms->same_calls_as(jvms) &&
 969         _pending_offset < pc_offset) {
 970       emit_non_safepoint();
 971     }
 972     _pending_jvms = NULL;
 973   }
 974 
 975   void flush_at_end() {
 976     if (_pending_jvms != NULL) {
 977       emit_non_safepoint();
 978     }
 979     _pending_jvms = NULL;
 980   }
 981 };
 982 
 983 void NonSafepointEmitter::emit_non_safepoint() {
 984   JVMState* youngest_jvms = _pending_jvms;
 985   int       pc_offset     = _pending_offset;
 986 
 987   // Clear it now:
 988   _pending_jvms = NULL;
 989 
 990   DebugInformationRecorder* debug_info = C->debug_info();
 991   assert(debug_info->recording_non_safepoints(), "sanity");
 992 
 993   debug_info->add_non_safepoint(pc_offset);
 994   int max_depth = youngest_jvms->depth();
 995 
 996   // Visit scopes from oldest to youngest.
 997   for (int depth = 1; depth <= max_depth; depth++) {
 998     JVMState* jvms = youngest_jvms->of_depth(depth);
 999     ciMethod* method = jvms->has_method() ? jvms->method() : NULL;
1000     debug_info->describe_scope(pc_offset, method, jvms->bci());
1001   }
1002 
1003   // Mark the end of the scope set.
1004   debug_info->end_non_safepoint(pc_offset);
1005 }
1006 
1007 
1008 
1009 // helper for Fill_buffer bailout logic
1010 static void turn_off_compiler(Compile* C) {
1011   if (CodeCache::unallocated_capacity() >= CodeCacheMinimumFreeSpace*10) {
1012     // Do not turn off compilation if a single giant method has
1013     // blown the code cache size.
1014     C->record_failure("excessive request to CodeCache");
1015   } else {
1016     // Let CompilerBroker disable further compilations.
1017     C->record_failure("CodeCache is full");
1018   }
1019 }
1020 
1021 
1022 //------------------------------Fill_buffer------------------------------------
1023 void Compile::Fill_buffer() {
1024 
1025   // Set the initially allocated size
1026   int  code_req   = initial_code_capacity;
1027   int  locs_req   = initial_locs_capacity;
1028   int  stub_req   = TraceJumps ? initial_stub_capacity * 10 : initial_stub_capacity;
1029   int  const_req  = initial_const_capacity;
1030   bool labels_not_set = true;
1031 
1032   int  pad_req    = NativeCall::instruction_size;
1033   // The extra spacing after the code is necessary on some platforms.
1034   // Sometimes we need to patch in a jump after the last instruction,
1035   // if the nmethod has been deoptimized.  (See 4932387, 4894843.)
1036 
1037   uint i;
1038   // Compute the byte offset where we can store the deopt pc.
1039   if (fixed_slots() != 0) {
1040     _orig_pc_slot_offset_in_bytes = _regalloc->reg2offset(OptoReg::stack2reg(_orig_pc_slot));
1041   }
1042 
1043   // Compute prolog code size
1044   _method_size = 0;
1045   _frame_slots = OptoReg::reg2stack(_matcher->_old_SP)+_regalloc->_framesize;
1046 #ifdef IA64
1047   if (save_argument_registers()) {
1048     // 4815101: this is a stub with implicit and unknown precision fp args.
1049     // The usual spill mechanism can only generate stfd's in this case, which
1050     // doesn't work if the fp reg to spill contains a single-precision denorm.
1051     // Instead, we hack around the normal spill mechanism using stfspill's and
1052     // ldffill's in the MachProlog and MachEpilog emit methods.  We allocate
1053     // space here for the fp arg regs (f8-f15) we're going to thusly spill.
1054     //
1055     // If we ever implement 16-byte 'registers' == stack slots, we can
1056     // get rid of this hack and have SpillCopy generate stfspill/ldffill
1057     // instead of stfd/stfs/ldfd/ldfs.
1058     _frame_slots += 8*(16/BytesPerInt);
1059   }
1060 #endif
1061   assert( _frame_slots >= 0 && _frame_slots < 1000000, "sanity check" );
1062 
1063   // Create an array of unused labels, one for each basic block
1064   Label *blk_labels = NEW_RESOURCE_ARRAY(Label, _cfg->_num_blocks+1);
1065 
1066   for( i=0; i <= _cfg->_num_blocks; i++ ) {
1067     blk_labels[i].init();
1068   }
1069 
1070   // If this machine supports different size branch offsets, then pre-compute
1071   // the length of the blocks
1072   if( _matcher->is_short_branch_offset(0) ) {
1073     Shorten_branches(blk_labels, code_req, locs_req, stub_req, const_req);
1074     labels_not_set = false;
1075   }
1076 
1077   // nmethod and CodeBuffer count stubs & constants as part of method's code.
1078   int exception_handler_req = size_exception_handler();
1079   int deopt_handler_req = size_deopt_handler();
1080   exception_handler_req += MAX_stubs_size; // add marginal slop for handler
1081   deopt_handler_req += MAX_stubs_size; // add marginal slop for handler
1082   stub_req += MAX_stubs_size;   // ensure per-stub margin
1083   code_req += MAX_inst_size;    // ensure per-instruction margin
1084   if (StressCodeBuffers)
1085     code_req = const_req = stub_req = exception_handler_req = deopt_handler_req = 0x10;  // force expansion
1086   int total_req = code_req + pad_req + stub_req + exception_handler_req + deopt_handler_req + const_req;
1087   CodeBuffer* cb = code_buffer();
1088   cb->initialize(total_req, locs_req);
1089 
1090   // Have we run out of code space?
1091   if (cb->blob() == NULL) {
1092     turn_off_compiler(this);
1093     return;
1094   }
1095   // Configure the code buffer.
1096   cb->initialize_consts_size(const_req);
1097   cb->initialize_stubs_size(stub_req);
1098   cb->initialize_oop_recorder(env()->oop_recorder());
1099 
1100   // fill in the nop array for bundling computations
1101   MachNode *_nop_list[Bundle::_nop_count];
1102   Bundle::initialize_nops(_nop_list, this);
1103 
1104   // Create oopmap set.
1105   _oop_map_set = new OopMapSet();
1106 
1107   // !!!!! This preserves old handling of oopmaps for now
1108   debug_info()->set_oopmaps(_oop_map_set);
1109 
1110   // Count and start of implicit null check instructions
1111   uint inct_cnt = 0;
1112   uint *inct_starts = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1113 
1114   // Count and start of calls
1115   uint *call_returns = NEW_RESOURCE_ARRAY(uint, _cfg->_num_blocks+1);
1116 
1117   uint  return_offset = 0;
1118   MachNode *nop = new (this) MachNopNode();
1119 
1120   int previous_offset = 0;
1121   int current_offset  = 0;
1122   int last_call_offset = -1;
1123 
1124   // Create an array of unused labels, one for each basic block, if printing is enabled
1125 #ifndef PRODUCT
1126   int *node_offsets      = NULL;
1127   uint  node_offset_limit = unique();
1128 
1129 
1130   if ( print_assembly() )
1131     node_offsets         = NEW_RESOURCE_ARRAY(int, node_offset_limit);
1132 #endif
1133 
1134   NonSafepointEmitter non_safepoints(this);  // emit non-safepoints lazily
1135 
1136   // ------------------
1137   // Now fill in the code buffer
1138   Node *delay_slot = NULL;
1139 
1140   for( i=0; i < _cfg->_num_blocks; i++ ) {
1141     Block *b = _cfg->_blocks[i];
1142 
1143     Node *head = b->head();
1144 
1145     // If this block needs to start aligned (i.e, can be reached other
1146     // than by falling-thru from the previous block), then force the
1147     // start of a new bundle.
1148     if( Pipeline::requires_bundling() && starts_bundle(head) )
1149       cb->flush_bundle(true);
1150 
1151     // Define the label at the beginning of the basic block
1152     if( labels_not_set )
1153       MacroAssembler(cb).bind( blk_labels[b->_pre_order] );
1154 
1155     else
1156       assert( blk_labels[b->_pre_order].loc_pos() == cb->code_size(),
1157               "label position does not match code offset" );
1158 
1159     uint last_inst = b->_nodes.size();
1160 
1161     // Emit block normally, except for last instruction.
1162     // Emit means "dump code bits into code buffer".
1163     for( uint j = 0; j<last_inst; j++ ) {
1164 
1165       // Get the node
1166       Node* n = b->_nodes[j];
1167 
1168       // See if delay slots are supported
1169       if (valid_bundle_info(n) &&
1170           node_bundling(n)->used_in_unconditional_delay()) {
1171         assert(delay_slot == NULL, "no use of delay slot node");
1172         assert(n->size(_regalloc) == Pipeline::instr_unit_size(), "delay slot instruction wrong size");
1173 
1174         delay_slot = n;
1175         continue;
1176       }
1177 
1178       // If this starts a new instruction group, then flush the current one
1179       // (but allow split bundles)
1180       if( Pipeline::requires_bundling() && starts_bundle(n) )
1181         cb->flush_bundle(false);
1182 
1183       // The following logic is duplicated in the code ifdeffed for
1184       // ENABLE_ZAP_DEAD_LOCALS which apppears above in this file.  It
1185       // should be factored out.  Or maybe dispersed to the nodes?
1186 
1187       // Special handling for SafePoint/Call Nodes
1188       bool is_mcall = false;
1189       if( n->is_Mach() ) {
1190         MachNode *mach = n->as_Mach();
1191         is_mcall = n->is_MachCall();
1192         bool is_sfn = n->is_MachSafePoint();
1193 
1194         // If this requires all previous instructions be flushed, then do so
1195         if( is_sfn || is_mcall || mach->alignment_required() != 1) {
1196           cb->flush_bundle(true);
1197           current_offset = cb->code_size();
1198         }
1199 
1200         // align the instruction if necessary
1201         int nop_size = nop->size(_regalloc);
1202         int padding = mach->compute_padding(current_offset);
1203         // Make sure safepoint node for polling is distinct from a call's
1204         // return by adding a nop if needed.
1205         if (is_sfn && !is_mcall && padding == 0 && current_offset == last_call_offset ) {
1206           padding = nop_size;
1207         }
1208         assert( labels_not_set || padding == 0, "instruction should already be aligned")
1209 
1210         if(padding > 0) {
1211           assert((padding % nop_size) == 0, "padding is not a multiple of NOP size");
1212           int nops_cnt = padding / nop_size;
1213           MachNode *nop = new (this) MachNopNode(nops_cnt);
1214           b->_nodes.insert(j++, nop);
1215           last_inst++;
1216           _cfg->_bbs.map( nop->_idx, b );
1217           nop->emit(*cb, _regalloc);
1218           cb->flush_bundle(true);
1219           current_offset = cb->code_size();
1220         }
1221 
1222         // Remember the start of the last call in a basic block
1223         if (is_mcall) {
1224           MachCallNode *mcall = mach->as_MachCall();
1225 
1226           // This destination address is NOT PC-relative
1227           mcall->method_set((intptr_t)mcall->entry_point());
1228 
1229           // Save the return address
1230           call_returns[b->_pre_order] = current_offset + mcall->ret_addr_offset();
1231 
1232           if (!mcall->is_safepoint_node()) {
1233             is_mcall = false;
1234             is_sfn = false;
1235           }
1236         }
1237 
1238         // sfn will be valid whenever mcall is valid now because of inheritance
1239         if( is_sfn || is_mcall ) {
1240 
1241           // Handle special safepoint nodes for synchronization
1242           if( !is_mcall ) {
1243             MachSafePointNode *sfn = mach->as_MachSafePoint();
1244             // !!!!! Stubs only need an oopmap right now, so bail out
1245             if( sfn->jvms()->method() == NULL) {
1246               // Write the oopmap directly to the code blob??!!
1247 #             ifdef ENABLE_ZAP_DEAD_LOCALS
1248               assert( !is_node_getting_a_safepoint(sfn),  "logic does not match; false positive");
1249 #             endif
1250               continue;
1251             }
1252           } // End synchronization
1253 
1254           non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1255                                            current_offset);
1256           Process_OopMap_Node(mach, current_offset);
1257         } // End if safepoint
1258 
1259         // If this is a null check, then add the start of the previous instruction to the list
1260         else if( mach->is_MachNullCheck() ) {
1261           inct_starts[inct_cnt++] = previous_offset;
1262         }
1263 
1264         // If this is a branch, then fill in the label with the target BB's label
1265         else if ( mach->is_Branch() ) {
1266 
1267           if ( mach->ideal_Opcode() == Op_Jump ) {
1268             for (uint h = 0; h < b->_num_succs; h++ ) {
1269               Block* succs_block = b->_succs[h];
1270               for (uint j = 1; j < succs_block->num_preds(); j++) {
1271                 Node* jpn = succs_block->pred(j);
1272                 if ( jpn->is_JumpProj() && jpn->in(0) == mach ) {
1273                   uint block_num = succs_block->non_connector()->_pre_order;
1274                   Label *blkLabel = &blk_labels[block_num];
1275                   mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
1276                 }
1277               }
1278             }
1279           } else {
1280             // For Branchs
1281             // This requires the TRUE branch target be in succs[0]
1282             uint block_num = b->non_connector_successor(0)->_pre_order;
1283             mach->label_set( blk_labels[block_num], block_num );
1284           }
1285         }
1286 
1287 #ifdef ASSERT
1288         // Check that oop-store preceeds the card-mark
1289         else if( mach->ideal_Opcode() == Op_StoreCM ) {
1290           uint storeCM_idx = j;
1291           Node *oop_store = mach->in(mach->_cnt);  // First precedence edge
1292           assert( oop_store != NULL, "storeCM expects a precedence edge");
1293           uint i4;
1294           for( i4 = 0; i4 < last_inst; ++i4 ) {
1295             if( b->_nodes[i4] == oop_store ) break;
1296           }
1297           // Note: This test can provide a false failure if other precedence
1298           // edges have been added to the storeCMNode.
1299           assert( i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
1300         }
1301 #endif
1302 
1303         else if( !n->is_Proj() ) {
1304           // Remember the begining of the previous instruction, in case
1305           // it's followed by a flag-kill and a null-check.  Happens on
1306           // Intel all the time, with add-to-memory kind of opcodes.
1307           previous_offset = current_offset;
1308         }
1309       }
1310 
1311       // Verify that there is sufficient space remaining
1312       cb->insts()->maybe_expand_to_ensure_remaining(MAX_inst_size);
1313       if (cb->blob() == NULL) {
1314         turn_off_compiler(this);
1315         return;
1316       }
1317 
1318       // Save the offset for the listing
1319 #ifndef PRODUCT
1320       if( node_offsets && n->_idx < node_offset_limit )
1321         node_offsets[n->_idx] = cb->code_size();
1322 #endif
1323 
1324       // "Normal" instruction case
1325       n->emit(*cb, _regalloc);
1326       current_offset  = cb->code_size();
1327       non_safepoints.observe_instruction(n, current_offset);
1328 
1329       // mcall is last "call" that can be a safepoint
1330       // record it so we can see if a poll will directly follow it
1331       // in which case we'll need a pad to make the PcDesc sites unique
1332       // see  5010568. This can be slightly inaccurate but conservative
1333       // in the case that return address is not actually at current_offset.
1334       // This is a small price to pay.
1335 
1336       if (is_mcall) {
1337         last_call_offset = current_offset;
1338       }
1339 
1340       // See if this instruction has a delay slot
1341       if ( valid_bundle_info(n) && node_bundling(n)->use_unconditional_delay()) {
1342         assert(delay_slot != NULL, "expecting delay slot node");
1343 
1344         // Back up 1 instruction
1345         cb->set_code_end(
1346           cb->code_end()-Pipeline::instr_unit_size());
1347 
1348         // Save the offset for the listing
1349 #ifndef PRODUCT
1350         if( node_offsets && delay_slot->_idx < node_offset_limit )
1351           node_offsets[delay_slot->_idx] = cb->code_size();
1352 #endif
1353 
1354         // Support a SafePoint in the delay slot
1355         if( delay_slot->is_MachSafePoint() ) {
1356           MachNode *mach = delay_slot->as_Mach();
1357           // !!!!! Stubs only need an oopmap right now, so bail out
1358           if( !mach->is_MachCall() && mach->as_MachSafePoint()->jvms()->method() == NULL ) {
1359             // Write the oopmap directly to the code blob??!!
1360 #           ifdef ENABLE_ZAP_DEAD_LOCALS
1361             assert( !is_node_getting_a_safepoint(mach),  "logic does not match; false positive");
1362 #           endif
1363             delay_slot = NULL;
1364             continue;
1365           }
1366 
1367           int adjusted_offset = current_offset - Pipeline::instr_unit_size();
1368           non_safepoints.observe_safepoint(mach->as_MachSafePoint()->jvms(),
1369                                            adjusted_offset);
1370           // Generate an OopMap entry
1371           Process_OopMap_Node(mach, adjusted_offset);
1372         }
1373 
1374         // Insert the delay slot instruction
1375         delay_slot->emit(*cb, _regalloc);
1376 
1377         // Don't reuse it
1378         delay_slot = NULL;
1379       }
1380 
1381     } // End for all instructions in block
1382 
1383     // If the next block _starts_ a loop, pad this block out to align
1384     // the loop start a little. Helps prevent pipe stalls at loop starts
1385     int nop_size = (new (this) MachNopNode())->size(_regalloc);
1386     if( i<_cfg->_num_blocks-1 ) {
1387       Block *nb = _cfg->_blocks[i+1];
1388       uint padding = nb->alignment_padding(current_offset);
1389       if( padding > 0 ) {
1390         MachNode *nop = new (this) MachNopNode(padding / nop_size);
1391         b->_nodes.insert( b->_nodes.size(), nop );
1392         _cfg->_bbs.map( nop->_idx, b );
1393         nop->emit(*cb, _regalloc);
1394         current_offset = cb->code_size();
1395       }
1396     }
1397 
1398   } // End of for all blocks
1399 
1400   non_safepoints.flush_at_end();
1401 
1402   // Offset too large?
1403   if (failing())  return;
1404 
1405   // Define a pseudo-label at the end of the code
1406   MacroAssembler(cb).bind( blk_labels[_cfg->_num_blocks] );
1407 
1408   // Compute the size of the first block
1409   _first_block_size = blk_labels[1].loc_pos() - blk_labels[0].loc_pos();
1410 
1411   assert(cb->code_size() < 500000, "method is unreasonably large");
1412 
1413   // ------------------
1414 
1415 #ifndef PRODUCT
1416   // Information on the size of the method, without the extraneous code
1417   Scheduling::increment_method_size(cb->code_size());
1418 #endif
1419 
1420   // ------------------
1421   // Fill in exception table entries.
1422   FillExceptionTables(inct_cnt, call_returns, inct_starts, blk_labels);
1423 
1424   // Only java methods have exception handlers and deopt handlers
1425   if (_method) {
1426     // Emit the exception handler code.
1427     _code_offsets.set_value(CodeOffsets::Exceptions, emit_exception_handler(*cb));
1428     // Emit the deopt handler code.
1429     _code_offsets.set_value(CodeOffsets::Deopt, emit_deopt_handler(*cb));
1430   }
1431 
1432   // One last check for failed CodeBuffer::expand:
1433   if (cb->blob() == NULL) {
1434     turn_off_compiler(this);
1435     return;
1436   }
1437 
1438 #ifndef PRODUCT
1439   // Dump the assembly code, including basic-block numbers
1440   if (print_assembly()) {
1441     ttyLocker ttyl;  // keep the following output all in one block
1442     if (!VMThread::should_terminate()) {  // test this under the tty lock
1443       // This output goes directly to the tty, not the compiler log.
1444       // To enable tools to match it up with the compilation activity,
1445       // be sure to tag this tty output with the compile ID.
1446       if (xtty != NULL) {
1447         xtty->head("opto_assembly compile_id='%d'%s", compile_id(),
1448                    is_osr_compilation()    ? " compile_kind='osr'" :
1449                    "");
1450       }
1451       if (method() != NULL) {
1452         method()->print_oop();
1453         print_codes();
1454       }
1455       dump_asm(node_offsets, node_offset_limit);
1456       if (xtty != NULL) {
1457         xtty->tail("opto_assembly");
1458       }
1459     }
1460   }
1461 #endif
1462 
1463 }
1464 
1465 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
1466   _inc_table.set_size(cnt);
1467 
1468   uint inct_cnt = 0;
1469   for( uint i=0; i<_cfg->_num_blocks; i++ ) {
1470     Block *b = _cfg->_blocks[i];
1471     Node *n = NULL;
1472     int j;
1473 
1474     // Find the branch; ignore trailing NOPs.
1475     for( j = b->_nodes.size()-1; j>=0; j-- ) {
1476       n = b->_nodes[j];
1477       if( !n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con )
1478         break;
1479     }
1480 
1481     // If we didn't find anything, continue
1482     if( j < 0 ) continue;
1483 
1484     // Compute ExceptionHandlerTable subtable entry and add it
1485     // (skip empty blocks)
1486     if( n->is_Catch() ) {
1487 
1488       // Get the offset of the return from the call
1489       uint call_return = call_returns[b->_pre_order];
1490 #ifdef ASSERT
1491       assert( call_return > 0, "no call seen for this basic block" );
1492       while( b->_nodes[--j]->Opcode() == Op_MachProj ) ;
1493       assert( b->_nodes[j]->is_Call(), "CatchProj must follow call" );
1494 #endif
1495       // last instruction is a CatchNode, find it's CatchProjNodes
1496       int nof_succs = b->_num_succs;
1497       // allocate space
1498       GrowableArray<intptr_t> handler_bcis(nof_succs);
1499       GrowableArray<intptr_t> handler_pcos(nof_succs);
1500       // iterate through all successors
1501       for (int j = 0; j < nof_succs; j++) {
1502         Block* s = b->_succs[j];
1503         bool found_p = false;
1504         for( uint k = 1; k < s->num_preds(); k++ ) {
1505           Node *pk = s->pred(k);
1506           if( pk->is_CatchProj() && pk->in(0) == n ) {
1507             const CatchProjNode* p = pk->as_CatchProj();
1508             found_p = true;
1509             // add the corresponding handler bci & pco information
1510             if( p->_con != CatchProjNode::fall_through_index ) {
1511               // p leads to an exception handler (and is not fall through)
1512               assert(s == _cfg->_blocks[s->_pre_order],"bad numbering");
1513               // no duplicates, please
1514               if( !handler_bcis.contains(p->handler_bci()) ) {
1515                 uint block_num = s->non_connector()->_pre_order;
1516                 handler_bcis.append(p->handler_bci());
1517                 handler_pcos.append(blk_labels[block_num].loc_pos());
1518               }
1519             }
1520           }
1521         }
1522         assert(found_p, "no matching predecessor found");
1523         // Note:  Due to empty block removal, one block may have
1524         // several CatchProj inputs, from the same Catch.
1525       }
1526 
1527       // Set the offset of the return from the call
1528       _handler_table.add_subtable(call_return, &handler_bcis, NULL, &handler_pcos);
1529       continue;
1530     }
1531 
1532     // Handle implicit null exception table updates
1533     if( n->is_MachNullCheck() ) {
1534       uint block_num = b->non_connector_successor(0)->_pre_order;
1535       _inc_table.append( inct_starts[inct_cnt++], blk_labels[block_num].loc_pos() );
1536       continue;
1537     }
1538   } // End of for all blocks fill in exception table entries
1539 }
1540 
1541 // Static Variables
1542 #ifndef PRODUCT
1543 uint Scheduling::_total_nop_size = 0;
1544 uint Scheduling::_total_method_size = 0;
1545 uint Scheduling::_total_branches = 0;
1546 uint Scheduling::_total_unconditional_delays = 0;
1547 uint Scheduling::_total_instructions_per_bundle[Pipeline::_max_instrs_per_cycle+1];
1548 #endif
1549 
1550 // Initializer for class Scheduling
1551 
1552 Scheduling::Scheduling(Arena *arena, Compile &compile)
1553   : _arena(arena),
1554     _cfg(compile.cfg()),
1555     _bbs(compile.cfg()->_bbs),
1556     _regalloc(compile.regalloc()),
1557     _reg_node(arena),
1558     _bundle_instr_count(0),
1559     _bundle_cycle_number(0),
1560     _scheduled(arena),
1561     _available(arena),
1562     _next_node(NULL),
1563     _bundle_use(0, 0, resource_count, &_bundle_use_elements[0]),
1564     _pinch_free_list(arena)
1565 #ifndef PRODUCT
1566   , _branches(0)
1567   , _unconditional_delays(0)
1568 #endif
1569 {
1570   // Create a MachNopNode
1571   _nop = new (&compile) MachNopNode();
1572 
1573   // Now that the nops are in the array, save the count
1574   // (but allow entries for the nops)
1575   _node_bundling_limit = compile.unique();
1576   uint node_max = _regalloc->node_regs_max_index();
1577 
1578   compile.set_node_bundling_limit(_node_bundling_limit);
1579 
1580   // This one is persistant within the Compile class
1581   _node_bundling_base = NEW_ARENA_ARRAY(compile.comp_arena(), Bundle, node_max);
1582 
1583   // Allocate space for fixed-size arrays
1584   _node_latency    = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1585   _uses            = NEW_ARENA_ARRAY(arena, short,          node_max);
1586   _current_latency = NEW_ARENA_ARRAY(arena, unsigned short, node_max);
1587 
1588   // Clear the arrays
1589   memset(_node_bundling_base, 0, node_max * sizeof(Bundle));
1590   memset(_node_latency,       0, node_max * sizeof(unsigned short));
1591   memset(_uses,               0, node_max * sizeof(short));
1592   memset(_current_latency,    0, node_max * sizeof(unsigned short));
1593 
1594   // Clear the bundling information
1595   memcpy(_bundle_use_elements,
1596     Pipeline_Use::elaborated_elements,
1597     sizeof(Pipeline_Use::elaborated_elements));
1598 
1599   // Get the last node
1600   Block *bb = _cfg->_blocks[_cfg->_blocks.size()-1];
1601 
1602   _next_node = bb->_nodes[bb->_nodes.size()-1];
1603 }
1604 
1605 #ifndef PRODUCT
1606 // Scheduling destructor
1607 Scheduling::~Scheduling() {
1608   _total_branches             += _branches;
1609   _total_unconditional_delays += _unconditional_delays;
1610 }
1611 #endif
1612 
1613 // Step ahead "i" cycles
1614 void Scheduling::step(uint i) {
1615 
1616   Bundle *bundle = node_bundling(_next_node);
1617   bundle->set_starts_bundle();
1618 
1619   // Update the bundle record, but leave the flags information alone
1620   if (_bundle_instr_count > 0) {
1621     bundle->set_instr_count(_bundle_instr_count);
1622     bundle->set_resources_used(_bundle_use.resourcesUsed());
1623   }
1624 
1625   // Update the state information
1626   _bundle_instr_count = 0;
1627   _bundle_cycle_number += i;
1628   _bundle_use.step(i);
1629 }
1630 
1631 void Scheduling::step_and_clear() {
1632   Bundle *bundle = node_bundling(_next_node);
1633   bundle->set_starts_bundle();
1634 
1635   // Update the bundle record
1636   if (_bundle_instr_count > 0) {
1637     bundle->set_instr_count(_bundle_instr_count);
1638     bundle->set_resources_used(_bundle_use.resourcesUsed());
1639 
1640     _bundle_cycle_number += 1;
1641   }
1642 
1643   // Clear the bundling information
1644   _bundle_instr_count = 0;
1645   _bundle_use.reset();
1646 
1647   memcpy(_bundle_use_elements,
1648     Pipeline_Use::elaborated_elements,
1649     sizeof(Pipeline_Use::elaborated_elements));
1650 }
1651 
1652 //------------------------------ScheduleAndBundle------------------------------
1653 // Perform instruction scheduling and bundling over the sequence of
1654 // instructions in backwards order.
1655 void Compile::ScheduleAndBundle() {
1656 
1657   // Don't optimize this if it isn't a method
1658   if (!_method)
1659     return;
1660 
1661   // Don't optimize this if scheduling is disabled
1662   if (!do_scheduling())
1663     return;
1664 
1665   NOT_PRODUCT( TracePhase t2("isched", &_t_instrSched, TimeCompiler); )
1666 
1667   // Create a data structure for all the scheduling information
1668   Scheduling scheduling(Thread::current()->resource_area(), *this);
1669 
1670   // Walk backwards over each basic block, computing the needed alignment
1671   // Walk over all the basic blocks
1672   scheduling.DoScheduling();
1673 }
1674 
1675 //------------------------------ComputeLocalLatenciesForward-------------------
1676 // Compute the latency of all the instructions.  This is fairly simple,
1677 // because we already have a legal ordering.  Walk over the instructions
1678 // from first to last, and compute the latency of the instruction based
1679 // on the latency of the preceeding instruction(s).
1680 void Scheduling::ComputeLocalLatenciesForward(const Block *bb) {
1681 #ifndef PRODUCT
1682   if (_cfg->C->trace_opto_output())
1683     tty->print("# -> ComputeLocalLatenciesForward\n");
1684 #endif
1685 
1686   // Walk over all the schedulable instructions
1687   for( uint j=_bb_start; j < _bb_end; j++ ) {
1688 
1689     // This is a kludge, forcing all latency calculations to start at 1.
1690     // Used to allow latency 0 to force an instruction to the beginning
1691     // of the bb
1692     uint latency = 1;
1693     Node *use = bb->_nodes[j];
1694     uint nlen = use->len();
1695 
1696     // Walk over all the inputs
1697     for ( uint k=0; k < nlen; k++ ) {
1698       Node *def = use->in(k);
1699       if (!def)
1700         continue;
1701 
1702       uint l = _node_latency[def->_idx] + use->latency(k);
1703       if (latency < l)
1704         latency = l;
1705     }
1706 
1707     _node_latency[use->_idx] = latency;
1708 
1709 #ifndef PRODUCT
1710     if (_cfg->C->trace_opto_output()) {
1711       tty->print("# latency %4d: ", latency);
1712       use->dump();
1713     }
1714 #endif
1715   }
1716 
1717 #ifndef PRODUCT
1718   if (_cfg->C->trace_opto_output())
1719     tty->print("# <- ComputeLocalLatenciesForward\n");
1720 #endif
1721 
1722 } // end ComputeLocalLatenciesForward
1723 
1724 // See if this node fits into the present instruction bundle
1725 bool Scheduling::NodeFitsInBundle(Node *n) {
1726   uint n_idx = n->_idx;
1727 
1728   // If this is the unconditional delay instruction, then it fits
1729   if (n == _unconditional_delay_slot) {
1730 #ifndef PRODUCT
1731     if (_cfg->C->trace_opto_output())
1732       tty->print("#     NodeFitsInBundle [%4d]: TRUE; is in unconditional delay slot\n", n->_idx);
1733 #endif
1734     return (true);
1735   }
1736 
1737   // If the node cannot be scheduled this cycle, skip it
1738   if (_current_latency[n_idx] > _bundle_cycle_number) {
1739 #ifndef PRODUCT
1740     if (_cfg->C->trace_opto_output())
1741       tty->print("#     NodeFitsInBundle [%4d]: FALSE; latency %4d > %d\n",
1742         n->_idx, _current_latency[n_idx], _bundle_cycle_number);
1743 #endif
1744     return (false);
1745   }
1746 
1747   const Pipeline *node_pipeline = n->pipeline();
1748 
1749   uint instruction_count = node_pipeline->instructionCount();
1750   if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
1751     instruction_count = 0;
1752   else if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
1753     instruction_count++;
1754 
1755   if (_bundle_instr_count + instruction_count > Pipeline::_max_instrs_per_cycle) {
1756 #ifndef PRODUCT
1757     if (_cfg->C->trace_opto_output())
1758       tty->print("#     NodeFitsInBundle [%4d]: FALSE; too many instructions: %d > %d\n",
1759         n->_idx, _bundle_instr_count + instruction_count, Pipeline::_max_instrs_per_cycle);
1760 #endif
1761     return (false);
1762   }
1763 
1764   // Don't allow non-machine nodes to be handled this way
1765   if (!n->is_Mach() && instruction_count == 0)
1766     return (false);
1767 
1768   // See if there is any overlap
1769   uint delay = _bundle_use.full_latency(0, node_pipeline->resourceUse());
1770 
1771   if (delay > 0) {
1772 #ifndef PRODUCT
1773     if (_cfg->C->trace_opto_output())
1774       tty->print("#     NodeFitsInBundle [%4d]: FALSE; functional units overlap\n", n_idx);
1775 #endif
1776     return false;
1777   }
1778 
1779 #ifndef PRODUCT
1780   if (_cfg->C->trace_opto_output())
1781     tty->print("#     NodeFitsInBundle [%4d]:  TRUE\n", n_idx);
1782 #endif
1783 
1784   return true;
1785 }
1786 
1787 Node * Scheduling::ChooseNodeToBundle() {
1788   uint siz = _available.size();
1789 
1790   if (siz == 0) {
1791 
1792 #ifndef PRODUCT
1793     if (_cfg->C->trace_opto_output())
1794       tty->print("#   ChooseNodeToBundle: NULL\n");
1795 #endif
1796     return (NULL);
1797   }
1798 
1799   // Fast path, if only 1 instruction in the bundle
1800   if (siz == 1) {
1801 #ifndef PRODUCT
1802     if (_cfg->C->trace_opto_output()) {
1803       tty->print("#   ChooseNodeToBundle (only 1): ");
1804       _available[0]->dump();
1805     }
1806 #endif
1807     return (_available[0]);
1808   }
1809 
1810   // Don't bother, if the bundle is already full
1811   if (_bundle_instr_count < Pipeline::_max_instrs_per_cycle) {
1812     for ( uint i = 0; i < siz; i++ ) {
1813       Node *n = _available[i];
1814 
1815       // Skip projections, we'll handle them another way
1816       if (n->is_Proj())
1817         continue;
1818 
1819       // This presupposed that instructions are inserted into the
1820       // available list in a legality order; i.e. instructions that
1821       // must be inserted first are at the head of the list
1822       if (NodeFitsInBundle(n)) {
1823 #ifndef PRODUCT
1824         if (_cfg->C->trace_opto_output()) {
1825           tty->print("#   ChooseNodeToBundle: ");
1826           n->dump();
1827         }
1828 #endif
1829         return (n);
1830       }
1831     }
1832   }
1833 
1834   // Nothing fits in this bundle, choose the highest priority
1835 #ifndef PRODUCT
1836   if (_cfg->C->trace_opto_output()) {
1837     tty->print("#   ChooseNodeToBundle: ");
1838     _available[0]->dump();
1839   }
1840 #endif
1841 
1842   return _available[0];
1843 }
1844 
1845 //------------------------------AddNodeToAvailableList-------------------------
1846 void Scheduling::AddNodeToAvailableList(Node *n) {
1847   assert( !n->is_Proj(), "projections never directly made available" );
1848 #ifndef PRODUCT
1849   if (_cfg->C->trace_opto_output()) {
1850     tty->print("#   AddNodeToAvailableList: ");
1851     n->dump();
1852   }
1853 #endif
1854 
1855   int latency = _current_latency[n->_idx];
1856 
1857   // Insert in latency order (insertion sort)
1858   uint i;
1859   for ( i=0; i < _available.size(); i++ )
1860     if (_current_latency[_available[i]->_idx] > latency)
1861       break;
1862 
1863   // Special Check for compares following branches
1864   if( n->is_Mach() && _scheduled.size() > 0 ) {
1865     int op = n->as_Mach()->ideal_Opcode();
1866     Node *last = _scheduled[0];
1867     if( last->is_MachIf() && last->in(1) == n &&
1868         ( op == Op_CmpI ||
1869           op == Op_CmpU ||
1870           op == Op_CmpP ||
1871           op == Op_CmpF ||
1872           op == Op_CmpD ||
1873           op == Op_CmpL ) ) {
1874 
1875       // Recalculate position, moving to front of same latency
1876       for ( i=0 ; i < _available.size(); i++ )
1877         if (_current_latency[_available[i]->_idx] >= latency)
1878           break;
1879     }
1880   }
1881 
1882   // Insert the node in the available list
1883   _available.insert(i, n);
1884 
1885 #ifndef PRODUCT
1886   if (_cfg->C->trace_opto_output())
1887     dump_available();
1888 #endif
1889 }
1890 
1891 //------------------------------DecrementUseCounts-----------------------------
1892 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
1893   for ( uint i=0; i < n->len(); i++ ) {
1894     Node *def = n->in(i);
1895     if (!def) continue;
1896     if( def->is_Proj() )        // If this is a machine projection, then
1897       def = def->in(0);         // propagate usage thru to the base instruction
1898 
1899     if( _bbs[def->_idx] != bb ) // Ignore if not block-local
1900       continue;
1901 
1902     // Compute the latency
1903     uint l = _bundle_cycle_number + n->latency(i);
1904     if (_current_latency[def->_idx] < l)
1905       _current_latency[def->_idx] = l;
1906 
1907     // If this does not have uses then schedule it
1908     if ((--_uses[def->_idx]) == 0)
1909       AddNodeToAvailableList(def);
1910   }
1911 }
1912 
1913 //------------------------------AddNodeToBundle--------------------------------
1914 void Scheduling::AddNodeToBundle(Node *n, const Block *bb) {
1915 #ifndef PRODUCT
1916   if (_cfg->C->trace_opto_output()) {
1917     tty->print("#   AddNodeToBundle: ");
1918     n->dump();
1919   }
1920 #endif
1921 
1922   // Remove this from the available list
1923   uint i;
1924   for (i = 0; i < _available.size(); i++)
1925     if (_available[i] == n)
1926       break;
1927   assert(i < _available.size(), "entry in _available list not found");
1928   _available.remove(i);
1929 
1930   // See if this fits in the current bundle
1931   const Pipeline *node_pipeline = n->pipeline();
1932   const Pipeline_Use& node_usage = node_pipeline->resourceUse();
1933 
1934   // Check for instructions to be placed in the delay slot. We
1935   // do this before we actually schedule the current instruction,
1936   // because the delay slot follows the current instruction.
1937   if (Pipeline::_branch_has_delay_slot &&
1938       node_pipeline->hasBranchDelay() &&
1939       !_unconditional_delay_slot) {
1940 
1941     uint siz = _available.size();
1942 
1943     // Conditional branches can support an instruction that
1944     // is unconditionally executed and not dependant by the
1945     // branch, OR a conditionally executed instruction if
1946     // the branch is taken.  In practice, this means that
1947     // the first instruction at the branch target is
1948     // copied to the delay slot, and the branch goes to
1949     // the instruction after that at the branch target
1950     if ( n->is_Mach() && n->is_Branch() ) {
1951 
1952       assert( !n->is_MachNullCheck(), "should not look for delay slot for Null Check" );
1953       assert( !n->is_Catch(),         "should not look for delay slot for Catch" );
1954 
1955 #ifndef PRODUCT
1956       _branches++;
1957 #endif
1958 
1959       // At least 1 instruction is on the available list
1960       // that is not dependant on the branch
1961       for (uint i = 0; i < siz; i++) {
1962         Node *d = _available[i];
1963         const Pipeline *avail_pipeline = d->pipeline();
1964 
1965         // Don't allow safepoints in the branch shadow, that will
1966         // cause a number of difficulties
1967         if ( avail_pipeline->instructionCount() == 1 &&
1968             !avail_pipeline->hasMultipleBundles() &&
1969             !avail_pipeline->hasBranchDelay() &&
1970             Pipeline::instr_has_unit_size() &&
1971             d->size(_regalloc) == Pipeline::instr_unit_size() &&
1972             NodeFitsInBundle(d) &&
1973             !node_bundling(d)->used_in_delay()) {
1974 
1975           if (d->is_Mach() && !d->is_MachSafePoint()) {
1976             // A node that fits in the delay slot was found, so we need to
1977             // set the appropriate bits in the bundle pipeline information so
1978             // that it correctly indicates resource usage.  Later, when we
1979             // attempt to add this instruction to the bundle, we will skip
1980             // setting the resource usage.
1981             _unconditional_delay_slot = d;
1982             node_bundling(n)->set_use_unconditional_delay();
1983             node_bundling(d)->set_used_in_unconditional_delay();
1984             _bundle_use.add_usage(avail_pipeline->resourceUse());
1985             _current_latency[d->_idx] = _bundle_cycle_number;
1986             _next_node = d;
1987             ++_bundle_instr_count;
1988 #ifndef PRODUCT
1989             _unconditional_delays++;
1990 #endif
1991             break;
1992           }
1993         }
1994       }
1995     }
1996 
1997     // No delay slot, add a nop to the usage
1998     if (!_unconditional_delay_slot) {
1999       // See if adding an instruction in the delay slot will overflow
2000       // the bundle.
2001       if (!NodeFitsInBundle(_nop)) {
2002 #ifndef PRODUCT
2003         if (_cfg->C->trace_opto_output())
2004           tty->print("#  *** STEP(1 instruction for delay slot) ***\n");
2005 #endif
2006         step(1);
2007       }
2008 
2009       _bundle_use.add_usage(_nop->pipeline()->resourceUse());
2010       _next_node = _nop;
2011       ++_bundle_instr_count;
2012     }
2013 
2014     // See if the instruction in the delay slot requires a
2015     // step of the bundles
2016     if (!NodeFitsInBundle(n)) {
2017 #ifndef PRODUCT
2018         if (_cfg->C->trace_opto_output())
2019           tty->print("#  *** STEP(branch won't fit) ***\n");
2020 #endif
2021         // Update the state information
2022         _bundle_instr_count = 0;
2023         _bundle_cycle_number += 1;
2024         _bundle_use.step(1);
2025     }
2026   }
2027 
2028   // Get the number of instructions
2029   uint instruction_count = node_pipeline->instructionCount();
2030   if (node_pipeline->mayHaveNoCode() && n->size(_regalloc) == 0)
2031     instruction_count = 0;
2032 
2033   // Compute the latency information
2034   uint delay = 0;
2035 
2036   if (instruction_count > 0 || !node_pipeline->mayHaveNoCode()) {
2037     int relative_latency = _current_latency[n->_idx] - _bundle_cycle_number;
2038     if (relative_latency < 0)
2039       relative_latency = 0;
2040 
2041     delay = _bundle_use.full_latency(relative_latency, node_usage);
2042 
2043     // Does not fit in this bundle, start a new one
2044     if (delay > 0) {
2045       step(delay);
2046 
2047 #ifndef PRODUCT
2048       if (_cfg->C->trace_opto_output())
2049         tty->print("#  *** STEP(%d) ***\n", delay);
2050 #endif
2051     }
2052   }
2053 
2054   // If this was placed in the delay slot, ignore it
2055   if (n != _unconditional_delay_slot) {
2056 
2057     if (delay == 0) {
2058       if (node_pipeline->hasMultipleBundles()) {
2059 #ifndef PRODUCT
2060         if (_cfg->C->trace_opto_output())
2061           tty->print("#  *** STEP(multiple instructions) ***\n");
2062 #endif
2063         step(1);
2064       }
2065 
2066       else if (instruction_count + _bundle_instr_count > Pipeline::_max_instrs_per_cycle) {
2067 #ifndef PRODUCT
2068         if (_cfg->C->trace_opto_output())
2069           tty->print("#  *** STEP(%d >= %d instructions) ***\n",
2070             instruction_count + _bundle_instr_count,
2071             Pipeline::_max_instrs_per_cycle);
2072 #endif
2073         step(1);
2074       }
2075     }
2076 
2077     if (node_pipeline->hasBranchDelay() && !_unconditional_delay_slot)
2078       _bundle_instr_count++;
2079 
2080     // Set the node's latency
2081     _current_latency[n->_idx] = _bundle_cycle_number;
2082 
2083     // Now merge the functional unit information
2084     if (instruction_count > 0 || !node_pipeline->mayHaveNoCode())
2085       _bundle_use.add_usage(node_usage);
2086 
2087     // Increment the number of instructions in this bundle
2088     _bundle_instr_count += instruction_count;
2089 
2090     // Remember this node for later
2091     if (n->is_Mach())
2092       _next_node = n;
2093   }
2094 
2095   // It's possible to have a BoxLock in the graph and in the _bbs mapping but
2096   // not in the bb->_nodes array.  This happens for debug-info-only BoxLocks.
2097   // 'Schedule' them (basically ignore in the schedule) but do not insert them
2098   // into the block.  All other scheduled nodes get put in the schedule here.
2099   int op = n->Opcode();
2100   if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR
2101       (op != Op_Node &&         // Not an unused antidepedence node and
2102        // not an unallocated boxlock
2103        (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
2104 
2105     // Push any trailing projections
2106     if( bb->_nodes[bb->_nodes.size()-1] != n ) {
2107       for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2108         Node *foi = n->fast_out(i);
2109         if( foi->is_Proj() )
2110           _scheduled.push(foi);
2111       }
2112     }
2113 
2114     // Put the instruction in the schedule list
2115     _scheduled.push(n);
2116   }
2117 
2118 #ifndef PRODUCT
2119   if (_cfg->C->trace_opto_output())
2120     dump_available();
2121 #endif
2122 
2123   // Walk all the definitions, decrementing use counts, and
2124   // if a definition has a 0 use count, place it in the available list.
2125   DecrementUseCounts(n,bb);
2126 }
2127 
2128 //------------------------------ComputeUseCount--------------------------------
2129 // This method sets the use count within a basic block.  We will ignore all
2130 // uses outside the current basic block.  As we are doing a backwards walk,
2131 // any node we reach that has a use count of 0 may be scheduled.  This also
2132 // avoids the problem of cyclic references from phi nodes, as long as phi
2133 // nodes are at the front of the basic block.  This method also initializes
2134 // the available list to the set of instructions that have no uses within this
2135 // basic block.
2136 void Scheduling::ComputeUseCount(const Block *bb) {
2137 #ifndef PRODUCT
2138   if (_cfg->C->trace_opto_output())
2139     tty->print("# -> ComputeUseCount\n");
2140 #endif
2141 
2142   // Clear the list of available and scheduled instructions, just in case
2143   _available.clear();
2144   _scheduled.clear();
2145 
2146   // No delay slot specified
2147   _unconditional_delay_slot = NULL;
2148 
2149 #ifdef ASSERT
2150   for( uint i=0; i < bb->_nodes.size(); i++ )
2151     assert( _uses[bb->_nodes[i]->_idx] == 0, "_use array not clean" );
2152 #endif
2153 
2154   // Force the _uses count to never go to zero for unscheduable pieces
2155   // of the block
2156   for( uint k = 0; k < _bb_start; k++ )
2157     _uses[bb->_nodes[k]->_idx] = 1;
2158   for( uint l = _bb_end; l < bb->_nodes.size(); l++ )
2159     _uses[bb->_nodes[l]->_idx] = 1;
2160 
2161   // Iterate backwards over the instructions in the block.  Don't count the
2162   // branch projections at end or the block header instructions.
2163   for( uint j = _bb_end-1; j >= _bb_start; j-- ) {
2164     Node *n = bb->_nodes[j];
2165     if( n->is_Proj() ) continue; // Projections handled another way
2166 
2167     // Account for all uses
2168     for ( uint k = 0; k < n->len(); k++ ) {
2169       Node *inp = n->in(k);
2170       if (!inp) continue;
2171       assert(inp != n, "no cycles allowed" );
2172       if( _bbs[inp->_idx] == bb ) { // Block-local use?
2173         if( inp->is_Proj() )    // Skip through Proj's
2174           inp = inp->in(0);
2175         ++_uses[inp->_idx];     // Count 1 block-local use
2176       }
2177     }
2178 
2179     // If this instruction has a 0 use count, then it is available
2180     if (!_uses[n->_idx]) {
2181       _current_latency[n->_idx] = _bundle_cycle_number;
2182       AddNodeToAvailableList(n);
2183     }
2184 
2185 #ifndef PRODUCT
2186     if (_cfg->C->trace_opto_output()) {
2187       tty->print("#   uses: %3d: ", _uses[n->_idx]);
2188       n->dump();
2189     }
2190 #endif
2191   }
2192 
2193 #ifndef PRODUCT
2194   if (_cfg->C->trace_opto_output())
2195     tty->print("# <- ComputeUseCount\n");
2196 #endif
2197 }
2198 
2199 // This routine performs scheduling on each basic block in reverse order,
2200 // using instruction latencies and taking into account function unit
2201 // availability.
2202 void Scheduling::DoScheduling() {
2203 #ifndef PRODUCT
2204   if (_cfg->C->trace_opto_output())
2205     tty->print("# -> DoScheduling\n");
2206 #endif
2207 
2208   Block *succ_bb = NULL;
2209   Block *bb;
2210 
2211   // Walk over all the basic blocks in reverse order
2212   for( int i=_cfg->_num_blocks-1; i >= 0; succ_bb = bb, i-- ) {
2213     bb = _cfg->_blocks[i];
2214 
2215 #ifndef PRODUCT
2216     if (_cfg->C->trace_opto_output()) {
2217       tty->print("#  Schedule BB#%03d (initial)\n", i);
2218       for (uint j = 0; j < bb->_nodes.size(); j++)
2219         bb->_nodes[j]->dump();
2220     }
2221 #endif
2222 
2223     // On the head node, skip processing
2224     if( bb == _cfg->_broot )
2225       continue;
2226 
2227     // Skip empty, connector blocks
2228     if (bb->is_connector())
2229       continue;
2230 
2231     // If the following block is not the sole successor of
2232     // this one, then reset the pipeline information
2233     if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) {
2234 #ifndef PRODUCT
2235       if (_cfg->C->trace_opto_output()) {
2236         tty->print("*** bundle start of next BB, node %d, for %d instructions\n",
2237                    _next_node->_idx, _bundle_instr_count);
2238       }
2239 #endif
2240       step_and_clear();
2241     }
2242 
2243     // Leave untouched the starting instruction, any Phis, a CreateEx node
2244     // or Top.  bb->_nodes[_bb_start] is the first schedulable instruction.
2245     _bb_end = bb->_nodes.size()-1;
2246     for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
2247       Node *n = bb->_nodes[_bb_start];
2248       // Things not matched, like Phinodes and ProjNodes don't get scheduled.
2249       // Also, MachIdealNodes do not get scheduled
2250       if( !n->is_Mach() ) continue;     // Skip non-machine nodes
2251       MachNode *mach = n->as_Mach();
2252       int iop = mach->ideal_Opcode();
2253       if( iop == Op_CreateEx ) continue; // CreateEx is pinned
2254       if( iop == Op_Con ) continue;      // Do not schedule Top
2255       if( iop == Op_Node &&     // Do not schedule PhiNodes, ProjNodes
2256           mach->pipeline() == MachNode::pipeline_class() &&
2257           !n->is_SpillCopy() )  // Breakpoints, Prolog, etc
2258         continue;
2259       break;                    // Funny loop structure to be sure...
2260     }
2261     // Compute last "interesting" instruction in block - last instruction we
2262     // might schedule.  _bb_end points just after last schedulable inst.  We
2263     // normally schedule conditional branches (despite them being forced last
2264     // in the block), because they have delay slots we can fill.  Calls all
2265     // have their delay slots filled in the template expansions, so we don't
2266     // bother scheduling them.
2267     Node *last = bb->_nodes[_bb_end];
2268     if( last->is_Catch() ||
2269        (last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
2270       // There must be a prior call.  Skip it.
2271       while( !bb->_nodes[--_bb_end]->is_Call() ) {
2272         assert( bb->_nodes[_bb_end]->is_Proj(), "skipping projections after expected call" );
2273       }
2274     } else if( last->is_MachNullCheck() ) {
2275       // Backup so the last null-checked memory instruction is
2276       // outside the schedulable range. Skip over the nullcheck,
2277       // projection, and the memory nodes.
2278       Node *mem = last->in(1);
2279       do {
2280         _bb_end--;
2281       } while (mem != bb->_nodes[_bb_end]);
2282     } else {
2283       // Set _bb_end to point after last schedulable inst.
2284       _bb_end++;
2285     }
2286 
2287     assert( _bb_start <= _bb_end, "inverted block ends" );
2288 
2289     // Compute the register antidependencies for the basic block
2290     ComputeRegisterAntidependencies(bb);
2291     if (_cfg->C->failing())  return;  // too many D-U pinch points
2292 
2293     // Compute intra-bb latencies for the nodes
2294     ComputeLocalLatenciesForward(bb);
2295 
2296     // Compute the usage within the block, and set the list of all nodes
2297     // in the block that have no uses within the block.
2298     ComputeUseCount(bb);
2299 
2300     // Schedule the remaining instructions in the block
2301     while ( _available.size() > 0 ) {
2302       Node *n = ChooseNodeToBundle();
2303       AddNodeToBundle(n,bb);
2304     }
2305 
2306     assert( _scheduled.size() == _bb_end - _bb_start, "wrong number of instructions" );
2307 #ifdef ASSERT
2308     for( uint l = _bb_start; l < _bb_end; l++ ) {
2309       Node *n = bb->_nodes[l];
2310       uint m;
2311       for( m = 0; m < _bb_end-_bb_start; m++ )
2312         if( _scheduled[m] == n )
2313           break;
2314       assert( m < _bb_end-_bb_start, "instruction missing in schedule" );
2315     }
2316 #endif
2317 
2318     // Now copy the instructions (in reverse order) back to the block
2319     for ( uint k = _bb_start; k < _bb_end; k++ )
2320       bb->_nodes.map(k, _scheduled[_bb_end-k-1]);
2321 
2322 #ifndef PRODUCT
2323     if (_cfg->C->trace_opto_output()) {
2324       tty->print("#  Schedule BB#%03d (final)\n", i);
2325       uint current = 0;
2326       for (uint j = 0; j < bb->_nodes.size(); j++) {
2327         Node *n = bb->_nodes[j];
2328         if( valid_bundle_info(n) ) {
2329           Bundle *bundle = node_bundling(n);
2330           if (bundle->instr_count() > 0 || bundle->flags() > 0) {
2331             tty->print("*** Bundle: ");
2332             bundle->dump();
2333           }
2334           n->dump();
2335         }
2336       }
2337     }
2338 #endif
2339 #ifdef ASSERT
2340   verify_good_schedule(bb,"after block local scheduling");
2341 #endif
2342   }
2343 
2344 #ifndef PRODUCT
2345   if (_cfg->C->trace_opto_output())
2346     tty->print("# <- DoScheduling\n");
2347 #endif
2348 
2349   // Record final node-bundling array location
2350   _regalloc->C->set_node_bundling_base(_node_bundling_base);
2351 
2352 } // end DoScheduling
2353 
2354 //------------------------------verify_good_schedule---------------------------
2355 // Verify that no live-range used in the block is killed in the block by a
2356 // wrong DEF.  This doesn't verify live-ranges that span blocks.
2357 
2358 // Check for edge existence.  Used to avoid adding redundant precedence edges.
2359 static bool edge_from_to( Node *from, Node *to ) {
2360   for( uint i=0; i<from->len(); i++ )
2361     if( from->in(i) == to )
2362       return true;
2363   return false;
2364 }
2365 
2366 #ifdef ASSERT
2367 //------------------------------verify_do_def----------------------------------
2368 void Scheduling::verify_do_def( Node *n, OptoReg::Name def, const char *msg ) {
2369   // Check for bad kills
2370   if( OptoReg::is_valid(def) ) { // Ignore stores & control flow
2371     Node *prior_use = _reg_node[def];
2372     if( prior_use && !edge_from_to(prior_use,n) ) {
2373       tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2374       n->dump();
2375       tty->print_cr("...");
2376       prior_use->dump();
2377       assert_msg(edge_from_to(prior_use,n),msg);
2378     }
2379     _reg_node.map(def,NULL); // Kill live USEs
2380   }
2381 }
2382 
2383 //------------------------------verify_good_schedule---------------------------
2384 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2385 
2386   // Zap to something reasonable for the verify code
2387   _reg_node.clear();
2388 
2389   // Walk over the block backwards.  Check to make sure each DEF doesn't
2390   // kill a live value (other than the one it's supposed to).  Add each
2391   // USE to the live set.
2392   for( uint i = b->_nodes.size()-1; i >= _bb_start; i-- ) {
2393     Node *n = b->_nodes[i];
2394     int n_op = n->Opcode();
2395     if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2396       // Fat-proj kills a slew of registers
2397       RegMask rm = n->out_RegMask();// Make local copy
2398       while( rm.is_NotEmpty() ) {
2399         OptoReg::Name kill = rm.find_first_elem();
2400         rm.Remove(kill);
2401         verify_do_def( n, kill, msg );
2402       }
2403     } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2404       // Get DEF'd registers the normal way
2405       verify_do_def( n, _regalloc->get_reg_first(n), msg );
2406       verify_do_def( n, _regalloc->get_reg_second(n), msg );
2407     }
2408 
2409     // Now make all USEs live
2410     for( uint i=1; i<n->req(); i++ ) {
2411       Node *def = n->in(i);
2412       assert(def != 0, "input edge required");
2413       OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2414       OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2415       if( OptoReg::is_valid(reg_lo) ) {
2416         assert_msg(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), msg );
2417         _reg_node.map(reg_lo,n);
2418       }
2419       if( OptoReg::is_valid(reg_hi) ) {
2420         assert_msg(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), msg );
2421         _reg_node.map(reg_hi,n);
2422       }
2423     }
2424 
2425   }
2426 
2427   // Zap to something reasonable for the Antidependence code
2428   _reg_node.clear();
2429 }
2430 #endif
2431 
2432 // Conditionally add precedence edges.  Avoid putting edges on Projs.
2433 static void add_prec_edge_from_to( Node *from, Node *to ) {
2434   if( from->is_Proj() ) {       // Put precedence edge on Proj's input
2435     assert( from->req() == 1 && (from->len() == 1 || from->in(1)==0), "no precedence edges on projections" );
2436     from = from->in(0);
2437   }
2438   if( from != to &&             // No cycles (for things like LD L0,[L0+4] )
2439       !edge_from_to( from, to ) ) // Avoid duplicate edge
2440     from->add_prec(to);
2441 }
2442 
2443 //------------------------------anti_do_def------------------------------------
2444 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
2445   if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
2446     return;
2447 
2448   Node *pinch = _reg_node[def_reg]; // Get pinch point
2449   if( !pinch || _bbs[pinch->_idx] != b || // No pinch-point yet?
2450       is_def ) {    // Check for a true def (not a kill)
2451     _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
2452     return;
2453   }
2454 
2455   Node *kill = def;             // Rename 'def' to more descriptive 'kill'
2456   debug_only( def = (Node*)0xdeadbeef; )
2457 
2458   // After some number of kills there _may_ be a later def
2459   Node *later_def = NULL;
2460 
2461   // Finding a kill requires a real pinch-point.
2462   // Check for not already having a pinch-point.
2463   // Pinch points are Op_Node's.
2464   if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point?
2465     later_def = pinch;            // Must be def/kill as optimistic pinch-point
2466     if ( _pinch_free_list.size() > 0) {
2467       pinch = _pinch_free_list.pop();
2468     } else {
2469       pinch = new (_cfg->C, 1) Node(1); // Pinch point to-be
2470     }
2471     if (pinch->_idx >= _regalloc->node_regs_max_index()) {
2472       _cfg->C->record_method_not_compilable("too many D-U pinch points");
2473       return;
2474     }
2475     _bbs.map(pinch->_idx,b);      // Pretend it's valid in this block (lazy init)
2476     _reg_node.map(def_reg,pinch); // Record pinch-point
2477     //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
2478     if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill
2479       pinch->init_req(0, _cfg->C->top());     // set not NULL for the next call
2480       add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
2481       later_def = NULL;           // and no later def
2482     }
2483     pinch->set_req(0,later_def);  // Hook later def so we can find it
2484   } else {                        // Else have valid pinch point
2485     if( pinch->in(0) )            // If there is a later-def
2486       later_def = pinch->in(0);   // Get it
2487   }
2488 
2489   // Add output-dependence edge from later def to kill
2490   if( later_def )               // If there is some original def
2491     add_prec_edge_from_to(later_def,kill); // Add edge from def to kill
2492 
2493   // See if current kill is also a use, and so is forced to be the pinch-point.
2494   if( pinch->Opcode() == Op_Node ) {
2495     Node *uses = kill->is_Proj() ? kill->in(0) : kill;
2496     for( uint i=1; i<uses->req(); i++ ) {
2497       if( _regalloc->get_reg_first(uses->in(i)) == def_reg ||
2498           _regalloc->get_reg_second(uses->in(i)) == def_reg ) {
2499         // Yes, found a use/kill pinch-point
2500         pinch->set_req(0,NULL);  //
2501         pinch->replace_by(kill); // Move anti-dep edges up
2502         pinch = kill;
2503         _reg_node.map(def_reg,pinch);
2504         return;
2505       }
2506     }
2507   }
2508 
2509   // Add edge from kill to pinch-point
2510   add_prec_edge_from_to(kill,pinch);
2511 }
2512 
2513 //------------------------------anti_do_use------------------------------------
2514 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
2515   if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
2516     return;
2517   Node *pinch = _reg_node[use_reg]; // Get pinch point
2518   // Check for no later def_reg/kill in block
2519   if( pinch && _bbs[pinch->_idx] == b &&
2520       // Use has to be block-local as well
2521       _bbs[use->_idx] == b ) {
2522     if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
2523         pinch->req() == 1 ) {   // pinch not yet in block?
2524       pinch->del_req(0);        // yank pointer to later-def, also set flag
2525       // Insert the pinch-point in the block just after the last use
2526       b->_nodes.insert(b->find_node(use)+1,pinch);
2527       _bb_end++;                // Increase size scheduled region in block
2528     }
2529 
2530     add_prec_edge_from_to(pinch,use);
2531   }
2532 }
2533 
2534 //------------------------------ComputeRegisterAntidependences-----------------
2535 // We insert antidependences between the reads and following write of
2536 // allocated registers to prevent illegal code motion. Hopefully, the
2537 // number of added references should be fairly small, especially as we
2538 // are only adding references within the current basic block.
2539 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
2540 
2541 #ifdef ASSERT
2542   verify_good_schedule(b,"before block local scheduling");
2543 #endif
2544 
2545   // A valid schedule, for each register independently, is an endless cycle
2546   // of: a def, then some uses (connected to the def by true dependencies),
2547   // then some kills (defs with no uses), finally the cycle repeats with a new
2548   // def.  The uses are allowed to float relative to each other, as are the
2549   // kills.  No use is allowed to slide past a kill (or def).  This requires
2550   // antidependencies between all uses of a single def and all kills that
2551   // follow, up to the next def.  More edges are redundant, because later defs
2552   // & kills are already serialized with true or antidependencies.  To keep
2553   // the edge count down, we add a 'pinch point' node if there's more than
2554   // one use or more than one kill/def.
2555 
2556   // We add dependencies in one bottom-up pass.
2557 
2558   // For each instruction we handle it's DEFs/KILLs, then it's USEs.
2559 
2560   // For each DEF/KILL, we check to see if there's a prior DEF/KILL for this
2561   // register.  If not, we record the DEF/KILL in _reg_node, the
2562   // register-to-def mapping.  If there is a prior DEF/KILL, we insert a
2563   // "pinch point", a new Node that's in the graph but not in the block.
2564   // We put edges from the prior and current DEF/KILLs to the pinch point.
2565   // We put the pinch point in _reg_node.  If there's already a pinch point
2566   // we merely add an edge from the current DEF/KILL to the pinch point.
2567 
2568   // After doing the DEF/KILLs, we handle USEs.  For each used register, we
2569   // put an edge from the pinch point to the USE.
2570 
2571   // To be expedient, the _reg_node array is pre-allocated for the whole
2572   // compilation.  _reg_node is lazily initialized; it either contains a NULL,
2573   // or a valid def/kill/pinch-point, or a leftover node from some prior
2574   // block.  Leftover node from some prior block is treated like a NULL (no
2575   // prior def, so no anti-dependence needed).  Valid def is distinguished by
2576   // it being in the current block.
2577   bool fat_proj_seen = false;
2578   uint last_safept = _bb_end-1;
2579   Node* end_node         = (_bb_end-1 >= _bb_start) ? b->_nodes[last_safept] : NULL;
2580   Node* last_safept_node = end_node;
2581   for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
2582     Node *n = b->_nodes[i];
2583     int is_def = n->outcnt();   // def if some uses prior to adding precedence edges
2584     if( n->Opcode() == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2585       // Fat-proj kills a slew of registers
2586       // This can add edges to 'n' and obscure whether or not it was a def,
2587       // hence the is_def flag.
2588       fat_proj_seen = true;
2589       RegMask rm = n->out_RegMask();// Make local copy
2590       while( rm.is_NotEmpty() ) {
2591         OptoReg::Name kill = rm.find_first_elem();
2592         rm.Remove(kill);
2593         anti_do_def( b, n, kill, is_def );
2594       }
2595     } else {
2596       // Get DEF'd registers the normal way
2597       anti_do_def( b, n, _regalloc->get_reg_first(n), is_def );
2598       anti_do_def( b, n, _regalloc->get_reg_second(n), is_def );
2599     }
2600 
2601     // Check each register used by this instruction for a following DEF/KILL
2602     // that must occur afterward and requires an anti-dependence edge.
2603     for( uint j=0; j<n->req(); j++ ) {
2604       Node *def = n->in(j);
2605       if( def ) {
2606         assert( def->Opcode() != Op_MachProj || def->ideal_reg() != MachProjNode::fat_proj, "" );
2607         anti_do_use( b, n, _regalloc->get_reg_first(def) );
2608         anti_do_use( b, n, _regalloc->get_reg_second(def) );
2609       }
2610     }
2611     // Do not allow defs of new derived values to float above GC
2612     // points unless the base is definitely available at the GC point.
2613 
2614     Node *m = b->_nodes[i];
2615 
2616     // Add precedence edge from following safepoint to use of derived pointer
2617     if( last_safept_node != end_node &&
2618         m != last_safept_node) {
2619       for (uint k = 1; k < m->req(); k++) {
2620         const Type *t = m->in(k)->bottom_type();
2621         if( t->isa_oop_ptr() &&
2622             t->is_ptr()->offset() != 0 ) {
2623           last_safept_node->add_prec( m );
2624           break;
2625         }
2626       }
2627     }
2628 
2629     if( n->jvms() ) {           // Precedence edge from derived to safept
2630       // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
2631       if( b->_nodes[last_safept] != last_safept_node ) {
2632         last_safept = b->find_node(last_safept_node);
2633       }
2634       for( uint j=last_safept; j > i; j-- ) {
2635         Node *mach = b->_nodes[j];
2636         if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
2637           mach->add_prec( n );
2638       }
2639       last_safept = i;
2640       last_safept_node = m;
2641     }
2642   }
2643 
2644   if (fat_proj_seen) {
2645     // Garbage collect pinch nodes that were not consumed.
2646     // They are usually created by a fat kill MachProj for a call.
2647     garbage_collect_pinch_nodes();
2648   }
2649 }
2650 
2651 //------------------------------garbage_collect_pinch_nodes-------------------------------
2652 
2653 // Garbage collect pinch nodes for reuse by other blocks.
2654 //
2655 // The block scheduler's insertion of anti-dependence
2656 // edges creates many pinch nodes when the block contains
2657 // 2 or more Calls.  A pinch node is used to prevent a
2658 // combinatorial explosion of edges.  If a set of kills for a
2659 // register is anti-dependent on a set of uses (or defs), rather
2660 // than adding an edge in the graph between each pair of kill
2661 // and use (or def), a pinch is inserted between them:
2662 //
2663 //            use1   use2  use3
2664 //                \   |   /
2665 //                 \  |  /
2666 //                  pinch
2667 //                 /  |  \
2668 //                /   |   \
2669 //            kill1 kill2 kill3
2670 //
2671 // One pinch node is created per register killed when
2672 // the second call is encountered during a backwards pass
2673 // over the block.  Most of these pinch nodes are never
2674 // wired into the graph because the register is never
2675 // used or def'ed in the block.
2676 //
2677 void Scheduling::garbage_collect_pinch_nodes() {
2678 #ifndef PRODUCT
2679     if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
2680 #endif
2681     int trace_cnt = 0;
2682     for (uint k = 0; k < _reg_node.Size(); k++) {
2683       Node* pinch = _reg_node[k];
2684       if (pinch != NULL && pinch->Opcode() == Op_Node &&
2685           // no predecence input edges
2686           (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
2687         cleanup_pinch(pinch);
2688         _pinch_free_list.push(pinch);
2689         _reg_node.map(k, NULL);
2690 #ifndef PRODUCT
2691         if (_cfg->C->trace_opto_output()) {
2692           trace_cnt++;
2693           if (trace_cnt > 40) {
2694             tty->print("\n");
2695             trace_cnt = 0;
2696           }
2697           tty->print(" %d", pinch->_idx);
2698         }
2699 #endif
2700       }
2701     }
2702 #ifndef PRODUCT
2703     if (_cfg->C->trace_opto_output()) tty->print("\n");
2704 #endif
2705 }
2706 
2707 // Clean up a pinch node for reuse.
2708 void Scheduling::cleanup_pinch( Node *pinch ) {
2709   assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking");
2710 
2711   for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) {
2712     Node* use = pinch->last_out(i);
2713     uint uses_found = 0;
2714     for (uint j = use->req(); j < use->len(); j++) {
2715       if (use->in(j) == pinch) {
2716         use->rm_prec(j);
2717         uses_found++;
2718       }
2719     }
2720     assert(uses_found > 0, "must be a precedence edge");
2721     i -= uses_found;    // we deleted 1 or more copies of this edge
2722   }
2723   // May have a later_def entry
2724   pinch->set_req(0, NULL);
2725 }
2726 
2727 //------------------------------print_statistics-------------------------------
2728 #ifndef PRODUCT
2729 
2730 void Scheduling::dump_available() const {
2731   tty->print("#Availist  ");
2732   for (uint i = 0; i < _available.size(); i++)
2733     tty->print(" N%d/l%d", _available[i]->_idx,_current_latency[_available[i]->_idx]);
2734   tty->cr();
2735 }
2736 
2737 // Print Scheduling Statistics
2738 void Scheduling::print_statistics() {
2739   // Print the size added by nops for bundling
2740   tty->print("Nops added %d bytes to total of %d bytes",
2741     _total_nop_size, _total_method_size);
2742   if (_total_method_size > 0)
2743     tty->print(", for %.2f%%",
2744       ((double)_total_nop_size) / ((double) _total_method_size) * 100.0);
2745   tty->print("\n");
2746 
2747   // Print the number of branch shadows filled
2748   if (Pipeline::_branch_has_delay_slot) {
2749     tty->print("Of %d branches, %d had unconditional delay slots filled",
2750       _total_branches, _total_unconditional_delays);
2751     if (_total_branches > 0)
2752       tty->print(", for %.2f%%",
2753         ((double)_total_unconditional_delays) / ((double)_total_branches) * 100.0);
2754     tty->print("\n");
2755   }
2756 
2757   uint total_instructions = 0, total_bundles = 0;
2758 
2759   for (uint i = 1; i <= Pipeline::_max_instrs_per_cycle; i++) {
2760     uint bundle_count   = _total_instructions_per_bundle[i];
2761     total_instructions += bundle_count * i;
2762     total_bundles      += bundle_count;
2763   }
2764 
2765   if (total_bundles > 0)
2766     tty->print("Average ILP (excluding nops) is %.2f\n",
2767       ((double)total_instructions) / ((double)total_bundles));
2768 }
2769 #endif