src/share/vm/opto/chaitin.cpp
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src/share/vm/opto/chaitin.cpp

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1368         if( OptoReg::is_stack(src_reg) ) { // If input is on stack
1369           // This is a CISC Spill, get stack offset and construct new node
1370 #ifndef PRODUCT
1371           if( TraceCISCSpill ) {
1372             tty->print("    reg-instr:  ");
1373             n->dump();
1374           }
1375 #endif
1376           int stk_offset = reg2offset(src_reg);
1377           // Bailout if we might exceed node limit when spilling this instruction
1378           C->check_node_count(0, "out of nodes fixing spills");
1379           if (C->failing())  return;
1380           // Transform node
1381           MachNode *cisc = mach->cisc_version(stk_offset, C)->as_Mach();
1382           cisc->set_req(inp,fp);          // Base register is frame pointer
1383           if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) {
1384             assert( cisc->oper_input_base() == 2, "Only adding one edge");
1385             cisc->ins_req(1,src);         // Requires a memory edge
1386           }
1387           b->_nodes.map(j,cisc);          // Insert into basic block
1388           n->replace_by(cisc); // Correct graph
1389           //
1390           ++_used_cisc_instructions;
1391 #ifndef PRODUCT
1392           if( TraceCISCSpill ) {
1393             tty->print("    cisc-instr: ");
1394             cisc->dump();
1395           }
1396 #endif
1397         } else {
1398 #ifndef PRODUCT
1399           if( TraceCISCSpill ) {
1400             tty->print("    using reg-instr: ");
1401             n->dump();
1402           }
1403 #endif
1404           ++_unused_cisc_instructions;    // input can be on stack
1405         }
1406       }
1407 
1408     } // End of for all instructions




1368         if( OptoReg::is_stack(src_reg) ) { // If input is on stack
1369           // This is a CISC Spill, get stack offset and construct new node
1370 #ifndef PRODUCT
1371           if( TraceCISCSpill ) {
1372             tty->print("    reg-instr:  ");
1373             n->dump();
1374           }
1375 #endif
1376           int stk_offset = reg2offset(src_reg);
1377           // Bailout if we might exceed node limit when spilling this instruction
1378           C->check_node_count(0, "out of nodes fixing spills");
1379           if (C->failing())  return;
1380           // Transform node
1381           MachNode *cisc = mach->cisc_version(stk_offset, C)->as_Mach();
1382           cisc->set_req(inp,fp);          // Base register is frame pointer
1383           if( cisc->oper_input_base() > 1 && mach->oper_input_base() <= 1 ) {
1384             assert( cisc->oper_input_base() == 2, "Only adding one edge");
1385             cisc->ins_req(1,src);         // Requires a memory edge
1386           }
1387           b->_nodes.map(j,cisc);          // Insert into basic block
1388           n->subsume_by(cisc); // Correct graph
1389           //
1390           ++_used_cisc_instructions;
1391 #ifndef PRODUCT
1392           if( TraceCISCSpill ) {
1393             tty->print("    cisc-instr: ");
1394             cisc->dump();
1395           }
1396 #endif
1397         } else {
1398 #ifndef PRODUCT
1399           if( TraceCISCSpill ) {
1400             tty->print("    using reg-instr: ");
1401             n->dump();
1402           }
1403 #endif
1404           ++_unused_cisc_instructions;    // input can be on stack
1405         }
1406       }
1407 
1408     } // End of for all instructions


src/share/vm/opto/chaitin.cpp
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