5185 disp(0x0);
5186 %}
5187 %}
5188
5189 // Indirect Memory Times Scale Plus Index Register Plus Offset Operand
5190 operand indIndexScaleOffset(any_RegP reg, immL32 off, rRegL lreg, immI2 scale)
5191 %{
5192 constraint(ALLOC_IN_RC(ptr_reg));
5193 match(AddP (AddP reg (LShiftL lreg scale)) off);
5194
5195 op_cost(10);
5196 format %{"[$reg + $off + $lreg << $scale]" %}
5197 interface(MEMORY_INTER) %{
5198 base($reg);
5199 index($lreg);
5200 scale($scale);
5201 disp($off);
5202 %}
5203 %}
5204
5205 // Indirect Memory Times Scale Plus Index Register Plus Offset Operand
5206 operand indIndexScaleOffsetComp(rRegN src, immL32 off, r12RegL base) %{
5207 constraint(ALLOC_IN_RC(ptr_reg));
5208 match(AddP (DecodeN src base) off);
5209
5210 op_cost(10);
5211 format %{"[$base + $src << 3 + $off] (compressed)" %}
5212 interface(MEMORY_INTER) %{
5213 base($base);
5214 index($src);
5215 scale(0x3);
5216 disp($off);
5217 %}
5218 %}
5219
5220 // Indirect Memory Times Scale Plus Positive Index Register Plus Offset Operand
5221 operand indPosIndexScaleOffset(any_RegP reg, immL32 off, rRegI idx, immI2 scale)
5222 %{
5223 constraint(ALLOC_IN_RC(ptr_reg));
5224 predicate(n->in(2)->in(3)->in(1)->as_Type()->type()->is_long()->_lo >= 0);
5225 match(AddP (AddP reg (LShiftL (ConvI2L idx) scale)) off);
5226
5227 op_cost(10);
5228 format %{"[$reg + $off + $idx << $scale]" %}
5229 interface(MEMORY_INTER) %{
5230 base($reg);
5231 index($idx);
5232 scale($scale);
5233 disp($off);
5348 interface(COND_INTER) %{
5349 equal(0x4);
5350 not_equal(0x5);
5351 less(0x2);
5352 greater_equal(0x3);
5353 less_equal(0x6);
5354 greater(0x7);
5355 %}
5356 %}
5357
5358
5359 //----------OPERAND CLASSES----------------------------------------------------
5360 // Operand Classes are groups of operands that are used as to simplify
5361 // instruction definitions by not requiring the AD writer to specify seperate
5362 // instructions for every form of operand when the instruction accepts
5363 // multiple operand types with the same basic encoding and format. The classic
5364 // case of this is memory operands.
5365
5366 opclass memory(indirect, indOffset8, indOffset32, indIndexOffset, indIndex,
5367 indIndexScale, indIndexScaleOffset, indPosIndexScaleOffset,
5368 indIndexScaleOffsetComp);
5369
5370 //----------PIPELINE-----------------------------------------------------------
5371 // Rules which define the behavior of the target architectures pipeline.
5372 pipeline %{
5373
5374 //----------ATTRIBUTES---------------------------------------------------------
5375 attributes %{
5376 variable_size_instructions; // Fixed size instructions
5377 max_instructions_per_bundle = 3; // Up to 3 instructions per bundle
5378 instruction_unit_size = 1; // An instruction is 1 bytes long
5379 instruction_fetch_unit_size = 16; // The processor fetches one line
5380 instruction_fetch_units = 1; // of 16 bytes
5381
5382 // List of nop instructions
5383 nops( MachNop );
5384 %}
5385
5386 //----------RESOURCES----------------------------------------------------------
5387 // Resources are the functional units available to the machine
5388
|
5185 disp(0x0);
5186 %}
5187 %}
5188
5189 // Indirect Memory Times Scale Plus Index Register Plus Offset Operand
5190 operand indIndexScaleOffset(any_RegP reg, immL32 off, rRegL lreg, immI2 scale)
5191 %{
5192 constraint(ALLOC_IN_RC(ptr_reg));
5193 match(AddP (AddP reg (LShiftL lreg scale)) off);
5194
5195 op_cost(10);
5196 format %{"[$reg + $off + $lreg << $scale]" %}
5197 interface(MEMORY_INTER) %{
5198 base($reg);
5199 index($lreg);
5200 scale($scale);
5201 disp($off);
5202 %}
5203 %}
5204
5205 // Indirect Narrow Oop Plus Offset Operand
5206 operand indNarrowOopOffset(rRegN src, immL32 off) %{
5207 constraint(ALLOC_IN_RC(ptr_reg));
5208 match(AddP (DecodeN src) off);
5209
5210 op_cost(10);
5211 format %{"[R12 + $src << 3 + $off] (compressed oop addressing)" %}
5212 interface(MEMORY_INTER) %{
5213 base(0xc); // R12
5214 index($src);
5215 scale(0x3);
5216 disp($off);
5217 %}
5218 %}
5219
5220 // Indirect Memory Times Scale Plus Positive Index Register Plus Offset Operand
5221 operand indPosIndexScaleOffset(any_RegP reg, immL32 off, rRegI idx, immI2 scale)
5222 %{
5223 constraint(ALLOC_IN_RC(ptr_reg));
5224 predicate(n->in(2)->in(3)->in(1)->as_Type()->type()->is_long()->_lo >= 0);
5225 match(AddP (AddP reg (LShiftL (ConvI2L idx) scale)) off);
5226
5227 op_cost(10);
5228 format %{"[$reg + $off + $idx << $scale]" %}
5229 interface(MEMORY_INTER) %{
5230 base($reg);
5231 index($idx);
5232 scale($scale);
5233 disp($off);
5348 interface(COND_INTER) %{
5349 equal(0x4);
5350 not_equal(0x5);
5351 less(0x2);
5352 greater_equal(0x3);
5353 less_equal(0x6);
5354 greater(0x7);
5355 %}
5356 %}
5357
5358
5359 //----------OPERAND CLASSES----------------------------------------------------
5360 // Operand Classes are groups of operands that are used as to simplify
5361 // instruction definitions by not requiring the AD writer to specify seperate
5362 // instructions for every form of operand when the instruction accepts
5363 // multiple operand types with the same basic encoding and format. The classic
5364 // case of this is memory operands.
5365
5366 opclass memory(indirect, indOffset8, indOffset32, indIndexOffset, indIndex,
5367 indIndexScale, indIndexScaleOffset, indPosIndexScaleOffset,
5368 indNarrowOopOffset);
5369
5370 //----------PIPELINE-----------------------------------------------------------
5371 // Rules which define the behavior of the target architectures pipeline.
5372 pipeline %{
5373
5374 //----------ATTRIBUTES---------------------------------------------------------
5375 attributes %{
5376 variable_size_instructions; // Fixed size instructions
5377 max_instructions_per_bundle = 3; // Up to 3 instructions per bundle
5378 instruction_unit_size = 1; // An instruction is 1 bytes long
5379 instruction_fetch_unit_size = 16; // The processor fetches one line
5380 instruction_fetch_units = 1; // of 16 bytes
5381
5382 // List of nop instructions
5383 nops( MachNop );
5384 %}
5385
5386 //----------RESOURCES----------------------------------------------------------
5387 // Resources are the functional units available to the machine
5388
|