src/cpu/x86/vm/x86_64.ad
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6695810 Cdiff src/cpu/x86/vm/x86_64.ad
src/cpu/x86/vm/x86_64.ad
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*** 6062,6096 ****
// Load Klass Pointer
instruct loadKlass(rRegP dst, memory mem)
%{
match(Set dst (LoadKlass mem));
! predicate(!n->in(MemNode::Address)->bottom_type()->is_narrow());
ins_cost(125); // XXX
format %{ "movq $dst, $mem\t# class" %}
opcode(0x8B);
ins_encode(REX_reg_mem_wide(dst, mem), OpcP, reg_mem(dst, mem));
ins_pipe(ialu_reg_mem); // XXX
%}
! // Load Klass Pointer
! instruct loadKlassComp(rRegP dst, memory mem)
%{
! match(Set dst (LoadKlass mem));
! predicate(n->in(MemNode::Address)->bottom_type()->is_narrow());
ins_cost(125); // XXX
! format %{ "movl $dst, $mem\t# compressed class\n\t"
! "decode_heap_oop $dst,$dst" %}
ins_encode %{
Address addr = build_address($mem$$base, $mem$$index, $mem$$scale, $mem$$disp);
Register dst = as_Register($dst$$reg);
__ movl(dst, addr);
- // klass is never null in the header but this is generated for all
- // klass loads not just the _klass field in the header.
- __ decode_heap_oop(dst);
%}
ins_pipe(ialu_reg_mem); // XXX
%}
// Load Float
--- 6062,6092 ----
// Load Klass Pointer
instruct loadKlass(rRegP dst, memory mem)
%{
match(Set dst (LoadKlass mem));
! predicate(!n->in(MemNode::Address)->bottom_type()->is_ptr_to_narrowoop());
ins_cost(125); // XXX
format %{ "movq $dst, $mem\t# class" %}
opcode(0x8B);
ins_encode(REX_reg_mem_wide(dst, mem), OpcP, reg_mem(dst, mem));
ins_pipe(ialu_reg_mem); // XXX
%}
! // Load narrow Klass Pointer
! instruct loadNKlass(rRegN dst, memory mem)
%{
! match(Set dst (LoadNKlass mem));
! predicate(n->in(MemNode::Address)->bottom_type()->is_ptr_to_narrowoop());
ins_cost(125); // XXX
! format %{ "movl $dst, $mem\t# compressed class\n\t" %}
ins_encode %{
Address addr = build_address($mem$$base, $mem$$index, $mem$$scale, $mem$$disp);
Register dst = as_Register($dst$$reg);
__ movl(dst, addr);
%}
ins_pipe(ialu_reg_mem); // XXX
%}
// Load Float
*** 6360,6379 ****
instruct loadConN(rRegN dst, immN src) %{
match(Set dst src);
ins_cost(125);
! format %{ "movq $dst, $src\t# compressed ptr\n\t"
! "encode_heap_oop_not_null $dst,$dst" %}
ins_encode %{
address con = (address)$src$$constant;
Register dst = $dst$$Register;
if (con == NULL) {
ShouldNotReachHere();
} else {
! __ movoop(dst, (jobject)$src$$constant);
! __ encode_heap_oop_not_null(dst);
}
%}
ins_pipe(ialu_reg_fat); // XXX
%}
--- 6356,6373 ----
instruct loadConN(rRegN dst, immN src) %{
match(Set dst src);
ins_cost(125);
! format %{ "movl $dst, $src\n# compressed ptr" %}
ins_encode %{
address con = (address)$src$$constant;
Register dst = $dst$$Register;
if (con == NULL) {
ShouldNotReachHere();
} else {
! __ load_narrow_oop_con(dst, (jobject)$src$$constant);
}
%}
ins_pipe(ialu_reg_fat); // XXX
%}
*** 7141,7150 ****
--- 7135,7168 ----
ins_encode(REX_reg_mem(dst, src), enc_cmov(cop), reg_mem(dst, src));
ins_pipe(pipe_cmov_mem);
%}
// Conditional move
+ instruct cmovN_reg(rRegN dst, rRegN src, rFlagsReg cr, cmpOp cop)
+ %{
+ match(Set dst (CMoveN (Binary cop cr) (Binary dst src)));
+
+ ins_cost(200); // XXX
+ format %{ "cmovl$cop $dst, $src\t# signed, compressed ptr" %}
+ opcode(0x0F, 0x40);
+ ins_encode(REX_reg_reg(dst, src), enc_cmov(cop), reg_reg(dst, src));
+ ins_pipe(pipe_cmov_reg);
+ %}
+
+ // Conditional move
+ instruct cmovN_regU(rRegN dst, rRegN src, rFlagsRegU cr, cmpOpU cop)
+ %{
+ match(Set dst (CMoveN (Binary cop cr) (Binary dst src)));
+
+ ins_cost(200); // XXX
+ format %{ "cmovl$cop $dst, $src\t# unsigned, compressed ptr" %}
+ opcode(0x0F, 0x40);
+ ins_encode(REX_reg_reg(dst, src), enc_cmov(cop), reg_reg(dst, src));
+ ins_pipe(pipe_cmov_reg);
+ %}
+
+ // Conditional move
instruct cmovP_reg(rRegP dst, rRegP src, rFlagsReg cr, cmpOp cop)
%{
match(Set dst (CMoveP (Binary cop cr) (Binary dst src)));
ins_cost(200); // XXX
*** 11053,11070 ****
ins_encode(REX_mem_wide(op),
OpcP, RM_opc_mem(0x00, op), Con_d32(0xFFFFFFFF));
ins_pipe(ialu_cr_reg_imm);
%}
instruct testN_reg(rFlagsReg cr, rRegN src, immN0 zero) %{
match(Set cr (CmpN src zero));
! format %{ "testl $src, $src" %}
ins_encode %{ __ testl($src$$Register, $src$$Register); %}
ins_pipe(ialu_cr_reg_imm);
%}
// Yanked all unsigned pointer compare operations.
// Pointer compares are done with CmpP which is already unsigned.
instruct compL_rReg(rFlagsReg cr, rRegL op1, rRegL op2)
%{
--- 11071,11124 ----
ins_encode(REX_mem_wide(op),
OpcP, RM_opc_mem(0x00, op), Con_d32(0xFFFFFFFF));
ins_pipe(ialu_cr_reg_imm);
%}
+
+ instruct compN_rReg(rFlagsRegU cr, rRegN op1, rRegN op2)
+ %{
+ match(Set cr (CmpN op1 op2));
+
+ format %{ "cmpl $op1, $op2\t# compressed ptr" %}
+ ins_encode %{ __ cmpl(as_Register($op1$$reg), as_Register($op2$$reg)); %}
+ ins_pipe(ialu_cr_reg_reg);
+ %}
+
+ instruct compN_rReg_mem(rFlagsRegU cr, rRegN src, memory mem)
+ %{
+ match(Set cr (CmpN src (LoadN mem)));
+
+ ins_cost(500); // XXX
+ format %{ "cmpl $src, mem\t# compressed ptr" %}
+ ins_encode %{
+ Address adr = build_address($mem$$base, $mem$$index, $mem$$scale, $mem$$disp);
+ __ cmpl(as_Register($src$$reg), adr);
+ %}
+ ins_pipe(ialu_cr_reg_mem);
+ %}
+
instruct testN_reg(rFlagsReg cr, rRegN src, immN0 zero) %{
match(Set cr (CmpN src zero));
! format %{ "testl $src, $src\t# compressed ptr" %}
ins_encode %{ __ testl($src$$Register, $src$$Register); %}
ins_pipe(ialu_cr_reg_imm);
%}
+ instruct testN_reg_mem(rFlagsReg cr, memory mem, immN0 zero)
+ %{
+ match(Set cr (CmpN (LoadN mem) zero));
+
+ ins_cost(500); // XXX
+ format %{ "testl $mem, 0xffffffff\t# compressed ptr" %}
+ ins_encode %{
+ Address addr = build_address($mem$$base, $mem$$index, $mem$$scale, $mem$$disp);
+ __ cmpl(addr, (int)0xFFFFFFFF);
+ %}
+ ins_pipe(ialu_cr_reg_mem);
+ %}
+
// Yanked all unsigned pointer compare operations.
// Pointer compares are done with CmpP which is already unsigned.
instruct compL_rReg(rFlagsReg cr, rRegL op1, rRegL op2)
%{
src/cpu/x86/vm/x86_64.ad
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