src/share/vm/opto/postaloc.cpp
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src/share/vm/opto/postaloc.cpp

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 206   // See if it happens to already be in the correct register!
 207   // (either Phi's direct register, or the common case of the name
 208   // never-clobbered original-def register)
 209   if( value[val_reg] == val &&
 210       // Doubles check both halves
 211       ( single || value[val_reg-1] == val ) ) {
 212     blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd);
 213     if( n->in(k) == regnd[val_reg] ) // Success!  Quit trying
 214       return blk_adjust;
 215   }
 216 
 217   // See if we can skip the copy by changing registers.  Don't change from
 218   // using a register to using the stack unless we know we can remove a
 219   // copy-load.  Otherwise we might end up making a pile of Intel cisc-spill
 220   // ops reading from memory instead of just loading once and using the
 221   // register.
 222 
 223   // Also handle duplicate copies here.
 224   const Type *t = val->is_Con() ? val->bottom_type() : NULL;
 225 












 226   // Scan all registers to see if this value is around already
 227   for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {




 228     Node *vv = value[reg];
 229     if( !single ) {             // Doubles check for aligned-adjacent pair
 230       if( (reg&1)==0 ) continue;  // Wrong half of a pair
 231       if( vv != value[reg-1] ) continue; // Not a complete pair
 232     }
 233     if( vv == val ||            // Got a direct hit?
 234         (t && vv && vv->bottom_type() == t && vv->is_Mach() &&
 235          vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
 236       assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
 237       if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
 238           OptoReg::is_reg(reg) || // turning into a register use OR
 239           regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
 240         blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd);
 241         if( n->in(k) == regnd[reg] ) // Success!  Quit trying
 242           return blk_adjust;
 243       } // End of if not degrading to a stack
 244     } // End of if found value in another register
 245   } // End of scan all machine registers
 246   return blk_adjust;
 247 }




 206   // See if it happens to already be in the correct register!
 207   // (either Phi's direct register, or the common case of the name
 208   // never-clobbered original-def register)
 209   if( value[val_reg] == val &&
 210       // Doubles check both halves
 211       ( single || value[val_reg-1] == val ) ) {
 212     blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd);
 213     if( n->in(k) == regnd[val_reg] ) // Success!  Quit trying
 214       return blk_adjust;
 215   }
 216 
 217   // See if we can skip the copy by changing registers.  Don't change from
 218   // using a register to using the stack unless we know we can remove a
 219   // copy-load.  Otherwise we might end up making a pile of Intel cisc-spill
 220   // ops reading from memory instead of just loading once and using the
 221   // register.
 222 
 223   // Also handle duplicate copies here.
 224   const Type *t = val->is_Con() ? val->bottom_type() : NULL;
 225 
 226   x = n->in(k);
 227   bool ignore_self = false;
 228   {
 229     ignore_self = true;
 230     DUIterator_Fast imax, i = x->fast_outs(imax);
 231     Node* first = x->fast_out(i); i++;
 232     while (i < imax && ignore_self) {
 233       Node* use = x->fast_out(i); i++;
 234       if (use != first) ignore_self = false;
 235     }
 236   }
 237 
 238   // Scan all registers to see if this value is around already
 239   for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {
 240     if (reg == (uint)nk_reg && ignore_self) {
 241       continue;
 242     }
 243 
 244     Node *vv = value[reg];
 245     if( !single ) {             // Doubles check for aligned-adjacent pair
 246       if( (reg&1)==0 ) continue;  // Wrong half of a pair
 247       if( vv != value[reg-1] ) continue; // Not a complete pair
 248     }
 249     if( vv == val ||            // Got a direct hit?
 250         (t && vv && vv->bottom_type() == t && vv->is_Mach() &&
 251          vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
 252       assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
 253       if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
 254           OptoReg::is_reg(reg) || // turning into a register use OR
 255           regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
 256         blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd);
 257         if( n->in(k) == regnd[reg] ) // Success!  Quit trying
 258           return blk_adjust;
 259       } // End of if not degrading to a stack
 260     } // End of if found value in another register
 261   } // End of scan all machine registers
 262   return blk_adjust;
 263 }


src/share/vm/opto/postaloc.cpp
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