1 /*
2 * Copyright 1998-2008 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 #include "incls/_precompiled.incl"
26 #include "incls/_postaloc.cpp.incl"
27
28 // see if this register kind does not requires two registers
29 static bool is_single_register(uint x) {
30 #ifdef _LP64
31 return (x != Op_RegD && x != Op_RegL && x != Op_RegP);
32 #else
33 return (x != Op_RegD && x != Op_RegL);
34 #endif
35 }
36
37 //------------------------------may_be_copy_of_callee-----------------------------
38 // Check to see if we can possibly be a copy of a callee-save value.
39 bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const {
40 // Short circuit if there are no callee save registers
41 if (_matcher.number_of_saved_registers() == 0) return false;
42
43 // Expect only a spill-down and reload on exit for callee-save spills.
44 // Chains of copies cannot be deep.
45 // 5008997 - This is wishful thinking. Register allocator seems to
46 // be splitting live ranges for callee save registers to such
47 // an extent that in large methods the chains can be very long
48 // (50+). The conservative answer is to return true if we don't
49 // know as this prevents optimizations from occuring.
50
51 const int limit = 60;
52 int i;
53 for( i=0; i < limit; i++ ) {
54 if( def->is_Proj() && def->in(0)->is_Start() &&
55 _matcher.is_save_on_entry(lrgs(n2lidx(def)).reg()) )
56 return true; // Direct use of callee-save proj
57 if( def->is_Copy() ) // Copies carry value through
58 def = def->in(def->is_Copy());
59 else if( def->is_Phi() ) // Phis can merge it from any direction
60 def = def->in(1);
61 else
62 break;
63 guarantee(def != NULL, "must not resurrect dead copy");
64 }
65 // If we reached the end and didn't find a callee save proj
66 // then this may be a callee save proj so we return true
67 // as the conservative answer. If we didn't reach then end
68 // we must have discovered that it was not a callee save
69 // else we would have returned.
70 return i == limit;
71 }
72
73
74
75 //------------------------------yank_if_dead-----------------------------------
76 // Removed an edge from 'old'. Yank if dead. Return adjustment counts to
77 // iterators in the current block.
78 int PhaseChaitin::yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
79 int blk_adjust=0;
80 while (old->outcnt() == 0 && old != C->top()) {
81 Block *oldb = _cfg._bbs[old->_idx];
82 oldb->find_remove(old);
83 // Count 1 if deleting an instruction from the current block
84 if( oldb == current_block ) blk_adjust++;
85 _cfg._bbs.map(old->_idx,NULL);
86 OptoReg::Name old_reg = lrgs(n2lidx(old)).reg();
87 if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available?
88 value->map(old_reg,NULL); // Yank from value/regnd maps
89 regnd->map(old_reg,NULL); // This register's value is now unknown
90 }
91 Node *tmp = old->req() > 1 ? old->in(1) : NULL;
92 old->disconnect_inputs(NULL);
93 if( !tmp ) break;
94 old = tmp;
95 }
96 return blk_adjust;
97 }
98
99 //------------------------------use_prior_register-----------------------------
100 // Use the prior value instead of the current value, in an effort to make
101 // the current value go dead. Return block iterator adjustment, in case
102 // we yank some instructions from this block.
103 int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) {
104 // No effect?
105 if( def == n->in(idx) ) return 0;
106 // Def is currently dead and can be removed? Do not resurrect
107 if( def->outcnt() == 0 ) return 0;
108
109 // Not every pair of physical registers are assignment compatible,
110 // e.g. on sparc floating point registers are not assignable to integer
111 // registers.
112 const LRG &def_lrg = lrgs(n2lidx(def));
113 OptoReg::Name def_reg = def_lrg.reg();
114 const RegMask &use_mask = n->in_RegMask(idx);
115 bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0)
116 : (use_mask.is_AllStack() != 0));
117 // Check for a copy to or from a misaligned pair.
118 can_use = can_use && !use_mask.is_misaligned_Pair() && !def_lrg.mask().is_misaligned_Pair();
119
120 if (!can_use)
121 return 0;
122
123 // Capture the old def in case it goes dead...
124 Node *old = n->in(idx);
125
126 // Save-on-call copies can only be elided if the entire copy chain can go
127 // away, lest we get the same callee-save value alive in 2 locations at
128 // once. We check for the obvious trivial case here. Although it can
129 // sometimes be elided with cooperation outside our scope, here we will just
130 // miss the opportunity. :-(
131 if( may_be_copy_of_callee(def) ) {
132 if( old->outcnt() > 1 ) return 0; // We're the not last user
133 int idx = old->is_Copy();
134 assert( idx, "chain of copies being removed" );
135 Node *old2 = old->in(idx); // Chain of copies
136 if( old2->outcnt() > 1 ) return 0; // old is not the last user
137 int idx2 = old2->is_Copy();
138 if( !idx2 ) return 0; // Not a chain of 2 copies
139 if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies
140 }
141
142 // Use the new def
143 n->set_req(idx,def);
144 _post_alloc++;
145
146 // Is old def now dead? We successfully yanked a copy?
147 return yank_if_dead(old,current_block,&value,®nd);
148 }
149
150
151 //------------------------------skip_copies------------------------------------
152 // Skip through any number of copies (that don't mod oop-i-ness)
153 Node *PhaseChaitin::skip_copies( Node *c ) {
154 int idx = c->is_Copy();
155 uint is_oop = lrgs(n2lidx(c))._is_oop;
156 while (idx != 0) {
157 guarantee(c->in(idx) != NULL, "must not resurrect dead copy");
158 if (lrgs(n2lidx(c->in(idx)))._is_oop != is_oop)
159 break; // casting copy, not the same value
160 c = c->in(idx);
161 idx = c->is_Copy();
162 }
163 return c;
164 }
165
166 //------------------------------elide_copy-------------------------------------
167 // Remove (bypass) copies along Node n, edge k.
168 int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) {
169 int blk_adjust = 0;
170
171 uint nk_idx = n2lidx(n->in(k));
172 OptoReg::Name nk_reg = lrgs(nk_idx ).reg();
173
174 // Remove obvious same-register copies
175 Node *x = n->in(k);
176 int idx;
177 while( (idx=x->is_Copy()) != 0 ) {
178 Node *copy = x->in(idx);
179 guarantee(copy != NULL, "must not resurrect dead copy");
180 if( lrgs(n2lidx(copy)).reg() != nk_reg ) break;
181 blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd);
182 if( n->in(k) != copy ) break; // Failed for some cutout?
183 x = copy; // Progress, try again
184 }
185
186 // Phis and 2-address instructions cannot change registers so easily - their
187 // outputs must match their input.
188 if( !can_change_regs )
189 return blk_adjust; // Only check stupid copies!
190
191 // Loop backedges won't have a value-mapping yet
192 if( &value == NULL ) return blk_adjust;
193
194 // Skip through all copies to the _value_ being used. Do not change from
195 // int to pointer. This attempts to jump through a chain of copies, where
196 // intermediate copies might be illegal, i.e., value is stored down to stack
197 // then reloaded BUT survives in a register the whole way.
198 Node *val = skip_copies(n->in(k));
199
200 if( val == x ) return blk_adjust; // No progress?
201
202 bool single = is_single_register(val->ideal_reg());
203 uint val_idx = n2lidx(val);
204 OptoReg::Name val_reg = lrgs(val_idx).reg();
205
206 // See if it happens to already be in the correct register!
207 // (either Phi's direct register, or the common case of the name
208 // never-clobbered original-def register)
209 if( value[val_reg] == val &&
210 // Doubles check both halves
211 ( single || value[val_reg-1] == val ) ) {
212 blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd);
213 if( n->in(k) == regnd[val_reg] ) // Success! Quit trying
214 return blk_adjust;
215 }
216
217 // See if we can skip the copy by changing registers. Don't change from
218 // using a register to using the stack unless we know we can remove a
219 // copy-load. Otherwise we might end up making a pile of Intel cisc-spill
220 // ops reading from memory instead of just loading once and using the
221 // register.
222
223 // Also handle duplicate copies here.
224 const Type *t = val->is_Con() ? val->bottom_type() : NULL;
225
226 // Scan all registers to see if this value is around already
227 for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {
228 Node *vv = value[reg];
229 if( !single ) { // Doubles check for aligned-adjacent pair
230 if( (reg&1)==0 ) continue; // Wrong half of a pair
231 if( vv != value[reg-1] ) continue; // Not a complete pair
232 }
233 if( vv == val || // Got a direct hit?
234 (t && vv && vv->bottom_type() == t && vv->is_Mach() &&
235 vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
236 assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
237 if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
238 OptoReg::is_reg(reg) || // turning into a register use OR
239 regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
240 blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd);
241 if( n->in(k) == regnd[reg] ) // Success! Quit trying
242 return blk_adjust;
243 } // End of if not degrading to a stack
244 } // End of if found value in another register
245 } // End of scan all machine registers
246 return blk_adjust;
247 }
248
249
250 //
251 // Check if nreg already contains the constant value val. Normal copy
252 // elimination doesn't doesn't work on constants because multiple
253 // nodes can represent the same constant so the type and rule of the
254 // MachNode must be checked to ensure equivalence.
255 //
256 bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n,
257 Block *current_block,
258 Node_List& value, Node_List& regnd,
259 OptoReg::Name nreg, OptoReg::Name nreg2) {
260 if (value[nreg] != val && val->is_Con() &&
261 value[nreg] != NULL && value[nreg]->is_Con() &&
262 (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) &&
263 value[nreg]->bottom_type() == val->bottom_type() &&
264 value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) {
265 // This code assumes that two MachNodes representing constants
266 // which have the same rule and the same bottom type will produce
267 // identical effects into a register. This seems like it must be
268 // objectively true unless there are hidden inputs to the nodes
269 // but if that were to change this code would need to updated.
270 // Since they are equivalent the second one if redundant and can
271 // be removed.
272 //
273 // n will be replaced with the old value but n might have
274 // kills projections associated with it so remove them now so that
275 // yank_if_dead will be able to elminate the copy once the uses
276 // have been transferred to the old[value].
277 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
278 Node* use = n->fast_out(i);
279 if (use->is_Proj() && use->outcnt() == 0) {
280 // Kill projections have no users and one input
281 use->set_req(0, C->top());
282 yank_if_dead(use, current_block, &value, ®nd);
283 --i; --imax;
284 }
285 }
286 _post_alloc++;
287 return true;
288 }
289 return false;
290 }
291
292
293 //------------------------------post_allocate_copy_removal---------------------
294 // Post-Allocation peephole copy removal. We do this in 1 pass over the
295 // basic blocks. We maintain a mapping of registers to Nodes (an array of
296 // Nodes indexed by machine register or stack slot number). NULL means that a
297 // register is not mapped to any Node. We can (want to have!) have several
298 // registers map to the same Node. We walk forward over the instructions
299 // updating the mapping as we go. At merge points we force a NULL if we have
300 // to merge 2 different Nodes into the same register. Phi functions will give
301 // us a new Node if there is a proper value merging. Since the blocks are
302 // arranged in some RPO, we will visit all parent blocks before visiting any
303 // successor blocks (except at loops).
304 //
305 // If we find a Copy we look to see if the Copy's source register is a stack
306 // slot and that value has already been loaded into some machine register; if
307 // so we use machine register directly. This turns a Load into a reg-reg
308 // Move. We also look for reloads of identical constants.
309 //
310 // When we see a use from a reg-reg Copy, we will attempt to use the copy's
311 // source directly and make the copy go dead.
312 void PhaseChaitin::post_allocate_copy_removal() {
313 NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); )
314 ResourceMark rm;
315
316 // Need a mapping from basic block Node_Lists. We need a Node_List to
317 // map from register number to value-producing Node.
318 Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
319 memset( blk2value, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
320 // Need a mapping from basic block Node_Lists. We need a Node_List to
321 // map from register number to register-defining Node.
322 Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg._num_blocks+1);
323 memset( blk2regnd, 0, sizeof(Node_List*)*(_cfg._num_blocks+1) );
324
325 // We keep unused Node_Lists on a free_list to avoid wasting
326 // memory.
327 GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16);
328
329 // For all blocks
330 for( uint i = 0; i < _cfg._num_blocks; i++ ) {
331 uint j;
332 Block *b = _cfg._blocks[i];
333
334 // Count of Phis in block
335 uint phi_dex;
336 for( phi_dex = 1; phi_dex < b->_nodes.size(); phi_dex++ ) {
337 Node *phi = b->_nodes[phi_dex];
338 if( !phi->is_Phi() )
339 break;
340 }
341
342 // If any predecessor has not been visited, we do not know the state
343 // of registers at the start. Check for this, while updating copies
344 // along Phi input edges
345 bool missing_some_inputs = false;
346 Block *freed = NULL;
347 for( j = 1; j < b->num_preds(); j++ ) {
348 Block *pb = _cfg._bbs[b->pred(j)->_idx];
349 // Remove copies along phi edges
350 for( uint k=1; k<phi_dex; k++ )
351 elide_copy( b->_nodes[k], j, b, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false );
352 if( blk2value[pb->_pre_order] ) { // Have a mapping on this edge?
353 // See if this predecessor's mappings have been used by everybody
354 // who wants them. If so, free 'em.
355 uint k;
356 for( k=0; k<pb->_num_succs; k++ ) {
357 Block *pbsucc = pb->_succs[k];
358 if( !blk2value[pbsucc->_pre_order] && pbsucc != b )
359 break; // Found a future user
360 }
361 if( k >= pb->_num_succs ) { // No more uses, free!
362 freed = pb; // Record last block freed
363 free_list.push(blk2value[pb->_pre_order]);
364 free_list.push(blk2regnd[pb->_pre_order]);
365 }
366 } else { // This block has unvisited (loopback) inputs
367 missing_some_inputs = true;
368 }
369 }
370
371
372 // Extract Node_List mappings. If 'freed' is non-zero, we just popped
373 // 'freed's blocks off the list
374 Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop());
375 Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop());
376 assert( !freed || blk2value[freed->_pre_order] == &value, "" );
377 value.map(_max_reg,NULL);
378 regnd.map(_max_reg,NULL);
379 // Set mappings as OUR mappings
380 blk2value[b->_pre_order] = &value;
381 blk2regnd[b->_pre_order] = ®nd;
382
383 // Initialize value & regnd for this block
384 if( missing_some_inputs ) {
385 // Some predecessor has not yet been visited; zap map to empty
386 for( uint k = 0; k < (uint)_max_reg; k++ ) {
387 value.map(k,NULL);
388 regnd.map(k,NULL);
389 }
390 } else {
391 if( !freed ) { // Didn't get a freebie prior block
392 // Must clone some data
393 freed = _cfg._bbs[b->pred(1)->_idx];
394 Node_List &f_value = *blk2value[freed->_pre_order];
395 Node_List &f_regnd = *blk2regnd[freed->_pre_order];
396 for( uint k = 0; k < (uint)_max_reg; k++ ) {
397 value.map(k,f_value[k]);
398 regnd.map(k,f_regnd[k]);
399 }
400 }
401 // Merge all inputs together, setting to NULL any conflicts.
402 for( j = 1; j < b->num_preds(); j++ ) {
403 Block *pb = _cfg._bbs[b->pred(j)->_idx];
404 if( pb == freed ) continue; // Did self already via freelist
405 Node_List &p_regnd = *blk2regnd[pb->_pre_order];
406 for( uint k = 0; k < (uint)_max_reg; k++ ) {
407 if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs?
408 value.map(k,NULL); // Then no value handy
409 regnd.map(k,NULL);
410 }
411 }
412 }
413 }
414
415 // For all Phi's
416 for( j = 1; j < phi_dex; j++ ) {
417 uint k;
418 Node *phi = b->_nodes[j];
419 uint pidx = n2lidx(phi);
420 OptoReg::Name preg = lrgs(n2lidx(phi)).reg();
421
422 // Remove copies remaining on edges. Check for junk phi.
423 Node *u = NULL;
424 for( k=1; k<phi->req(); k++ ) {
425 Node *x = phi->in(k);
426 if( phi != x && u != x ) // Found a different input
427 u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input
428 }
429 if( u != NodeSentinel ) { // Junk Phi. Remove
430 b->_nodes.remove(j--); phi_dex--;
431 _cfg._bbs.map(phi->_idx,NULL);
432 phi->replace_by(u);
433 phi->disconnect_inputs(NULL);
434 continue;
435 }
436 // Note that if value[pidx] exists, then we merged no new values here
437 // and the phi is useless. This can happen even with the above phi
438 // removal for complex flows. I cannot keep the better known value here
439 // because locally the phi appears to define a new merged value. If I
440 // keep the better value then a copy of the phi, being unable to use the
441 // global flow analysis, can't "peek through" the phi to the original
442 // reaching value and so will act like it's defining a new value. This
443 // can lead to situations where some uses are from the old and some from
444 // the new values. Not illegal by itself but throws the over-strong
445 // assert in scheduling.
446 if( pidx ) {
447 value.map(preg,phi);
448 regnd.map(preg,phi);
449 OptoReg::Name preg_lo = OptoReg::add(preg,-1);
450 if( !is_single_register(phi->ideal_reg()) ) {
451 value.map(preg_lo,phi);
452 regnd.map(preg_lo,phi);
453 }
454 }
455 }
456
457 // For all remaining instructions
458 for( j = phi_dex; j < b->_nodes.size(); j++ ) {
459 Node *n = b->_nodes[j];
460
461 if( n->outcnt() == 0 && // Dead?
462 n != C->top() && // (ignore TOP, it has no du info)
463 !n->is_Proj() ) { // fat-proj kills
464 j -= yank_if_dead(n,b,&value,®nd);
465 continue;
466 }
467
468 // Improve reaching-def info. Occasionally post-alloc's liveness gives
469 // up (at loop backedges, because we aren't doing a full flow pass).
470 // The presence of a live use essentially asserts that the use's def is
471 // alive and well at the use (or else the allocator fubar'd). Take
472 // advantage of this info to set a reaching def for the use-reg.
473 uint k;
474 for( k = 1; k < n->req(); k++ ) {
475 Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE
476 guarantee(def != NULL, "no disconnected nodes at this point");
477 uint useidx = n2lidx(def); // useidx is the live range index for this USE
478
479 if( useidx ) {
480 OptoReg::Name ureg = lrgs(useidx).reg();
481 if( !value[ureg] ) {
482 int idx; // Skip occasional useless copy
483 while( (idx=def->is_Copy()) != 0 &&
484 def->in(idx) != NULL && // NULL should not happen
485 ureg == lrgs(n2lidx(def->in(idx))).reg() )
486 def = def->in(idx);
487 Node *valdef = skip_copies(def); // tighten up val through non-useless copies
488 value.map(ureg,valdef); // record improved reaching-def info
489 regnd.map(ureg, def);
490 // Record other half of doubles
491 OptoReg::Name ureg_lo = OptoReg::add(ureg,-1);
492 if( !is_single_register(def->ideal_reg()) &&
493 ( !RegMask::can_represent(ureg_lo) ||
494 lrgs(useidx).mask().Member(ureg_lo) ) && // Nearly always adjacent
495 !value[ureg_lo] ) {
496 value.map(ureg_lo,valdef); // record improved reaching-def info
497 regnd.map(ureg_lo, def);
498 }
499 }
500 }
501 }
502
503 const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0;
504
505 // Remove copies along input edges
506 for( k = 1; k < n->req(); k++ )
507 j -= elide_copy( n, k, b, value, regnd, two_adr!=k );
508
509 // Unallocated Nodes define no registers
510 uint lidx = n2lidx(n);
511 if( !lidx ) continue;
512
513 // Update the register defined by this instruction
514 OptoReg::Name nreg = lrgs(lidx).reg();
515 // Skip through all copies to the _value_ being defined.
516 // Do not change from int to pointer
517 Node *val = skip_copies(n);
518
519 uint n_ideal_reg = n->ideal_reg();
520 if( is_single_register(n_ideal_reg) ) {
521 // If Node 'n' does not change the value mapped by the register,
522 // then 'n' is a useless copy. Do not update the register->node
523 // mapping so 'n' will go dead.
524 if( value[nreg] != val ) {
525 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, OptoReg::Bad)) {
526 n->replace_by(regnd[nreg]);
527 j -= yank_if_dead(n,b,&value,®nd);
528 } else {
529 // Update the mapping: record new Node defined by the register
530 regnd.map(nreg,n);
531 // Update mapping for defined *value*, which is the defined
532 // Node after skipping all copies.
533 value.map(nreg,val);
534 }
535 } else if( !may_be_copy_of_callee(n) && regnd[nreg]->outcnt() != 0 ) {
536 assert( n->is_Copy(), "" );
537 n->replace_by(regnd[nreg]);
538 j -= yank_if_dead(n,b,&value,®nd);
539 }
540 } else {
541 // If the value occupies a register pair, record same info
542 // in both registers.
543 OptoReg::Name nreg_lo = OptoReg::add(nreg,-1);
544 if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or
545 !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent
546 // Sparc occasionally has non-adjacent pairs.
547 // Find the actual other value
548 RegMask tmp = lrgs(lidx).mask();
549 tmp.Remove(nreg);
550 nreg_lo = tmp.find_first_elem();
551 }
552 if( value[nreg] != val || value[nreg_lo] != val ) {
553 if (eliminate_copy_of_constant(val, n, b, value, regnd, nreg, nreg_lo)) {
554 n->replace_by(regnd[nreg]);
555 j -= yank_if_dead(n,b,&value,®nd);
556 } else {
557 regnd.map(nreg , n );
558 regnd.map(nreg_lo, n );
559 value.map(nreg ,val);
560 value.map(nreg_lo,val);
561 }
562 } else if( !may_be_copy_of_callee(n) && regnd[nreg]->outcnt() != 0 ) {
563 assert( n->is_Copy(), "" );
564 n->replace_by(regnd[nreg]);
565 j -= yank_if_dead(n,b,&value,®nd);
566 }
567 }
568
569 // Fat projections kill many registers
570 if( n_ideal_reg == MachProjNode::fat_proj ) {
571 RegMask rm = n->out_RegMask();
572 // wow, what an expensive iterator...
573 nreg = rm.find_first_elem();
574 while( OptoReg::is_valid(nreg)) {
575 rm.Remove(nreg);
576 value.map(nreg,n);
577 regnd.map(nreg,n);
578 nreg = rm.find_first_elem();
579 }
580 }
581
582 } // End of for all instructions in the block
583
584 } // End for all blocks
585 }