2704 // Generate a new frame for the wrapper.
2705 __ save(SP, -stack_size, SP);
2706
2707 // Frame is now completed as far a size and linkage.
2708
2709 int frame_complete = ((intptr_t)__ pc()) - start;
2710
2711 #ifdef ASSERT
2712 bool reg_destroyed[RegisterImpl::number_of_registers];
2713 bool freg_destroyed[FloatRegisterImpl::number_of_registers];
2714 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
2715 reg_destroyed[r] = false;
2716 }
2717 for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) {
2718 freg_destroyed[f] = false;
2719 }
2720
2721 #endif /* ASSERT */
2722
2723 VMRegPair zero;
2724 zero.set2(G0->as_VMReg());
2725
2726 int c_arg, j_arg;
2727
2728 Register conversion_off = noreg;
2729
2730 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2731 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2732
2733 VMRegPair src = in_regs[j_arg];
2734 VMRegPair dst = out_regs[c_arg];
2735
2736 #ifdef ASSERT
2737 if (src.first()->is_Register()) {
2738 assert(!reg_destroyed[src.first()->as_Register()->encoding()], "ack!");
2739 } else if (src.first()->is_FloatRegister()) {
2740 assert(!freg_destroyed[src.first()->as_FloatRegister()->encoding(
2741 FloatRegisterImpl::S)], "ack!");
2742 }
2743 if (dst.first()->is_Register()) {
2744 reg_destroyed[dst.first()->as_Register()->encoding()] = true;
|
2704 // Generate a new frame for the wrapper.
2705 __ save(SP, -stack_size, SP);
2706
2707 // Frame is now completed as far a size and linkage.
2708
2709 int frame_complete = ((intptr_t)__ pc()) - start;
2710
2711 #ifdef ASSERT
2712 bool reg_destroyed[RegisterImpl::number_of_registers];
2713 bool freg_destroyed[FloatRegisterImpl::number_of_registers];
2714 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
2715 reg_destroyed[r] = false;
2716 }
2717 for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) {
2718 freg_destroyed[f] = false;
2719 }
2720
2721 #endif /* ASSERT */
2722
2723 VMRegPair zero;
2724 const Register g0 = G0; // without this we get a compiler warning (why??)
2725 zero.set2(g0->as_VMReg());
2726
2727 int c_arg, j_arg;
2728
2729 Register conversion_off = noreg;
2730
2731 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2732 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2733
2734 VMRegPair src = in_regs[j_arg];
2735 VMRegPair dst = out_regs[c_arg];
2736
2737 #ifdef ASSERT
2738 if (src.first()->is_Register()) {
2739 assert(!reg_destroyed[src.first()->as_Register()->encoding()], "ack!");
2740 } else if (src.first()->is_FloatRegister()) {
2741 assert(!freg_destroyed[src.first()->as_FloatRegister()->encoding(
2742 FloatRegisterImpl::S)], "ack!");
2743 }
2744 if (dst.first()->is_Register()) {
2745 reg_destroyed[dst.first()->as_Register()->encoding()] = true;
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