1 /*
2 * Copyright 2003-2007 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 #include "incls/_precompiled.incl"
26 #include "incls/_stubGenerator_x86_64.cpp.incl"
27
28 // Declaration and definition of StubGenerator (no .hpp file).
29 // For a more detailed description of the stub routine structure
30 // see the comment in stubRoutines.hpp
31
32 #define __ _masm->
33 #define TIMES_OOP (UseCompressedOops ? Address::times_4 : Address::times_8)
34
35 #ifdef PRODUCT
36 #define BLOCK_COMMENT(str) /* nothing */
37 #else
38 #define BLOCK_COMMENT(str) __ block_comment(str)
39 #endif
40
41 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
42 const int MXCSR_MASK = 0xFFC0; // Mask out any pending exceptions
43
44 // Stub Code definitions
45
46 static address handle_unsafe_access() {
47 JavaThread* thread = JavaThread::current();
48 address pc = thread->saved_exception_pc();
49 // pc is the instruction which we must emulate
50 // doing a no-op is fine: return garbage from the load
51 // therefore, compute npc
52 address npc = Assembler::locate_next_instruction(pc);
53
54 // request an async exception
55 thread->set_pending_unsafe_access_error();
56
57 // return address of next instruction to execute
58 return npc;
59 }
60
61 class StubGenerator: public StubCodeGenerator {
62 private:
63
64 #ifdef PRODUCT
65 #define inc_counter_np(counter) (0)
66 #else
67 void inc_counter_np_(int& counter) {
68 __ incrementl(ExternalAddress((address)&counter));
69 }
70 #define inc_counter_np(counter) \
71 BLOCK_COMMENT("inc_counter " #counter); \
72 inc_counter_np_(counter);
73 #endif
74
75 // Call stubs are used to call Java from C
76 //
77 // Linux Arguments:
78 // c_rarg0: call wrapper address address
79 // c_rarg1: result address
80 // c_rarg2: result type BasicType
81 // c_rarg3: method methodOop
82 // c_rarg4: (interpreter) entry point address
83 // c_rarg5: parameters intptr_t*
84 // 16(rbp): parameter size (in words) int
85 // 24(rbp): thread Thread*
86 //
87 // [ return_from_Java ] <--- rsp
88 // [ argument word n ]
89 // ...
90 // -12 [ argument word 1 ]
91 // -11 [ saved r15 ] <--- rsp_after_call
92 // -10 [ saved r14 ]
93 // -9 [ saved r13 ]
94 // -8 [ saved r12 ]
95 // -7 [ saved rbx ]
96 // -6 [ call wrapper ]
97 // -5 [ result ]
98 // -4 [ result type ]
99 // -3 [ method ]
100 // -2 [ entry point ]
101 // -1 [ parameters ]
102 // 0 [ saved rbp ] <--- rbp
103 // 1 [ return address ]
104 // 2 [ parameter size ]
105 // 3 [ thread ]
106 //
107 // Windows Arguments:
108 // c_rarg0: call wrapper address address
109 // c_rarg1: result address
110 // c_rarg2: result type BasicType
111 // c_rarg3: method methodOop
112 // 48(rbp): (interpreter) entry point address
113 // 56(rbp): parameters intptr_t*
114 // 64(rbp): parameter size (in words) int
115 // 72(rbp): thread Thread*
116 //
117 // [ return_from_Java ] <--- rsp
118 // [ argument word n ]
119 // ...
120 // -8 [ argument word 1 ]
121 // -7 [ saved r15 ] <--- rsp_after_call
122 // -6 [ saved r14 ]
123 // -5 [ saved r13 ]
124 // -4 [ saved r12 ]
125 // -3 [ saved rdi ]
126 // -2 [ saved rsi ]
127 // -1 [ saved rbx ]
128 // 0 [ saved rbp ] <--- rbp
129 // 1 [ return address ]
130 // 2 [ call wrapper ]
131 // 3 [ result ]
132 // 4 [ result type ]
133 // 5 [ method ]
134 // 6 [ entry point ]
135 // 7 [ parameters ]
136 // 8 [ parameter size ]
137 // 9 [ thread ]
138 //
139 // Windows reserves the callers stack space for arguments 1-4.
140 // We spill c_rarg0-c_rarg3 to this space.
141
142 // Call stub stack layout word offsets from rbp
143 enum call_stub_layout {
144 #ifdef _WIN64
145 rsp_after_call_off = -7,
146 r15_off = rsp_after_call_off,
147 r14_off = -6,
148 r13_off = -5,
149 r12_off = -4,
150 rdi_off = -3,
151 rsi_off = -2,
152 rbx_off = -1,
153 rbp_off = 0,
154 retaddr_off = 1,
155 call_wrapper_off = 2,
156 result_off = 3,
157 result_type_off = 4,
158 method_off = 5,
159 entry_point_off = 6,
160 parameters_off = 7,
161 parameter_size_off = 8,
162 thread_off = 9
163 #else
164 rsp_after_call_off = -12,
165 mxcsr_off = rsp_after_call_off,
166 r15_off = -11,
167 r14_off = -10,
168 r13_off = -9,
169 r12_off = -8,
170 rbx_off = -7,
171 call_wrapper_off = -6,
172 result_off = -5,
173 result_type_off = -4,
174 method_off = -3,
175 entry_point_off = -2,
176 parameters_off = -1,
177 rbp_off = 0,
178 retaddr_off = 1,
179 parameter_size_off = 2,
180 thread_off = 3
181 #endif
182 };
183
184 address generate_call_stub(address& return_address) {
185 assert((int)frame::entry_frame_after_call_words == -(int)rsp_after_call_off + 1 &&
186 (int)frame::entry_frame_call_wrapper_offset == (int)call_wrapper_off,
187 "adjust this code");
188 StubCodeMark mark(this, "StubRoutines", "call_stub");
189 address start = __ pc();
190
191 // same as in generate_catch_exception()!
192 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
193
194 const Address call_wrapper (rbp, call_wrapper_off * wordSize);
195 const Address result (rbp, result_off * wordSize);
196 const Address result_type (rbp, result_type_off * wordSize);
197 const Address method (rbp, method_off * wordSize);
198 const Address entry_point (rbp, entry_point_off * wordSize);
199 const Address parameters (rbp, parameters_off * wordSize);
200 const Address parameter_size(rbp, parameter_size_off * wordSize);
201
202 // same as in generate_catch_exception()!
203 const Address thread (rbp, thread_off * wordSize);
204
205 const Address r15_save(rbp, r15_off * wordSize);
206 const Address r14_save(rbp, r14_off * wordSize);
207 const Address r13_save(rbp, r13_off * wordSize);
208 const Address r12_save(rbp, r12_off * wordSize);
209 const Address rbx_save(rbp, rbx_off * wordSize);
210
211 // stub code
212 __ enter();
213 __ subq(rsp, -rsp_after_call_off * wordSize);
214
215 // save register parameters
216 #ifndef _WIN64
217 __ movq(parameters, c_rarg5); // parameters
218 __ movq(entry_point, c_rarg4); // entry_point
219 #endif
220
221 __ movq(method, c_rarg3); // method
222 __ movl(result_type, c_rarg2); // result type
223 __ movq(result, c_rarg1); // result
224 __ movq(call_wrapper, c_rarg0); // call wrapper
225
226 // save regs belonging to calling function
227 __ movq(rbx_save, rbx);
228 __ movq(r12_save, r12);
229 __ movq(r13_save, r13);
230 __ movq(r14_save, r14);
231 __ movq(r15_save, r15);
232
233 #ifdef _WIN64
234 const Address rdi_save(rbp, rdi_off * wordSize);
235 const Address rsi_save(rbp, rsi_off * wordSize);
236
237 __ movq(rsi_save, rsi);
238 __ movq(rdi_save, rdi);
239 #else
240 const Address mxcsr_save(rbp, mxcsr_off * wordSize);
241 {
242 Label skip_ldmx;
243 __ stmxcsr(mxcsr_save);
244 __ movl(rax, mxcsr_save);
245 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
246 ExternalAddress mxcsr_std(StubRoutines::amd64::mxcsr_std());
247 __ cmp32(rax, mxcsr_std);
248 __ jcc(Assembler::equal, skip_ldmx);
249 __ ldmxcsr(mxcsr_std);
250 __ bind(skip_ldmx);
251 }
252 #endif
253
254 // Load up thread register
255 __ movq(r15_thread, thread);
256 __ reinit_heapbase();
257
258 #ifdef ASSERT
259 // make sure we have no pending exceptions
260 {
261 Label L;
262 __ cmpq(Address(r15_thread, Thread::pending_exception_offset()), (int)NULL_WORD);
263 __ jcc(Assembler::equal, L);
264 __ stop("StubRoutines::call_stub: entered with pending exception");
265 __ bind(L);
266 }
267 #endif
268
269 // pass parameters if any
270 BLOCK_COMMENT("pass parameters if any");
271 Label parameters_done;
272 __ movl(c_rarg3, parameter_size);
273 __ testl(c_rarg3, c_rarg3);
274 __ jcc(Assembler::zero, parameters_done);
275
276 Label loop;
277 __ movq(c_rarg2, parameters); // parameter pointer
278 __ movl(c_rarg1, c_rarg3); // parameter counter is in c_rarg1
279 __ BIND(loop);
280 if (TaggedStackInterpreter) {
281 __ movq(rax, Address(c_rarg2, 0)); // get tag
282 __ addq(c_rarg2, wordSize); // advance to next tag
283 __ pushq(rax); // pass tag
284 }
285 __ movq(rax, Address(c_rarg2, 0)); // get parameter
286 __ addq(c_rarg2, wordSize); // advance to next parameter
287 __ decrementl(c_rarg1); // decrement counter
288 __ pushq(rax); // pass parameter
289 __ jcc(Assembler::notZero, loop);
290
291 // call Java function
292 __ BIND(parameters_done);
293 __ movq(rbx, method); // get methodOop
294 __ movq(c_rarg1, entry_point); // get entry_point
295 __ movq(r13, rsp); // set sender sp
296 BLOCK_COMMENT("call Java function");
297 __ call(c_rarg1);
298
299 BLOCK_COMMENT("call_stub_return_address:");
300 return_address = __ pc();
301
302 // store result depending on type (everything that is not
303 // T_OBJECT, T_LONG, T_FLOAT or T_DOUBLE is treated as T_INT)
304 __ movq(c_rarg0, result);
305 Label is_long, is_float, is_double, exit;
306 __ movl(c_rarg1, result_type);
307 __ cmpl(c_rarg1, T_OBJECT);
308 __ jcc(Assembler::equal, is_long);
309 __ cmpl(c_rarg1, T_LONG);
310 __ jcc(Assembler::equal, is_long);
311 __ cmpl(c_rarg1, T_FLOAT);
312 __ jcc(Assembler::equal, is_float);
313 __ cmpl(c_rarg1, T_DOUBLE);
314 __ jcc(Assembler::equal, is_double);
315
316 // handle T_INT case
317 __ movl(Address(c_rarg0, 0), rax);
318
319 __ BIND(exit);
320
321 // pop parameters
322 __ leaq(rsp, rsp_after_call);
323
324 #ifdef ASSERT
325 // verify that threads correspond
326 {
327 Label L, S;
328 __ cmpq(r15_thread, thread);
329 __ jcc(Assembler::notEqual, S);
330 __ get_thread(rbx);
331 __ cmpq(r15_thread, rbx);
332 __ jcc(Assembler::equal, L);
333 __ bind(S);
334 __ jcc(Assembler::equal, L);
335 __ stop("StubRoutines::call_stub: threads must correspond");
336 __ bind(L);
337 }
338 #endif
339
340 // restore regs belonging to calling function
341 __ movq(r15, r15_save);
342 __ movq(r14, r14_save);
343 __ movq(r13, r13_save);
344 __ movq(r12, r12_save);
345 __ movq(rbx, rbx_save);
346
347 #ifdef _WIN64
348 __ movq(rdi, rdi_save);
349 __ movq(rsi, rsi_save);
350 #else
351 __ ldmxcsr(mxcsr_save);
352 #endif
353
354 // restore rsp
355 __ addq(rsp, -rsp_after_call_off * wordSize);
356
357 // return
358 __ popq(rbp);
359 __ ret(0);
360
361 // handle return types different from T_INT
362 __ BIND(is_long);
363 __ movq(Address(c_rarg0, 0), rax);
364 __ jmp(exit);
365
366 __ BIND(is_float);
367 __ movflt(Address(c_rarg0, 0), xmm0);
368 __ jmp(exit);
369
370 __ BIND(is_double);
371 __ movdbl(Address(c_rarg0, 0), xmm0);
372 __ jmp(exit);
373
374 return start;
375 }
376
377 // Return point for a Java call if there's an exception thrown in
378 // Java code. The exception is caught and transformed into a
379 // pending exception stored in JavaThread that can be tested from
380 // within the VM.
381 //
382 // Note: Usually the parameters are removed by the callee. In case
383 // of an exception crossing an activation frame boundary, that is
384 // not the case if the callee is compiled code => need to setup the
385 // rsp.
386 //
387 // rax: exception oop
388
389 address generate_catch_exception() {
390 StubCodeMark mark(this, "StubRoutines", "catch_exception");
391 address start = __ pc();
392
393 // same as in generate_call_stub():
394 const Address rsp_after_call(rbp, rsp_after_call_off * wordSize);
395 const Address thread (rbp, thread_off * wordSize);
396
397 #ifdef ASSERT
398 // verify that threads correspond
399 {
400 Label L, S;
401 __ cmpq(r15_thread, thread);
402 __ jcc(Assembler::notEqual, S);
403 __ get_thread(rbx);
404 __ cmpq(r15_thread, rbx);
405 __ jcc(Assembler::equal, L);
406 __ bind(S);
407 __ stop("StubRoutines::catch_exception: threads must correspond");
408 __ bind(L);
409 }
410 #endif
411
412 // set pending exception
413 __ verify_oop(rax);
414
415 __ movq(Address(r15_thread, Thread::pending_exception_offset()), rax);
416 __ lea(rscratch1, ExternalAddress((address)__FILE__));
417 __ movq(Address(r15_thread, Thread::exception_file_offset()), rscratch1);
418 __ movl(Address(r15_thread, Thread::exception_line_offset()), (int) __LINE__);
419
420 // complete return to VM
421 assert(StubRoutines::_call_stub_return_address != NULL,
422 "_call_stub_return_address must have been generated before");
423 __ jump(RuntimeAddress(StubRoutines::_call_stub_return_address));
424
425 return start;
426 }
427
428 // Continuation point for runtime calls returning with a pending
429 // exception. The pending exception check happened in the runtime
430 // or native call stub. The pending exception in Thread is
431 // converted into a Java-level exception.
432 //
433 // Contract with Java-level exception handlers:
434 // rax: exception
435 // rdx: throwing pc
436 //
437 // NOTE: At entry of this stub, exception-pc must be on stack !!
438
439 address generate_forward_exception() {
440 StubCodeMark mark(this, "StubRoutines", "forward exception");
441 address start = __ pc();
442
443 // Upon entry, the sp points to the return address returning into
444 // Java (interpreted or compiled) code; i.e., the return address
445 // becomes the throwing pc.
446 //
447 // Arguments pushed before the runtime call are still on the stack
448 // but the exception handler will reset the stack pointer ->
449 // ignore them. A potential result in registers can be ignored as
450 // well.
451
452 #ifdef ASSERT
453 // make sure this code is only executed if there is a pending exception
454 {
455 Label L;
456 __ cmpq(Address(r15_thread, Thread::pending_exception_offset()), (int) NULL);
457 __ jcc(Assembler::notEqual, L);
458 __ stop("StubRoutines::forward exception: no pending exception (1)");
459 __ bind(L);
460 }
461 #endif
462
463 // compute exception handler into rbx
464 __ movq(c_rarg0, Address(rsp, 0));
465 BLOCK_COMMENT("call exception_handler_for_return_address");
466 __ call_VM_leaf(CAST_FROM_FN_PTR(address,
467 SharedRuntime::exception_handler_for_return_address),
468 c_rarg0);
469 __ movq(rbx, rax);
470
471 // setup rax & rdx, remove return address & clear pending exception
472 __ popq(rdx);
473 __ movq(rax, Address(r15_thread, Thread::pending_exception_offset()));
474 __ movptr(Address(r15_thread, Thread::pending_exception_offset()), (int)NULL_WORD);
475
476 #ifdef ASSERT
477 // make sure exception is set
478 {
479 Label L;
480 __ testq(rax, rax);
481 __ jcc(Assembler::notEqual, L);
482 __ stop("StubRoutines::forward exception: no pending exception (2)");
483 __ bind(L);
484 }
485 #endif
486
487 // continue at exception handler (return address removed)
488 // rax: exception
489 // rbx: exception handler
490 // rdx: throwing pc
491 __ verify_oop(rax);
492 __ jmp(rbx);
493
494 return start;
495 }
496
497 // Support for jint atomic::xchg(jint exchange_value, volatile jint* dest)
498 //
499 // Arguments :
500 // c_rarg0: exchange_value
501 // c_rarg0: dest
502 //
503 // Result:
504 // *dest <- ex, return (orig *dest)
505 address generate_atomic_xchg() {
506 StubCodeMark mark(this, "StubRoutines", "atomic_xchg");
507 address start = __ pc();
508
509 __ movl(rax, c_rarg0); // Copy to eax we need a return value anyhow
510 __ xchgl(rax, Address(c_rarg1, 0)); // automatic LOCK
511 __ ret(0);
512
513 return start;
514 }
515
516 // Support for intptr_t atomic::xchg_ptr(intptr_t exchange_value, volatile intptr_t* dest)
517 //
518 // Arguments :
519 // c_rarg0: exchange_value
520 // c_rarg1: dest
521 //
522 // Result:
523 // *dest <- ex, return (orig *dest)
524 address generate_atomic_xchg_ptr() {
525 StubCodeMark mark(this, "StubRoutines", "atomic_xchg_ptr");
526 address start = __ pc();
527
528 __ movq(rax, c_rarg0); // Copy to eax we need a return value anyhow
529 __ xchgq(rax, Address(c_rarg1, 0)); // automatic LOCK
530 __ ret(0);
531
532 return start;
533 }
534
535 // Support for jint atomic::atomic_cmpxchg(jint exchange_value, volatile jint* dest,
536 // jint compare_value)
537 //
538 // Arguments :
539 // c_rarg0: exchange_value
540 // c_rarg1: dest
541 // c_rarg2: compare_value
542 //
543 // Result:
544 // if ( compare_value == *dest ) {
545 // *dest = exchange_value
546 // return compare_value;
547 // else
548 // return *dest;
549 address generate_atomic_cmpxchg() {
550 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg");
551 address start = __ pc();
552
553 __ movl(rax, c_rarg2);
554 if ( os::is_MP() ) __ lock();
555 __ cmpxchgl(c_rarg0, Address(c_rarg1, 0));
556 __ ret(0);
557
558 return start;
559 }
560
561 // Support for jint atomic::atomic_cmpxchg_long(jlong exchange_value,
562 // volatile jlong* dest,
563 // jlong compare_value)
564 // Arguments :
565 // c_rarg0: exchange_value
566 // c_rarg1: dest
567 // c_rarg2: compare_value
568 //
569 // Result:
570 // if ( compare_value == *dest ) {
571 // *dest = exchange_value
572 // return compare_value;
573 // else
574 // return *dest;
575 address generate_atomic_cmpxchg_long() {
576 StubCodeMark mark(this, "StubRoutines", "atomic_cmpxchg_long");
577 address start = __ pc();
578
579 __ movq(rax, c_rarg2);
580 if ( os::is_MP() ) __ lock();
581 __ cmpxchgq(c_rarg0, Address(c_rarg1, 0));
582 __ ret(0);
583
584 return start;
585 }
586
587 // Support for jint atomic::add(jint add_value, volatile jint* dest)
588 //
589 // Arguments :
590 // c_rarg0: add_value
591 // c_rarg1: dest
592 //
593 // Result:
594 // *dest += add_value
595 // return *dest;
596 address generate_atomic_add() {
597 StubCodeMark mark(this, "StubRoutines", "atomic_add");
598 address start = __ pc();
599
600 __ movl(rax, c_rarg0);
601 if ( os::is_MP() ) __ lock();
602 __ xaddl(Address(c_rarg1, 0), c_rarg0);
603 __ addl(rax, c_rarg0);
604 __ ret(0);
605
606 return start;
607 }
608
609 // Support for intptr_t atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest)
610 //
611 // Arguments :
612 // c_rarg0: add_value
613 // c_rarg1: dest
614 //
615 // Result:
616 // *dest += add_value
617 // return *dest;
618 address generate_atomic_add_ptr() {
619 StubCodeMark mark(this, "StubRoutines", "atomic_add_ptr");
620 address start = __ pc();
621
622 __ movq(rax, c_rarg0); // Copy to eax we need a return value anyhow
623 if ( os::is_MP() ) __ lock();
624 __ xaddl(Address(c_rarg1, 0), c_rarg0);
625 __ addl(rax, c_rarg0);
626 __ ret(0);
627
628 return start;
629 }
630
631 // Support for intptr_t OrderAccess::fence()
632 //
633 // Arguments :
634 //
635 // Result:
636 address generate_orderaccess_fence() {
637 StubCodeMark mark(this, "StubRoutines", "orderaccess_fence");
638 address start = __ pc();
639 __ mfence();
640 __ ret(0);
641
642 return start;
643 }
644
645 // Support for intptr_t get_previous_fp()
646 //
647 // This routine is used to find the previous frame pointer for the
648 // caller (current_frame_guess). This is used as part of debugging
649 // ps() is seemingly lost trying to find frames.
650 // This code assumes that caller current_frame_guess) has a frame.
651 address generate_get_previous_fp() {
652 StubCodeMark mark(this, "StubRoutines", "get_previous_fp");
653 const Address old_fp(rbp, 0);
654 const Address older_fp(rax, 0);
655 address start = __ pc();
656
657 __ enter();
658 __ movq(rax, old_fp); // callers fp
659 __ movq(rax, older_fp); // the frame for ps()
660 __ popq(rbp);
661 __ ret(0);
662
663 return start;
664 }
665
666 //----------------------------------------------------------------------------------------------------
667 // Support for void verify_mxcsr()
668 //
669 // This routine is used with -Xcheck:jni to verify that native
670 // JNI code does not return to Java code without restoring the
671 // MXCSR register to our expected state.
672
673 address generate_verify_mxcsr() {
674 StubCodeMark mark(this, "StubRoutines", "verify_mxcsr");
675 address start = __ pc();
676
677 const Address mxcsr_save(rsp, 0);
678
679 if (CheckJNICalls) {
680 Label ok_ret;
681 __ pushq(rax);
682 __ subq(rsp, wordSize); // allocate a temp location
683 __ stmxcsr(mxcsr_save);
684 __ movl(rax, mxcsr_save);
685 __ andl(rax, MXCSR_MASK); // Only check control and mask bits
686 __ cmpl(rax, *(int *)(StubRoutines::amd64::mxcsr_std()));
687 __ jcc(Assembler::equal, ok_ret);
688
689 __ warn("MXCSR changed by native JNI code, use -XX:+RestoreMXCSROnJNICall");
690
691 __ ldmxcsr(ExternalAddress(StubRoutines::amd64::mxcsr_std()));
692
693 __ bind(ok_ret);
694 __ addq(rsp, wordSize);
695 __ popq(rax);
696 }
697
698 __ ret(0);
699
700 return start;
701 }
702
703 address generate_f2i_fixup() {
704 StubCodeMark mark(this, "StubRoutines", "f2i_fixup");
705 Address inout(rsp, 5 * wordSize); // return address + 4 saves
706
707 address start = __ pc();
708
709 Label L;
710
711 __ pushq(rax);
712 __ pushq(c_rarg3);
713 __ pushq(c_rarg2);
714 __ pushq(c_rarg1);
715
716 __ movl(rax, 0x7f800000);
717 __ xorl(c_rarg3, c_rarg3);
718 __ movl(c_rarg2, inout);
719 __ movl(c_rarg1, c_rarg2);
720 __ andl(c_rarg1, 0x7fffffff);
721 __ cmpl(rax, c_rarg1); // NaN? -> 0
722 __ jcc(Assembler::negative, L);
723 __ testl(c_rarg2, c_rarg2); // signed ? min_jint : max_jint
724 __ movl(c_rarg3, 0x80000000);
725 __ movl(rax, 0x7fffffff);
726 __ cmovl(Assembler::positive, c_rarg3, rax);
727
728 __ bind(L);
729 __ movq(inout, c_rarg3);
730
731 __ popq(c_rarg1);
732 __ popq(c_rarg2);
733 __ popq(c_rarg3);
734 __ popq(rax);
735
736 __ ret(0);
737
738 return start;
739 }
740
741 address generate_f2l_fixup() {
742 StubCodeMark mark(this, "StubRoutines", "f2l_fixup");
743 Address inout(rsp, 5 * wordSize); // return address + 4 saves
744 address start = __ pc();
745
746 Label L;
747
748 __ pushq(rax);
749 __ pushq(c_rarg3);
750 __ pushq(c_rarg2);
751 __ pushq(c_rarg1);
752
753 __ movl(rax, 0x7f800000);
754 __ xorl(c_rarg3, c_rarg3);
755 __ movl(c_rarg2, inout);
756 __ movl(c_rarg1, c_rarg2);
757 __ andl(c_rarg1, 0x7fffffff);
758 __ cmpl(rax, c_rarg1); // NaN? -> 0
759 __ jcc(Assembler::negative, L);
760 __ testl(c_rarg2, c_rarg2); // signed ? min_jlong : max_jlong
761 __ mov64(c_rarg3, 0x8000000000000000);
762 __ mov64(rax, 0x7fffffffffffffff);
763 __ cmovq(Assembler::positive, c_rarg3, rax);
764
765 __ bind(L);
766 __ movq(inout, c_rarg3);
767
768 __ popq(c_rarg1);
769 __ popq(c_rarg2);
770 __ popq(c_rarg3);
771 __ popq(rax);
772
773 __ ret(0);
774
775 return start;
776 }
777
778 address generate_d2i_fixup() {
779 StubCodeMark mark(this, "StubRoutines", "d2i_fixup");
780 Address inout(rsp, 6 * wordSize); // return address + 5 saves
781
782 address start = __ pc();
783
784 Label L;
785
786 __ pushq(rax);
787 __ pushq(c_rarg3);
788 __ pushq(c_rarg2);
789 __ pushq(c_rarg1);
790 __ pushq(c_rarg0);
791
792 __ movl(rax, 0x7ff00000);
793 __ movq(c_rarg2, inout);
794 __ movl(c_rarg3, c_rarg2);
795 __ movq(c_rarg1, c_rarg2);
796 __ movq(c_rarg0, c_rarg2);
797 __ negl(c_rarg3);
798 __ shrq(c_rarg1, 0x20);
799 __ orl(c_rarg3, c_rarg2);
800 __ andl(c_rarg1, 0x7fffffff);
801 __ xorl(c_rarg2, c_rarg2);
802 __ shrl(c_rarg3, 0x1f);
803 __ orl(c_rarg1, c_rarg3);
804 __ cmpl(rax, c_rarg1);
805 __ jcc(Assembler::negative, L); // NaN -> 0
806 __ testq(c_rarg0, c_rarg0); // signed ? min_jint : max_jint
807 __ movl(c_rarg2, 0x80000000);
808 __ movl(rax, 0x7fffffff);
809 __ cmovl(Assembler::positive, c_rarg2, rax);
810
811 __ bind(L);
812 __ movq(inout, c_rarg2);
813
814 __ popq(c_rarg0);
815 __ popq(c_rarg1);
816 __ popq(c_rarg2);
817 __ popq(c_rarg3);
818 __ popq(rax);
819
820 __ ret(0);
821
822 return start;
823 }
824
825 address generate_d2l_fixup() {
826 StubCodeMark mark(this, "StubRoutines", "d2l_fixup");
827 Address inout(rsp, 6 * wordSize); // return address + 5 saves
828
829 address start = __ pc();
830
831 Label L;
832
833 __ pushq(rax);
834 __ pushq(c_rarg3);
835 __ pushq(c_rarg2);
836 __ pushq(c_rarg1);
837 __ pushq(c_rarg0);
838
839 __ movl(rax, 0x7ff00000);
840 __ movq(c_rarg2, inout);
841 __ movl(c_rarg3, c_rarg2);
842 __ movq(c_rarg1, c_rarg2);
843 __ movq(c_rarg0, c_rarg2);
844 __ negl(c_rarg3);
845 __ shrq(c_rarg1, 0x20);
846 __ orl(c_rarg3, c_rarg2);
847 __ andl(c_rarg1, 0x7fffffff);
848 __ xorl(c_rarg2, c_rarg2);
849 __ shrl(c_rarg3, 0x1f);
850 __ orl(c_rarg1, c_rarg3);
851 __ cmpl(rax, c_rarg1);
852 __ jcc(Assembler::negative, L); // NaN -> 0
853 __ testq(c_rarg0, c_rarg0); // signed ? min_jlong : max_jlong
854 __ mov64(c_rarg2, 0x8000000000000000);
855 __ mov64(rax, 0x7fffffffffffffff);
856 __ cmovq(Assembler::positive, c_rarg2, rax);
857
858 __ bind(L);
859 __ movq(inout, c_rarg2);
860
861 __ popq(c_rarg0);
862 __ popq(c_rarg1);
863 __ popq(c_rarg2);
864 __ popq(c_rarg3);
865 __ popq(rax);
866
867 __ ret(0);
868
869 return start;
870 }
871
872 address generate_fp_mask(const char *stub_name, int64_t mask) {
873 StubCodeMark mark(this, "StubRoutines", stub_name);
874
875 __ align(16);
876 address start = __ pc();
877
878 __ emit_data64( mask, relocInfo::none );
879 __ emit_data64( mask, relocInfo::none );
880
881 return start;
882 }
883
884 // The following routine generates a subroutine to throw an
885 // asynchronous UnknownError when an unsafe access gets a fault that
886 // could not be reasonably prevented by the programmer. (Example:
887 // SIGBUS/OBJERR.)
888 address generate_handler_for_unsafe_access() {
889 StubCodeMark mark(this, "StubRoutines", "handler_for_unsafe_access");
890 address start = __ pc();
891
892 __ pushq(0); // hole for return address-to-be
893 __ pushaq(); // push registers
894 Address next_pc(rsp, RegisterImpl::number_of_registers * BytesPerWord);
895
896 __ subq(rsp, frame::arg_reg_save_area_bytes);
897 BLOCK_COMMENT("call handle_unsafe_access");
898 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, handle_unsafe_access)));
899 __ addq(rsp, frame::arg_reg_save_area_bytes);
900
901 __ movq(next_pc, rax); // stuff next address
902 __ popaq();
903 __ ret(0); // jump to next address
904
905 return start;
906 }
907
908 // Non-destructive plausibility checks for oops
909 //
910 // Arguments:
911 // all args on stack!
912 //
913 // Stack after saving c_rarg3:
914 // [tos + 0]: saved c_rarg3
915 // [tos + 1]: saved c_rarg2
916 // [tos + 2]: saved r12 (several TemplateTable methods use it)
917 // [tos + 3]: saved flags
918 // [tos + 4]: return address
919 // * [tos + 5]: error message (char*)
920 // * [tos + 6]: object to verify (oop)
921 // * [tos + 7]: saved rax - saved by caller and bashed
922 // * = popped on exit
923 address generate_verify_oop() {
924 StubCodeMark mark(this, "StubRoutines", "verify_oop");
925 address start = __ pc();
926
927 Label exit, error;
928
929 __ pushfq();
930 __ incrementl(ExternalAddress((address) StubRoutines::verify_oop_count_addr()));
931
932 __ pushq(r12);
933
934 // save c_rarg2 and c_rarg3
935 __ pushq(c_rarg2);
936 __ pushq(c_rarg3);
937
938 enum {
939 // After previous pushes.
940 oop_to_verify = 6 * wordSize,
941 saved_rax = 7 * wordSize,
942
943 // Before the call to MacroAssembler::debug(), see below.
944 return_addr = 16 * wordSize,
945 error_msg = 17 * wordSize
946 };
947
948 // get object
949 __ movq(rax, Address(rsp, oop_to_verify));
950
951 // make sure object is 'reasonable'
952 __ testq(rax, rax);
953 __ jcc(Assembler::zero, exit); // if obj is NULL it is OK
954 // Check if the oop is in the right area of memory
955 __ movq(c_rarg2, rax);
956 __ movptr(c_rarg3, (int64_t) Universe::verify_oop_mask());
957 __ andq(c_rarg2, c_rarg3);
958 __ movptr(c_rarg3, (int64_t) Universe::verify_oop_bits());
959 __ cmpq(c_rarg2, c_rarg3);
960 __ jcc(Assembler::notZero, error);
961
962 // set r12 to heapbase for load_klass()
963 __ reinit_heapbase();
964
965 // make sure klass is 'reasonable'
966 __ load_klass(rax, rax); // get klass
967 __ testq(rax, rax);
968 __ jcc(Assembler::zero, error); // if klass is NULL it is broken
969 // Check if the klass is in the right area of memory
970 __ movq(c_rarg2, rax);
971 __ movptr(c_rarg3, (int64_t) Universe::verify_klass_mask());
972 __ andq(c_rarg2, c_rarg3);
973 __ movptr(c_rarg3, (int64_t) Universe::verify_klass_bits());
974 __ cmpq(c_rarg2, c_rarg3);
975 __ jcc(Assembler::notZero, error);
976
977 // make sure klass' klass is 'reasonable'
978 __ load_klass(rax, rax);
979 __ testq(rax, rax);
980 __ jcc(Assembler::zero, error); // if klass' klass is NULL it is broken
981 // Check if the klass' klass is in the right area of memory
982 __ movptr(c_rarg3, (int64_t) Universe::verify_klass_mask());
983 __ andq(rax, c_rarg3);
984 __ movptr(c_rarg3, (int64_t) Universe::verify_klass_bits());
985 __ cmpq(rax, c_rarg3);
986 __ jcc(Assembler::notZero, error);
987
988 // return if everything seems ok
989 __ bind(exit);
990 __ movq(rax, Address(rsp, saved_rax)); // get saved rax back
991 __ popq(c_rarg3); // restore c_rarg3
992 __ popq(c_rarg2); // restore c_rarg2
993 __ popq(r12); // restore r12
994 __ popfq(); // restore flags
995 __ ret(3 * wordSize); // pop caller saved stuff
996
997 // handle errors
998 __ bind(error);
999 __ movq(rax, Address(rsp, saved_rax)); // get saved rax back
1000 __ popq(c_rarg3); // get saved c_rarg3 back
1001 __ popq(c_rarg2); // get saved c_rarg2 back
1002 __ popq(r12); // get saved r12 back
1003 __ popfq(); // get saved flags off stack --
1004 // will be ignored
1005
1006 __ pushaq(); // push registers
1007 // (rip is already
1008 // already pushed)
1009 // debug(char* msg, int64_t pc, int64_t regs[])
1010 // We've popped the registers we'd saved (c_rarg3, c_rarg2 and flags), and
1011 // pushed all the registers, so now the stack looks like:
1012 // [tos + 0] 16 saved registers
1013 // [tos + 16] return address
1014 // * [tos + 17] error message (char*)
1015 // * [tos + 18] object to verify (oop)
1016 // * [tos + 19] saved rax - saved by caller and bashed
1017 // * = popped on exit
1018
1019 __ movq(c_rarg0, Address(rsp, error_msg)); // pass address of error message
1020 __ movq(c_rarg1, Address(rsp, return_addr)); // pass return address
1021 __ movq(c_rarg2, rsp); // pass address of regs on stack
1022 __ movq(r12, rsp); // remember rsp
1023 __ subq(rsp, frame::arg_reg_save_area_bytes);// windows
1024 __ andq(rsp, -16); // align stack as required by ABI
1025 BLOCK_COMMENT("call MacroAssembler::debug");
1026 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, MacroAssembler::debug)));
1027 __ movq(rsp, r12); // restore rsp
1028 __ popaq(); // pop registers (includes r12)
1029 __ ret(3 * wordSize); // pop caller saved stuff
1030
1031 return start;
1032 }
1033
1034 static address disjoint_byte_copy_entry;
1035 static address disjoint_short_copy_entry;
1036 static address disjoint_int_copy_entry;
1037 static address disjoint_long_copy_entry;
1038 static address disjoint_oop_copy_entry;
1039
1040 static address byte_copy_entry;
1041 static address short_copy_entry;
1042 static address int_copy_entry;
1043 static address long_copy_entry;
1044 static address oop_copy_entry;
1045
1046 static address checkcast_copy_entry;
1047 static address unsafe_copy_entry;
1048
1049 //
1050 // Verify that a register contains clean 32-bits positive value
1051 // (high 32-bits are 0) so it could be used in 64-bits shifts.
1052 //
1053 // Input:
1054 // Rint - 32-bits value
1055 // Rtmp - scratch
1056 //
1057 void assert_clean_int(Register Rint, Register Rtmp) {
1058 #ifdef ASSERT
1059 Label L;
1060 assert_different_registers(Rtmp, Rint);
1061 __ movslq(Rtmp, Rint);
1062 __ cmpq(Rtmp, Rint);
1063 __ jcc(Assembler::equal, L);
1064 __ stop("high 32-bits of int value are not 0");
1065 __ bind(L);
1066 #endif
1067 }
1068
1069 // Generate overlap test for array copy stubs
1070 //
1071 // Input:
1072 // c_rarg0 - from
1073 // c_rarg1 - to
1074 // c_rarg2 - element count
1075 //
1076 // Output:
1077 // rax - &from[element count - 1]
1078 //
1079 void array_overlap_test(address no_overlap_target, Address::ScaleFactor sf) {
1080 assert(no_overlap_target != NULL, "must be generated");
1081 array_overlap_test(no_overlap_target, NULL, sf);
1082 }
1083 void array_overlap_test(Label& L_no_overlap, Address::ScaleFactor sf) {
1084 array_overlap_test(NULL, &L_no_overlap, sf);
1085 }
1086 void array_overlap_test(address no_overlap_target, Label* NOLp, Address::ScaleFactor sf) {
1087 const Register from = c_rarg0;
1088 const Register to = c_rarg1;
1089 const Register count = c_rarg2;
1090 const Register end_from = rax;
1091
1092 __ cmpq(to, from);
1093 __ leaq(end_from, Address(from, count, sf, 0));
1094 if (NOLp == NULL) {
1095 ExternalAddress no_overlap(no_overlap_target);
1096 __ jump_cc(Assembler::belowEqual, no_overlap);
1097 __ cmpq(to, end_from);
1098 __ jump_cc(Assembler::aboveEqual, no_overlap);
1099 } else {
1100 __ jcc(Assembler::belowEqual, (*NOLp));
1101 __ cmpq(to, end_from);
1102 __ jcc(Assembler::aboveEqual, (*NOLp));
1103 }
1104 }
1105
1106 // Shuffle first three arg regs on Windows into Linux/Solaris locations.
1107 //
1108 // Outputs:
1109 // rdi - rcx
1110 // rsi - rdx
1111 // rdx - r8
1112 // rcx - r9
1113 //
1114 // Registers r9 and r10 are used to save rdi and rsi on Windows, which latter
1115 // are non-volatile. r9 and r10 should not be used by the caller.
1116 //
1117 void setup_arg_regs(int nargs = 3) {
1118 const Register saved_rdi = r9;
1119 const Register saved_rsi = r10;
1120 assert(nargs == 3 || nargs == 4, "else fix");
1121 #ifdef _WIN64
1122 assert(c_rarg0 == rcx && c_rarg1 == rdx && c_rarg2 == r8 && c_rarg3 == r9,
1123 "unexpected argument registers");
1124 if (nargs >= 4)
1125 __ movq(rax, r9); // r9 is also saved_rdi
1126 __ movq(saved_rdi, rdi);
1127 __ movq(saved_rsi, rsi);
1128 __ movq(rdi, rcx); // c_rarg0
1129 __ movq(rsi, rdx); // c_rarg1
1130 __ movq(rdx, r8); // c_rarg2
1131 if (nargs >= 4)
1132 __ movq(rcx, rax); // c_rarg3 (via rax)
1133 #else
1134 assert(c_rarg0 == rdi && c_rarg1 == rsi && c_rarg2 == rdx && c_rarg3 == rcx,
1135 "unexpected argument registers");
1136 #endif
1137 }
1138
1139 void restore_arg_regs() {
1140 const Register saved_rdi = r9;
1141 const Register saved_rsi = r10;
1142 #ifdef _WIN64
1143 __ movq(rdi, saved_rdi);
1144 __ movq(rsi, saved_rsi);
1145 #endif
1146 }
1147
1148 // Generate code for an array write pre barrier
1149 //
1150 // addr - starting address
1151 // count - element count
1152 //
1153 // Destroy no registers!
1154 //
1155 void gen_write_ref_array_pre_barrier(Register addr, Register count) {
1156 #if 0 // G1 - only
1157 assert_different_registers(addr, c_rarg1);
1158 assert_different_registers(count, c_rarg0);
1159 BarrierSet* bs = Universe::heap()->barrier_set();
1160 switch (bs->kind()) {
1161 case BarrierSet::G1SATBCT:
1162 case BarrierSet::G1SATBCTLogging:
1163 {
1164 __ pushaq(); // push registers
1165 __ movq(c_rarg0, addr);
1166 __ movq(c_rarg1, count);
1167 __ call(RuntimeAddress(BarrierSet::static_write_ref_array_pre));
1168 __ popaq();
1169 }
1170 break;
1171 case BarrierSet::CardTableModRef:
1172 case BarrierSet::CardTableExtension:
1173 case BarrierSet::ModRef:
1174 break;
1175 default :
1176 ShouldNotReachHere();
1177
1178 }
1179 #endif // 0 G1 - only
1180 }
1181
1182 //
1183 // Generate code for an array write post barrier
1184 //
1185 // Input:
1186 // start - register containing starting address of destination array
1187 // end - register containing ending address of destination array
1188 // scratch - scratch register
1189 //
1190 // The input registers are overwritten.
1191 // The ending address is inclusive.
1192 void gen_write_ref_array_post_barrier(Register start, Register end, Register scratch) {
1193 assert_different_registers(start, end, scratch);
1194 BarrierSet* bs = Universe::heap()->barrier_set();
1195 switch (bs->kind()) {
1196 #if 0 // G1 - only
1197 case BarrierSet::G1SATBCT:
1198 case BarrierSet::G1SATBCTLogging:
1199
1200 {
1201 __ pushaq(); // push registers (overkill)
1202 // must compute element count unless barrier set interface is changed (other platforms supply count)
1203 assert_different_registers(start, end, scratch);
1204 __ leaq(scratch, Address(end, wordSize));
1205 __ subq(scratch, start);
1206 __ shrq(scratch, LogBytesPerWord);
1207 __ movq(c_rarg0, start);
1208 __ movq(c_rarg1, scratch);
1209 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, BarrierSet::static_write_ref_array_post));
1210 __ popaq();
1211 }
1212 break;
1213 #endif // 0 G1 - only
1214 case BarrierSet::CardTableModRef:
1215 case BarrierSet::CardTableExtension:
1216 {
1217 CardTableModRefBS* ct = (CardTableModRefBS*)bs;
1218 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
1219
1220 Label L_loop;
1221
1222 __ shrq(start, CardTableModRefBS::card_shift);
1223 __ shrq(end, CardTableModRefBS::card_shift);
1224 __ subq(end, start); // number of bytes to copy
1225
1226 const Register count = end; // 'end' register contains bytes count now
1227 __ lea(scratch, ExternalAddress((address)ct->byte_map_base));
1228 __ addq(start, scratch);
1229 __ BIND(L_loop);
1230 __ movb(Address(start, count, Address::times_1), 0);
1231 __ decrementq(count);
1232 __ jcc(Assembler::greaterEqual, L_loop);
1233 }
1234 }
1235 }
1236
1237 // Copy big chunks forward
1238 //
1239 // Inputs:
1240 // end_from - source arrays end address
1241 // end_to - destination array end address
1242 // qword_count - 64-bits element count, negative
1243 // to - scratch
1244 // L_copy_32_bytes - entry label
1245 // L_copy_8_bytes - exit label
1246 //
1247 void copy_32_bytes_forward(Register end_from, Register end_to,
1248 Register qword_count, Register to,
1249 Label& L_copy_32_bytes, Label& L_copy_8_bytes) {
1250 DEBUG_ONLY(__ stop("enter at entry label, not here"));
1251 Label L_loop;
1252 __ align(16);
1253 __ BIND(L_loop);
1254 __ movq(to, Address(end_from, qword_count, Address::times_8, -24));
1255 __ movq(Address(end_to, qword_count, Address::times_8, -24), to);
1256 __ movq(to, Address(end_from, qword_count, Address::times_8, -16));
1257 __ movq(Address(end_to, qword_count, Address::times_8, -16), to);
1258 __ movq(to, Address(end_from, qword_count, Address::times_8, - 8));
1259 __ movq(Address(end_to, qword_count, Address::times_8, - 8), to);
1260 __ movq(to, Address(end_from, qword_count, Address::times_8, - 0));
1261 __ movq(Address(end_to, qword_count, Address::times_8, - 0), to);
1262 __ BIND(L_copy_32_bytes);
1263 __ addq(qword_count, 4);
1264 __ jcc(Assembler::lessEqual, L_loop);
1265 __ subq(qword_count, 4);
1266 __ jcc(Assembler::less, L_copy_8_bytes); // Copy trailing qwords
1267 }
1268
1269
1270 // Copy big chunks backward
1271 //
1272 // Inputs:
1273 // from - source arrays address
1274 // dest - destination array address
1275 // qword_count - 64-bits element count
1276 // to - scratch
1277 // L_copy_32_bytes - entry label
1278 // L_copy_8_bytes - exit label
1279 //
1280 void copy_32_bytes_backward(Register from, Register dest,
1281 Register qword_count, Register to,
1282 Label& L_copy_32_bytes, Label& L_copy_8_bytes) {
1283 DEBUG_ONLY(__ stop("enter at entry label, not here"));
1284 Label L_loop;
1285 __ align(16);
1286 __ BIND(L_loop);
1287 __ movq(to, Address(from, qword_count, Address::times_8, 24));
1288 __ movq(Address(dest, qword_count, Address::times_8, 24), to);
1289 __ movq(to, Address(from, qword_count, Address::times_8, 16));
1290 __ movq(Address(dest, qword_count, Address::times_8, 16), to);
1291 __ movq(to, Address(from, qword_count, Address::times_8, 8));
1292 __ movq(Address(dest, qword_count, Address::times_8, 8), to);
1293 __ movq(to, Address(from, qword_count, Address::times_8, 0));
1294 __ movq(Address(dest, qword_count, Address::times_8, 0), to);
1295 __ BIND(L_copy_32_bytes);
1296 __ subq(qword_count, 4);
1297 __ jcc(Assembler::greaterEqual, L_loop);
1298 __ addq(qword_count, 4);
1299 __ jcc(Assembler::greater, L_copy_8_bytes); // Copy trailing qwords
1300 }
1301
1302
1303 // Arguments:
1304 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1305 // ignored
1306 // name - stub name string
1307 //
1308 // Inputs:
1309 // c_rarg0 - source array address
1310 // c_rarg1 - destination array address
1311 // c_rarg2 - element count, treated as ssize_t, can be zero
1312 //
1313 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
1314 // we let the hardware handle it. The one to eight bytes within words,
1315 // dwords or qwords that span cache line boundaries will still be loaded
1316 // and stored atomically.
1317 //
1318 // Side Effects:
1319 // disjoint_byte_copy_entry is set to the no-overlap entry point
1320 // used by generate_conjoint_byte_copy().
1321 //
1322 address generate_disjoint_byte_copy(bool aligned, const char *name) {
1323 __ align(CodeEntryAlignment);
1324 StubCodeMark mark(this, "StubRoutines", name);
1325 address start = __ pc();
1326
1327 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
1328 Label L_copy_byte, L_exit;
1329 const Register from = rdi; // source array address
1330 const Register to = rsi; // destination array address
1331 const Register count = rdx; // elements count
1332 const Register byte_count = rcx;
1333 const Register qword_count = count;
1334 const Register end_from = from; // source array end address
1335 const Register end_to = to; // destination array end address
1336 // End pointers are inclusive, and if count is not zero they point
1337 // to the last unit copied: end_to[0] := end_from[0]
1338
1339 __ enter(); // required for proper stackwalking of RuntimeStub frame
1340 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1341
1342 disjoint_byte_copy_entry = __ pc();
1343 BLOCK_COMMENT("Entry:");
1344 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1345
1346 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1347 // r9 and r10 may be used to save non-volatile registers
1348
1349 // 'from', 'to' and 'count' are now valid
1350 __ movq(byte_count, count);
1351 __ shrq(count, 3); // count => qword_count
1352
1353 // Copy from low to high addresses. Use 'to' as scratch.
1354 __ leaq(end_from, Address(from, qword_count, Address::times_8, -8));
1355 __ leaq(end_to, Address(to, qword_count, Address::times_8, -8));
1356 __ negq(qword_count); // make the count negative
1357 __ jmp(L_copy_32_bytes);
1358
1359 // Copy trailing qwords
1360 __ BIND(L_copy_8_bytes);
1361 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1362 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1363 __ incrementq(qword_count);
1364 __ jcc(Assembler::notZero, L_copy_8_bytes);
1365
1366 // Check for and copy trailing dword
1367 __ BIND(L_copy_4_bytes);
1368 __ testq(byte_count, 4);
1369 __ jccb(Assembler::zero, L_copy_2_bytes);
1370 __ movl(rax, Address(end_from, 8));
1371 __ movl(Address(end_to, 8), rax);
1372
1373 __ addq(end_from, 4);
1374 __ addq(end_to, 4);
1375
1376 // Check for and copy trailing word
1377 __ BIND(L_copy_2_bytes);
1378 __ testq(byte_count, 2);
1379 __ jccb(Assembler::zero, L_copy_byte);
1380 __ movw(rax, Address(end_from, 8));
1381 __ movw(Address(end_to, 8), rax);
1382
1383 __ addq(end_from, 2);
1384 __ addq(end_to, 2);
1385
1386 // Check for and copy trailing byte
1387 __ BIND(L_copy_byte);
1388 __ testq(byte_count, 1);
1389 __ jccb(Assembler::zero, L_exit);
1390 __ movb(rax, Address(end_from, 8));
1391 __ movb(Address(end_to, 8), rax);
1392
1393 __ BIND(L_exit);
1394 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr);
1395 restore_arg_regs();
1396 __ xorq(rax, rax); // return 0
1397 __ leave(); // required for proper stackwalking of RuntimeStub frame
1398 __ ret(0);
1399
1400 // Copy in 32-bytes chunks
1401 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1402 __ jmp(L_copy_4_bytes);
1403
1404 return start;
1405 }
1406
1407 // Arguments:
1408 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1409 // ignored
1410 // name - stub name string
1411 //
1412 // Inputs:
1413 // c_rarg0 - source array address
1414 // c_rarg1 - destination array address
1415 // c_rarg2 - element count, treated as ssize_t, can be zero
1416 //
1417 // If 'from' and/or 'to' are aligned on 4-, 2-, or 1-byte boundaries,
1418 // we let the hardware handle it. The one to eight bytes within words,
1419 // dwords or qwords that span cache line boundaries will still be loaded
1420 // and stored atomically.
1421 //
1422 address generate_conjoint_byte_copy(bool aligned, const char *name) {
1423 __ align(CodeEntryAlignment);
1424 StubCodeMark mark(this, "StubRoutines", name);
1425 address start = __ pc();
1426
1427 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_copy_2_bytes;
1428 const Register from = rdi; // source array address
1429 const Register to = rsi; // destination array address
1430 const Register count = rdx; // elements count
1431 const Register byte_count = rcx;
1432 const Register qword_count = count;
1433
1434 __ enter(); // required for proper stackwalking of RuntimeStub frame
1435 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1436
1437 byte_copy_entry = __ pc();
1438 BLOCK_COMMENT("Entry:");
1439 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1440
1441 array_overlap_test(disjoint_byte_copy_entry, Address::times_1);
1442 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1443 // r9 and r10 may be used to save non-volatile registers
1444
1445 // 'from', 'to' and 'count' are now valid
1446 __ movq(byte_count, count);
1447 __ shrq(count, 3); // count => qword_count
1448
1449 // Copy from high to low addresses.
1450
1451 // Check for and copy trailing byte
1452 __ testq(byte_count, 1);
1453 __ jcc(Assembler::zero, L_copy_2_bytes);
1454 __ movb(rax, Address(from, byte_count, Address::times_1, -1));
1455 __ movb(Address(to, byte_count, Address::times_1, -1), rax);
1456 __ decrementq(byte_count); // Adjust for possible trailing word
1457
1458 // Check for and copy trailing word
1459 __ BIND(L_copy_2_bytes);
1460 __ testq(byte_count, 2);
1461 __ jcc(Assembler::zero, L_copy_4_bytes);
1462 __ movw(rax, Address(from, byte_count, Address::times_1, -2));
1463 __ movw(Address(to, byte_count, Address::times_1, -2), rax);
1464
1465 // Check for and copy trailing dword
1466 __ BIND(L_copy_4_bytes);
1467 __ testq(byte_count, 4);
1468 __ jcc(Assembler::zero, L_copy_32_bytes);
1469 __ movl(rax, Address(from, qword_count, Address::times_8));
1470 __ movl(Address(to, qword_count, Address::times_8), rax);
1471 __ jmp(L_copy_32_bytes);
1472
1473 // Copy trailing qwords
1474 __ BIND(L_copy_8_bytes);
1475 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1476 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1477 __ decrementq(qword_count);
1478 __ jcc(Assembler::notZero, L_copy_8_bytes);
1479
1480 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr);
1481 restore_arg_regs();
1482 __ xorq(rax, rax); // return 0
1483 __ leave(); // required for proper stackwalking of RuntimeStub frame
1484 __ ret(0);
1485
1486 // Copy in 32-bytes chunks
1487 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1488
1489 inc_counter_np(SharedRuntime::_jbyte_array_copy_ctr);
1490 restore_arg_regs();
1491 __ xorq(rax, rax); // return 0
1492 __ leave(); // required for proper stackwalking of RuntimeStub frame
1493 __ ret(0);
1494
1495 return start;
1496 }
1497
1498 // Arguments:
1499 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1500 // ignored
1501 // name - stub name string
1502 //
1503 // Inputs:
1504 // c_rarg0 - source array address
1505 // c_rarg1 - destination array address
1506 // c_rarg2 - element count, treated as ssize_t, can be zero
1507 //
1508 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
1509 // let the hardware handle it. The two or four words within dwords
1510 // or qwords that span cache line boundaries will still be loaded
1511 // and stored atomically.
1512 //
1513 // Side Effects:
1514 // disjoint_short_copy_entry is set to the no-overlap entry point
1515 // used by generate_conjoint_short_copy().
1516 //
1517 address generate_disjoint_short_copy(bool aligned, const char *name) {
1518 __ align(CodeEntryAlignment);
1519 StubCodeMark mark(this, "StubRoutines", name);
1520 address start = __ pc();
1521
1522 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes,L_copy_2_bytes,L_exit;
1523 const Register from = rdi; // source array address
1524 const Register to = rsi; // destination array address
1525 const Register count = rdx; // elements count
1526 const Register word_count = rcx;
1527 const Register qword_count = count;
1528 const Register end_from = from; // source array end address
1529 const Register end_to = to; // destination array end address
1530 // End pointers are inclusive, and if count is not zero they point
1531 // to the last unit copied: end_to[0] := end_from[0]
1532
1533 __ enter(); // required for proper stackwalking of RuntimeStub frame
1534 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1535
1536 disjoint_short_copy_entry = __ pc();
1537 BLOCK_COMMENT("Entry:");
1538 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1539
1540 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1541 // r9 and r10 may be used to save non-volatile registers
1542
1543 // 'from', 'to' and 'count' are now valid
1544 __ movq(word_count, count);
1545 __ shrq(count, 2); // count => qword_count
1546
1547 // Copy from low to high addresses. Use 'to' as scratch.
1548 __ leaq(end_from, Address(from, qword_count, Address::times_8, -8));
1549 __ leaq(end_to, Address(to, qword_count, Address::times_8, -8));
1550 __ negq(qword_count);
1551 __ jmp(L_copy_32_bytes);
1552
1553 // Copy trailing qwords
1554 __ BIND(L_copy_8_bytes);
1555 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1556 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1557 __ incrementq(qword_count);
1558 __ jcc(Assembler::notZero, L_copy_8_bytes);
1559
1560 // Original 'dest' is trashed, so we can't use it as a
1561 // base register for a possible trailing word copy
1562
1563 // Check for and copy trailing dword
1564 __ BIND(L_copy_4_bytes);
1565 __ testq(word_count, 2);
1566 __ jccb(Assembler::zero, L_copy_2_bytes);
1567 __ movl(rax, Address(end_from, 8));
1568 __ movl(Address(end_to, 8), rax);
1569
1570 __ addq(end_from, 4);
1571 __ addq(end_to, 4);
1572
1573 // Check for and copy trailing word
1574 __ BIND(L_copy_2_bytes);
1575 __ testq(word_count, 1);
1576 __ jccb(Assembler::zero, L_exit);
1577 __ movw(rax, Address(end_from, 8));
1578 __ movw(Address(end_to, 8), rax);
1579
1580 __ BIND(L_exit);
1581 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr);
1582 restore_arg_regs();
1583 __ xorq(rax, rax); // return 0
1584 __ leave(); // required for proper stackwalking of RuntimeStub frame
1585 __ ret(0);
1586
1587 // Copy in 32-bytes chunks
1588 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1589 __ jmp(L_copy_4_bytes);
1590
1591 return start;
1592 }
1593
1594 // Arguments:
1595 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1596 // ignored
1597 // name - stub name string
1598 //
1599 // Inputs:
1600 // c_rarg0 - source array address
1601 // c_rarg1 - destination array address
1602 // c_rarg2 - element count, treated as ssize_t, can be zero
1603 //
1604 // If 'from' and/or 'to' are aligned on 4- or 2-byte boundaries, we
1605 // let the hardware handle it. The two or four words within dwords
1606 // or qwords that span cache line boundaries will still be loaded
1607 // and stored atomically.
1608 //
1609 address generate_conjoint_short_copy(bool aligned, const char *name) {
1610 __ align(CodeEntryAlignment);
1611 StubCodeMark mark(this, "StubRoutines", name);
1612 address start = __ pc();
1613
1614 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes;
1615 const Register from = rdi; // source array address
1616 const Register to = rsi; // destination array address
1617 const Register count = rdx; // elements count
1618 const Register word_count = rcx;
1619 const Register qword_count = count;
1620
1621 __ enter(); // required for proper stackwalking of RuntimeStub frame
1622 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1623
1624 short_copy_entry = __ pc();
1625 BLOCK_COMMENT("Entry:");
1626 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1627
1628 array_overlap_test(disjoint_short_copy_entry, Address::times_2);
1629 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1630 // r9 and r10 may be used to save non-volatile registers
1631
1632 // 'from', 'to' and 'count' are now valid
1633 __ movq(word_count, count);
1634 __ shrq(count, 2); // count => qword_count
1635
1636 // Copy from high to low addresses. Use 'to' as scratch.
1637
1638 // Check for and copy trailing word
1639 __ testq(word_count, 1);
1640 __ jccb(Assembler::zero, L_copy_4_bytes);
1641 __ movw(rax, Address(from, word_count, Address::times_2, -2));
1642 __ movw(Address(to, word_count, Address::times_2, -2), rax);
1643
1644 // Check for and copy trailing dword
1645 __ BIND(L_copy_4_bytes);
1646 __ testq(word_count, 2);
1647 __ jcc(Assembler::zero, L_copy_32_bytes);
1648 __ movl(rax, Address(from, qword_count, Address::times_8));
1649 __ movl(Address(to, qword_count, Address::times_8), rax);
1650 __ jmp(L_copy_32_bytes);
1651
1652 // Copy trailing qwords
1653 __ BIND(L_copy_8_bytes);
1654 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1655 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1656 __ decrementq(qword_count);
1657 __ jcc(Assembler::notZero, L_copy_8_bytes);
1658
1659 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr);
1660 restore_arg_regs();
1661 __ xorq(rax, rax); // return 0
1662 __ leave(); // required for proper stackwalking of RuntimeStub frame
1663 __ ret(0);
1664
1665 // Copy in 32-bytes chunks
1666 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1667
1668 inc_counter_np(SharedRuntime::_jshort_array_copy_ctr);
1669 restore_arg_regs();
1670 __ xorq(rax, rax); // return 0
1671 __ leave(); // required for proper stackwalking of RuntimeStub frame
1672 __ ret(0);
1673
1674 return start;
1675 }
1676
1677 // Arguments:
1678 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1679 // ignored
1680 // is_oop - true => oop array, so generate store check code
1681 // name - stub name string
1682 //
1683 // Inputs:
1684 // c_rarg0 - source array address
1685 // c_rarg1 - destination array address
1686 // c_rarg2 - element count, treated as ssize_t, can be zero
1687 //
1688 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
1689 // the hardware handle it. The two dwords within qwords that span
1690 // cache line boundaries will still be loaded and stored atomicly.
1691 //
1692 // Side Effects:
1693 // disjoint_int_copy_entry is set to the no-overlap entry point
1694 // used by generate_conjoint_int_oop_copy().
1695 //
1696 address generate_disjoint_int_oop_copy(bool aligned, bool is_oop, const char *name) {
1697 __ align(CodeEntryAlignment);
1698 StubCodeMark mark(this, "StubRoutines", name);
1699 address start = __ pc();
1700
1701 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_4_bytes, L_exit;
1702 const Register from = rdi; // source array address
1703 const Register to = rsi; // destination array address
1704 const Register count = rdx; // elements count
1705 const Register dword_count = rcx;
1706 const Register qword_count = count;
1707 const Register end_from = from; // source array end address
1708 const Register end_to = to; // destination array end address
1709 const Register saved_to = r11; // saved destination array address
1710 // End pointers are inclusive, and if count is not zero they point
1711 // to the last unit copied: end_to[0] := end_from[0]
1712
1713 __ enter(); // required for proper stackwalking of RuntimeStub frame
1714 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1715
1716 (is_oop ? disjoint_oop_copy_entry : disjoint_int_copy_entry) = __ pc();
1717
1718 if (is_oop) {
1719 // no registers are destroyed by this call
1720 gen_write_ref_array_pre_barrier(/* dest */ c_rarg1, /* count */ c_rarg2);
1721 }
1722
1723 BLOCK_COMMENT("Entry:");
1724 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1725
1726 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1727 // r9 and r10 may be used to save non-volatile registers
1728
1729 if (is_oop) {
1730 __ movq(saved_to, to);
1731 }
1732
1733 // 'from', 'to' and 'count' are now valid
1734 __ movq(dword_count, count);
1735 __ shrq(count, 1); // count => qword_count
1736
1737 // Copy from low to high addresses. Use 'to' as scratch.
1738 __ leaq(end_from, Address(from, qword_count, Address::times_8, -8));
1739 __ leaq(end_to, Address(to, qword_count, Address::times_8, -8));
1740 __ negq(qword_count);
1741 __ jmp(L_copy_32_bytes);
1742
1743 // Copy trailing qwords
1744 __ BIND(L_copy_8_bytes);
1745 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1746 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1747 __ incrementq(qword_count);
1748 __ jcc(Assembler::notZero, L_copy_8_bytes);
1749
1750 // Check for and copy trailing dword
1751 __ BIND(L_copy_4_bytes);
1752 __ testq(dword_count, 1); // Only byte test since the value is 0 or 1
1753 __ jccb(Assembler::zero, L_exit);
1754 __ movl(rax, Address(end_from, 8));
1755 __ movl(Address(end_to, 8), rax);
1756
1757 __ BIND(L_exit);
1758 if (is_oop) {
1759 __ leaq(end_to, Address(saved_to, dword_count, Address::times_4, -4));
1760 gen_write_ref_array_post_barrier(saved_to, end_to, rax);
1761 }
1762 inc_counter_np(SharedRuntime::_jint_array_copy_ctr);
1763 restore_arg_regs();
1764 __ xorq(rax, rax); // return 0
1765 __ leave(); // required for proper stackwalking of RuntimeStub frame
1766 __ ret(0);
1767
1768 // Copy 32-bytes chunks
1769 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1770 __ jmp(L_copy_4_bytes);
1771
1772 return start;
1773 }
1774
1775 // Arguments:
1776 // aligned - true => Input and output aligned on a HeapWord == 8-byte boundary
1777 // ignored
1778 // is_oop - true => oop array, so generate store check code
1779 // name - stub name string
1780 //
1781 // Inputs:
1782 // c_rarg0 - source array address
1783 // c_rarg1 - destination array address
1784 // c_rarg2 - element count, treated as ssize_t, can be zero
1785 //
1786 // If 'from' and/or 'to' are aligned on 4-byte boundaries, we let
1787 // the hardware handle it. The two dwords within qwords that span
1788 // cache line boundaries will still be loaded and stored atomicly.
1789 //
1790 address generate_conjoint_int_oop_copy(bool aligned, bool is_oop, const char *name) {
1791 __ align(CodeEntryAlignment);
1792 StubCodeMark mark(this, "StubRoutines", name);
1793 address start = __ pc();
1794
1795 Label L_copy_32_bytes, L_copy_8_bytes, L_copy_2_bytes, L_exit;
1796 const Register from = rdi; // source array address
1797 const Register to = rsi; // destination array address
1798 const Register count = rdx; // elements count
1799 const Register dword_count = rcx;
1800 const Register qword_count = count;
1801
1802 __ enter(); // required for proper stackwalking of RuntimeStub frame
1803 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1804
1805 if (is_oop) {
1806 // no registers are destroyed by this call
1807 gen_write_ref_array_pre_barrier(/* dest */ c_rarg1, /* count */ c_rarg2);
1808 }
1809
1810 (is_oop ? oop_copy_entry : int_copy_entry) = __ pc();
1811 BLOCK_COMMENT("Entry:");
1812 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1813
1814 array_overlap_test(is_oop ? disjoint_oop_copy_entry : disjoint_int_copy_entry,
1815 Address::times_4);
1816 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1817 // r9 and r10 may be used to save non-volatile registers
1818
1819 assert_clean_int(count, rax); // Make sure 'count' is clean int.
1820 // 'from', 'to' and 'count' are now valid
1821 __ movq(dword_count, count);
1822 __ shrq(count, 1); // count => qword_count
1823
1824 // Copy from high to low addresses. Use 'to' as scratch.
1825
1826 // Check for and copy trailing dword
1827 __ testq(dword_count, 1);
1828 __ jcc(Assembler::zero, L_copy_32_bytes);
1829 __ movl(rax, Address(from, dword_count, Address::times_4, -4));
1830 __ movl(Address(to, dword_count, Address::times_4, -4), rax);
1831 __ jmp(L_copy_32_bytes);
1832
1833 // Copy trailing qwords
1834 __ BIND(L_copy_8_bytes);
1835 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
1836 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
1837 __ decrementq(qword_count);
1838 __ jcc(Assembler::notZero, L_copy_8_bytes);
1839
1840 inc_counter_np(SharedRuntime::_jint_array_copy_ctr);
1841 if (is_oop) {
1842 __ jmp(L_exit);
1843 }
1844 restore_arg_regs();
1845 __ xorq(rax, rax); // return 0
1846 __ leave(); // required for proper stackwalking of RuntimeStub frame
1847 __ ret(0);
1848
1849 // Copy in 32-bytes chunks
1850 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1851
1852 inc_counter_np(SharedRuntime::_jint_array_copy_ctr);
1853 __ bind(L_exit);
1854 if (is_oop) {
1855 Register end_to = rdx;
1856 __ leaq(end_to, Address(to, dword_count, Address::times_4, -4));
1857 gen_write_ref_array_post_barrier(to, end_to, rax);
1858 }
1859 restore_arg_regs();
1860 __ xorq(rax, rax); // return 0
1861 __ leave(); // required for proper stackwalking of RuntimeStub frame
1862 __ ret(0);
1863
1864 return start;
1865 }
1866
1867 // Arguments:
1868 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
1869 // ignored
1870 // is_oop - true => oop array, so generate store check code
1871 // name - stub name string
1872 //
1873 // Inputs:
1874 // c_rarg0 - source array address
1875 // c_rarg1 - destination array address
1876 // c_rarg2 - element count, treated as ssize_t, can be zero
1877 //
1878 // Side Effects:
1879 // disjoint_oop_copy_entry or disjoint_long_copy_entry is set to the
1880 // no-overlap entry point used by generate_conjoint_long_oop_copy().
1881 //
1882 address generate_disjoint_long_oop_copy(bool aligned, bool is_oop, const char *name) {
1883 __ align(CodeEntryAlignment);
1884 StubCodeMark mark(this, "StubRoutines", name);
1885 address start = __ pc();
1886
1887 Label L_copy_32_bytes, L_copy_8_bytes, L_exit;
1888 const Register from = rdi; // source array address
1889 const Register to = rsi; // destination array address
1890 const Register qword_count = rdx; // elements count
1891 const Register end_from = from; // source array end address
1892 const Register end_to = rcx; // destination array end address
1893 const Register saved_to = to;
1894 // End pointers are inclusive, and if count is not zero they point
1895 // to the last unit copied: end_to[0] := end_from[0]
1896
1897 __ enter(); // required for proper stackwalking of RuntimeStub frame
1898 // Save no-overlap entry point for generate_conjoint_long_oop_copy()
1899 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1900
1901 if (is_oop) {
1902 disjoint_oop_copy_entry = __ pc();
1903 // no registers are destroyed by this call
1904 gen_write_ref_array_pre_barrier(/* dest */ c_rarg1, /* count */ c_rarg2);
1905 } else {
1906 disjoint_long_copy_entry = __ pc();
1907 }
1908 BLOCK_COMMENT("Entry:");
1909 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1910
1911 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1912 // r9 and r10 may be used to save non-volatile registers
1913
1914 // 'from', 'to' and 'qword_count' are now valid
1915
1916 // Copy from low to high addresses. Use 'to' as scratch.
1917 __ leaq(end_from, Address(from, qword_count, Address::times_8, -8));
1918 __ leaq(end_to, Address(to, qword_count, Address::times_8, -8));
1919 __ negq(qword_count);
1920 __ jmp(L_copy_32_bytes);
1921
1922 // Copy trailing qwords
1923 __ BIND(L_copy_8_bytes);
1924 __ movq(rax, Address(end_from, qword_count, Address::times_8, 8));
1925 __ movq(Address(end_to, qword_count, Address::times_8, 8), rax);
1926 __ incrementq(qword_count);
1927 __ jcc(Assembler::notZero, L_copy_8_bytes);
1928
1929 if (is_oop) {
1930 __ jmp(L_exit);
1931 } else {
1932 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr);
1933 restore_arg_regs();
1934 __ xorq(rax, rax); // return 0
1935 __ leave(); // required for proper stackwalking of RuntimeStub frame
1936 __ ret(0);
1937 }
1938
1939 // Copy 64-byte chunks
1940 copy_32_bytes_forward(end_from, end_to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
1941
1942 if (is_oop) {
1943 __ BIND(L_exit);
1944 gen_write_ref_array_post_barrier(saved_to, end_to, rax);
1945 inc_counter_np(SharedRuntime::_oop_array_copy_ctr);
1946 } else {
1947 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr);
1948 }
1949 restore_arg_regs();
1950 __ xorq(rax, rax); // return 0
1951 __ leave(); // required for proper stackwalking of RuntimeStub frame
1952 __ ret(0);
1953
1954 return start;
1955 }
1956
1957 // Arguments:
1958 // aligned - true => Input and output aligned on a HeapWord boundary == 8 bytes
1959 // ignored
1960 // is_oop - true => oop array, so generate store check code
1961 // name - stub name string
1962 //
1963 // Inputs:
1964 // c_rarg0 - source array address
1965 // c_rarg1 - destination array address
1966 // c_rarg2 - element count, treated as ssize_t, can be zero
1967 //
1968 address generate_conjoint_long_oop_copy(bool aligned, bool is_oop, const char *name) {
1969 __ align(CodeEntryAlignment);
1970 StubCodeMark mark(this, "StubRoutines", name);
1971 address start = __ pc();
1972
1973 Label L_copy_32_bytes, L_copy_8_bytes, L_exit;
1974 const Register from = rdi; // source array address
1975 const Register to = rsi; // destination array address
1976 const Register qword_count = rdx; // elements count
1977 const Register saved_count = rcx;
1978
1979 __ enter(); // required for proper stackwalking of RuntimeStub frame
1980 assert_clean_int(c_rarg2, rax); // Make sure 'count' is clean int.
1981
1982 address disjoint_copy_entry = NULL;
1983 if (is_oop) {
1984 assert(!UseCompressedOops, "shouldn't be called for compressed oops");
1985 disjoint_copy_entry = disjoint_oop_copy_entry;
1986 oop_copy_entry = __ pc();
1987 array_overlap_test(disjoint_oop_copy_entry, Address::times_8);
1988 } else {
1989 disjoint_copy_entry = disjoint_long_copy_entry;
1990 long_copy_entry = __ pc();
1991 array_overlap_test(disjoint_long_copy_entry, Address::times_8);
1992 }
1993 BLOCK_COMMENT("Entry:");
1994 // caller can pass a 64-bit byte count here (from Unsafe.copyMemory)
1995
1996 array_overlap_test(disjoint_copy_entry, Address::times_8);
1997 setup_arg_regs(); // from => rdi, to => rsi, count => rdx
1998 // r9 and r10 may be used to save non-volatile registers
1999
2000 // 'from', 'to' and 'qword_count' are now valid
2001
2002 if (is_oop) {
2003 // Save to and count for store barrier
2004 __ movq(saved_count, qword_count);
2005 // No registers are destroyed by this call
2006 gen_write_ref_array_pre_barrier(to, saved_count);
2007 }
2008
2009 __ jmp(L_copy_32_bytes);
2010
2011 // Copy trailing qwords
2012 __ BIND(L_copy_8_bytes);
2013 __ movq(rax, Address(from, qword_count, Address::times_8, -8));
2014 __ movq(Address(to, qword_count, Address::times_8, -8), rax);
2015 __ decrementq(qword_count);
2016 __ jcc(Assembler::notZero, L_copy_8_bytes);
2017
2018 if (is_oop) {
2019 __ jmp(L_exit);
2020 } else {
2021 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr);
2022 restore_arg_regs();
2023 __ xorq(rax, rax); // return 0
2024 __ leave(); // required for proper stackwalking of RuntimeStub frame
2025 __ ret(0);
2026 }
2027
2028 // Copy in 32-bytes chunks
2029 copy_32_bytes_backward(from, to, qword_count, rax, L_copy_32_bytes, L_copy_8_bytes);
2030
2031 if (is_oop) {
2032 __ BIND(L_exit);
2033 __ leaq(rcx, Address(to, saved_count, Address::times_8, -8));
2034 gen_write_ref_array_post_barrier(to, rcx, rax);
2035 inc_counter_np(SharedRuntime::_oop_array_copy_ctr);
2036 } else {
2037 inc_counter_np(SharedRuntime::_jlong_array_copy_ctr);
2038 }
2039 restore_arg_regs();
2040 __ xorq(rax, rax); // return 0
2041 __ leave(); // required for proper stackwalking of RuntimeStub frame
2042 __ ret(0);
2043
2044 return start;
2045 }
2046
2047
2048 // Helper for generating a dynamic type check.
2049 // Smashes no registers.
2050 void generate_type_check(Register sub_klass,
2051 Register super_check_offset,
2052 Register super_klass,
2053 Label& L_success) {
2054 assert_different_registers(sub_klass, super_check_offset, super_klass);
2055
2056 BLOCK_COMMENT("type_check:");
2057
2058 Label L_miss;
2059
2060 // a couple of useful fields in sub_klass:
2061 int ss_offset = (klassOopDesc::header_size() * HeapWordSize +
2062 Klass::secondary_supers_offset_in_bytes());
2063 int sc_offset = (klassOopDesc::header_size() * HeapWordSize +
2064 Klass::secondary_super_cache_offset_in_bytes());
2065 Address secondary_supers_addr(sub_klass, ss_offset);
2066 Address super_cache_addr( sub_klass, sc_offset);
2067
2068 // if the pointers are equal, we are done (e.g., String[] elements)
2069 __ cmpq(super_klass, sub_klass);
2070 __ jcc(Assembler::equal, L_success);
2071
2072 // check the supertype display:
2073 Address super_check_addr(sub_klass, super_check_offset, Address::times_1, 0);
2074 __ cmpq(super_klass, super_check_addr); // test the super type
2075 __ jcc(Assembler::equal, L_success);
2076
2077 // if it was a primary super, we can just fail immediately
2078 __ cmpl(super_check_offset, sc_offset);
2079 __ jcc(Assembler::notEqual, L_miss);
2080
2081 // Now do a linear scan of the secondary super-klass chain.
2082 // The repne_scan instruction uses fixed registers, which we must spill.
2083 // (We need a couple more temps in any case.)
2084 // This code is rarely used, so simplicity is a virtue here.
2085 inc_counter_np(SharedRuntime::_partial_subtype_ctr);
2086 {
2087 __ pushq(rax);
2088 __ pushq(rcx);
2089 __ pushq(rdi);
2090 assert_different_registers(sub_klass, super_klass, rax, rcx, rdi);
2091
2092 __ movq(rdi, secondary_supers_addr);
2093 // Load the array length.
2094 __ movl(rcx, Address(rdi, arrayOopDesc::length_offset_in_bytes()));
2095 // Skip to start of data.
2096 __ addq(rdi, arrayOopDesc::base_offset_in_bytes(T_OBJECT));
2097 // Scan rcx words at [rdi] for occurance of rax
2098 // Set NZ/Z based on last compare
2099 __ movq(rax, super_klass);
2100 if (UseCompressedOops) {
2101 // Compare against compressed form. Don't need to uncompress because
2102 // looks like orig rax is restored in popq below.
2103 __ encode_heap_oop(rax);
2104 __ repne_scanl();
2105 } else {
2106 __ repne_scanq();
2107 }
2108
2109 // Unspill the temp. registers:
2110 __ popq(rdi);
2111 __ popq(rcx);
2112 __ popq(rax);
2113
2114 __ jcc(Assembler::notEqual, L_miss);
2115 }
2116
2117 // Success. Cache the super we found and proceed in triumph.
2118 __ movq(super_cache_addr, super_klass); // note: rax is dead
2119 __ jmp(L_success);
2120
2121 // Fall through on failure!
2122 __ BIND(L_miss);
2123 }
2124
2125 //
2126 // Generate checkcasting array copy stub
2127 //
2128 // Input:
2129 // c_rarg0 - source array address
2130 // c_rarg1 - destination array address
2131 // c_rarg2 - element count, treated as ssize_t, can be zero
2132 // c_rarg3 - size_t ckoff (super_check_offset)
2133 // not Win64
2134 // c_rarg4 - oop ckval (super_klass)
2135 // Win64
2136 // rsp+40 - oop ckval (super_klass)
2137 //
2138 // Output:
2139 // rax == 0 - success
2140 // rax == -1^K - failure, where K is partial transfer count
2141 //
2142 address generate_checkcast_copy(const char *name) {
2143
2144 Label L_load_element, L_store_element, L_do_card_marks, L_done;
2145
2146 // Input registers (after setup_arg_regs)
2147 const Register from = rdi; // source array address
2148 const Register to = rsi; // destination array address
2149 const Register length = rdx; // elements count
2150 const Register ckoff = rcx; // super_check_offset
2151 const Register ckval = r8; // super_klass
2152
2153 // Registers used as temps (r13, r14 are save-on-entry)
2154 const Register end_from = from; // source array end address
2155 const Register end_to = r13; // destination array end address
2156 const Register count = rdx; // -(count_remaining)
2157 const Register r14_length = r14; // saved copy of length
2158 // End pointers are inclusive, and if length is not zero they point
2159 // to the last unit copied: end_to[0] := end_from[0]
2160
2161 const Register rax_oop = rax; // actual oop copied
2162 const Register r11_klass = r11; // oop._klass
2163
2164 //---------------------------------------------------------------
2165 // Assembler stub will be used for this call to arraycopy
2166 // if the two arrays are subtypes of Object[] but the
2167 // destination array type is not equal to or a supertype
2168 // of the source type. Each element must be separately
2169 // checked.
2170
2171 __ align(CodeEntryAlignment);
2172 StubCodeMark mark(this, "StubRoutines", name);
2173 address start = __ pc();
2174
2175 __ enter(); // required for proper stackwalking of RuntimeStub frame
2176
2177 checkcast_copy_entry = __ pc();
2178 BLOCK_COMMENT("Entry:");
2179
2180 #ifdef ASSERT
2181 // caller guarantees that the arrays really are different
2182 // otherwise, we would have to make conjoint checks
2183 { Label L;
2184 array_overlap_test(L, TIMES_OOP);
2185 __ stop("checkcast_copy within a single array");
2186 __ bind(L);
2187 }
2188 #endif //ASSERT
2189
2190 // allocate spill slots for r13, r14
2191 enum {
2192 saved_r13_offset,
2193 saved_r14_offset,
2194 saved_rbp_offset,
2195 saved_rip_offset,
2196 saved_rarg0_offset
2197 };
2198 __ subq(rsp, saved_rbp_offset * wordSize);
2199 __ movq(Address(rsp, saved_r13_offset * wordSize), r13);
2200 __ movq(Address(rsp, saved_r14_offset * wordSize), r14);
2201 setup_arg_regs(4); // from => rdi, to => rsi, length => rdx
2202 // ckoff => rcx, ckval => r8
2203 // r9 and r10 may be used to save non-volatile registers
2204 #ifdef _WIN64
2205 // last argument (#4) is on stack on Win64
2206 const int ckval_offset = saved_rarg0_offset + 4;
2207 __ movq(ckval, Address(rsp, ckval_offset * wordSize));
2208 #endif
2209
2210 // check that int operands are properly extended to size_t
2211 assert_clean_int(length, rax);
2212 assert_clean_int(ckoff, rax);
2213
2214 #ifdef ASSERT
2215 BLOCK_COMMENT("assert consistent ckoff/ckval");
2216 // The ckoff and ckval must be mutually consistent,
2217 // even though caller generates both.
2218 { Label L;
2219 int sco_offset = (klassOopDesc::header_size() * HeapWordSize +
2220 Klass::super_check_offset_offset_in_bytes());
2221 __ cmpl(ckoff, Address(ckval, sco_offset));
2222 __ jcc(Assembler::equal, L);
2223 __ stop("super_check_offset inconsistent");
2224 __ bind(L);
2225 }
2226 #endif //ASSERT
2227
2228 // Loop-invariant addresses. They are exclusive end pointers.
2229 Address end_from_addr(from, length, TIMES_OOP, 0);
2230 Address end_to_addr(to, length, TIMES_OOP, 0);
2231 // Loop-variant addresses. They assume post-incremented count < 0.
2232 Address from_element_addr(end_from, count, TIMES_OOP, 0);
2233 Address to_element_addr(end_to, count, TIMES_OOP, 0);
2234
2235 gen_write_ref_array_pre_barrier(to, count);
2236
2237 // Copy from low to high addresses, indexed from the end of each array.
2238 __ leaq(end_from, end_from_addr);
2239 __ leaq(end_to, end_to_addr);
2240 __ movq(r14_length, length); // save a copy of the length
2241 assert(length == count, ""); // else fix next line:
2242 __ negq(count); // negate and test the length
2243 __ jcc(Assembler::notZero, L_load_element);
2244
2245 // Empty array: Nothing to do.
2246 __ xorq(rax, rax); // return 0 on (trivial) success
2247 __ jmp(L_done);
2248
2249 // ======== begin loop ========
2250 // (Loop is rotated; its entry is L_load_element.)
2251 // Loop control:
2252 // for (count = -count; count != 0; count++)
2253 // Base pointers src, dst are biased by 8*(count-1),to last element.
2254 __ align(16);
2255
2256 __ BIND(L_store_element);
2257 __ store_heap_oop(to_element_addr, rax_oop); // store the oop
2258 __ incrementq(count); // increment the count toward zero
2259 __ jcc(Assembler::zero, L_do_card_marks);
2260
2261 // ======== loop entry is here ========
2262 __ BIND(L_load_element);
2263 __ load_heap_oop(rax_oop, from_element_addr); // load the oop
2264 __ testq(rax_oop, rax_oop);
2265 __ jcc(Assembler::zero, L_store_element);
2266
2267 __ load_klass(r11_klass, rax_oop);// query the object klass
2268 generate_type_check(r11_klass, ckoff, ckval, L_store_element);
2269 // ======== end loop ========
2270
2271 // It was a real error; we must depend on the caller to finish the job.
2272 // Register rdx = -1 * number of *remaining* oops, r14 = *total* oops.
2273 // Emit GC store barriers for the oops we have copied (r14 + rdx),
2274 // and report their number to the caller.
2275 assert_different_registers(rax, r14_length, count, to, end_to, rcx);
2276 __ leaq(end_to, to_element_addr);
2277 gen_write_ref_array_post_barrier(to, end_to, rcx);
2278 __ movq(rax, r14_length); // original oops
2279 __ addq(rax, count); // K = (original - remaining) oops
2280 __ notq(rax); // report (-1^K) to caller
2281 __ jmp(L_done);
2282
2283 // Come here on success only.
2284 __ BIND(L_do_card_marks);
2285 __ addq(end_to, -wordSize); // make an inclusive end pointer
2286 gen_write_ref_array_post_barrier(to, end_to, rcx);
2287 __ xorq(rax, rax); // return 0 on success
2288
2289 // Common exit point (success or failure).
2290 __ BIND(L_done);
2291 __ movq(r13, Address(rsp, saved_r13_offset * wordSize));
2292 __ movq(r14, Address(rsp, saved_r14_offset * wordSize));
2293 inc_counter_np(SharedRuntime::_checkcast_array_copy_ctr);
2294 restore_arg_regs();
2295 __ leave(); // required for proper stackwalking of RuntimeStub frame
2296 __ ret(0);
2297
2298 return start;
2299 }
2300
2301 //
2302 // Generate 'unsafe' array copy stub
2303 // Though just as safe as the other stubs, it takes an unscaled
2304 // size_t argument instead of an element count.
2305 //
2306 // Input:
2307 // c_rarg0 - source array address
2308 // c_rarg1 - destination array address
2309 // c_rarg2 - byte count, treated as ssize_t, can be zero
2310 //
2311 // Examines the alignment of the operands and dispatches
2312 // to a long, int, short, or byte copy loop.
2313 //
2314 address generate_unsafe_copy(const char *name) {
2315
2316 Label L_long_aligned, L_int_aligned, L_short_aligned;
2317
2318 // Input registers (before setup_arg_regs)
2319 const Register from = c_rarg0; // source array address
2320 const Register to = c_rarg1; // destination array address
2321 const Register size = c_rarg2; // byte count (size_t)
2322
2323 // Register used as a temp
2324 const Register bits = rax; // test copy of low bits
2325
2326 __ align(CodeEntryAlignment);
2327 StubCodeMark mark(this, "StubRoutines", name);
2328 address start = __ pc();
2329
2330 __ enter(); // required for proper stackwalking of RuntimeStub frame
2331
2332 checkcast_copy_entry = __ pc();
2333 BLOCK_COMMENT("Entry:");
2334
2335 // bump this on entry, not on exit:
2336 inc_counter_np(SharedRuntime::_unsafe_array_copy_ctr);
2337
2338 __ movq(bits, from);
2339 __ orq(bits, to);
2340 __ orq(bits, size);
2341
2342 __ testb(bits, BytesPerLong-1);
2343 __ jccb(Assembler::zero, L_long_aligned);
2344
2345 __ testb(bits, BytesPerInt-1);
2346 __ jccb(Assembler::zero, L_int_aligned);
2347
2348 __ testb(bits, BytesPerShort-1);
2349 __ jump_cc(Assembler::notZero, RuntimeAddress(byte_copy_entry));
2350
2351 __ BIND(L_short_aligned);
2352 __ shrq(size, LogBytesPerShort); // size => short_count
2353 __ jump(RuntimeAddress(short_copy_entry));
2354
2355 __ BIND(L_int_aligned);
2356 __ shrq(size, LogBytesPerInt); // size => int_count
2357 __ jump(RuntimeAddress(int_copy_entry));
2358
2359 __ BIND(L_long_aligned);
2360 __ shrq(size, LogBytesPerLong); // size => qword_count
2361 __ jump(RuntimeAddress(long_copy_entry));
2362
2363 return start;
2364 }
2365
2366 // Perform range checks on the proposed arraycopy.
2367 // Kills temp, but nothing else.
2368 // Also, clean the sign bits of src_pos and dst_pos.
2369 void arraycopy_range_checks(Register src, // source array oop (c_rarg0)
2370 Register src_pos, // source position (c_rarg1)
2371 Register dst, // destination array oo (c_rarg2)
2372 Register dst_pos, // destination position (c_rarg3)
2373 Register length,
2374 Register temp,
2375 Label& L_failed) {
2376 BLOCK_COMMENT("arraycopy_range_checks:");
2377
2378 // if (src_pos + length > arrayOop(src)->length()) FAIL;
2379 __ movl(temp, length);
2380 __ addl(temp, src_pos); // src_pos + length
2381 __ cmpl(temp, Address(src, arrayOopDesc::length_offset_in_bytes()));
2382 __ jcc(Assembler::above, L_failed);
2383
2384 // if (dst_pos + length > arrayOop(dst)->length()) FAIL;
2385 __ movl(temp, length);
2386 __ addl(temp, dst_pos); // dst_pos + length
2387 __ cmpl(temp, Address(dst, arrayOopDesc::length_offset_in_bytes()));
2388 __ jcc(Assembler::above, L_failed);
2389
2390 // Have to clean up high 32-bits of 'src_pos' and 'dst_pos'.
2391 // Move with sign extension can be used since they are positive.
2392 __ movslq(src_pos, src_pos);
2393 __ movslq(dst_pos, dst_pos);
2394
2395 BLOCK_COMMENT("arraycopy_range_checks done");
2396 }
2397
2398 //
2399 // Generate generic array copy stubs
2400 //
2401 // Input:
2402 // c_rarg0 - src oop
2403 // c_rarg1 - src_pos (32-bits)
2404 // c_rarg2 - dst oop
2405 // c_rarg3 - dst_pos (32-bits)
2406 // not Win64
2407 // c_rarg4 - element count (32-bits)
2408 // Win64
2409 // rsp+40 - element count (32-bits)
2410 //
2411 // Output:
2412 // rax == 0 - success
2413 // rax == -1^K - failure, where K is partial transfer count
2414 //
2415 address generate_generic_copy(const char *name) {
2416
2417 Label L_failed, L_failed_0, L_objArray;
2418 Label L_copy_bytes, L_copy_shorts, L_copy_ints, L_copy_longs;
2419
2420 // Input registers
2421 const Register src = c_rarg0; // source array oop
2422 const Register src_pos = c_rarg1; // source position
2423 const Register dst = c_rarg2; // destination array oop
2424 const Register dst_pos = c_rarg3; // destination position
2425 // elements count is on stack on Win64
2426 #ifdef _WIN64
2427 #define C_RARG4 Address(rsp, 6 * wordSize)
2428 #else
2429 #define C_RARG4 c_rarg4
2430 #endif
2431
2432 { int modulus = CodeEntryAlignment;
2433 int target = modulus - 5; // 5 = sizeof jmp(L_failed)
2434 int advance = target - (__ offset() % modulus);
2435 if (advance < 0) advance += modulus;
2436 if (advance > 0) __ nop(advance);
2437 }
2438 StubCodeMark mark(this, "StubRoutines", name);
2439
2440 // Short-hop target to L_failed. Makes for denser prologue code.
2441 __ BIND(L_failed_0);
2442 __ jmp(L_failed);
2443 assert(__ offset() % CodeEntryAlignment == 0, "no further alignment needed");
2444
2445 __ align(CodeEntryAlignment);
2446 address start = __ pc();
2447
2448 __ enter(); // required for proper stackwalking of RuntimeStub frame
2449
2450 // bump this on entry, not on exit:
2451 inc_counter_np(SharedRuntime::_generic_array_copy_ctr);
2452
2453 //-----------------------------------------------------------------------
2454 // Assembler stub will be used for this call to arraycopy
2455 // if the following conditions are met:
2456 //
2457 // (1) src and dst must not be null.
2458 // (2) src_pos must not be negative.
2459 // (3) dst_pos must not be negative.
2460 // (4) length must not be negative.
2461 // (5) src klass and dst klass should be the same and not NULL.
2462 // (6) src and dst should be arrays.
2463 // (7) src_pos + length must not exceed length of src.
2464 // (8) dst_pos + length must not exceed length of dst.
2465 //
2466
2467 // if (src == NULL) return -1;
2468 __ testq(src, src); // src oop
2469 size_t j1off = __ offset();
2470 __ jccb(Assembler::zero, L_failed_0);
2471
2472 // if (src_pos < 0) return -1;
2473 __ testl(src_pos, src_pos); // src_pos (32-bits)
2474 __ jccb(Assembler::negative, L_failed_0);
2475
2476 // if (dst == NULL) return -1;
2477 __ testq(dst, dst); // dst oop
2478 __ jccb(Assembler::zero, L_failed_0);
2479
2480 // if (dst_pos < 0) return -1;
2481 __ testl(dst_pos, dst_pos); // dst_pos (32-bits)
2482 size_t j4off = __ offset();
2483 __ jccb(Assembler::negative, L_failed_0);
2484
2485 // The first four tests are very dense code,
2486 // but not quite dense enough to put four
2487 // jumps in a 16-byte instruction fetch buffer.
2488 // That's good, because some branch predicters
2489 // do not like jumps so close together.
2490 // Make sure of this.
2491 guarantee(((j1off ^ j4off) & ~15) != 0, "I$ line of 1st & 4th jumps");
2492
2493 // registers used as temp
2494 const Register r11_length = r11; // elements count to copy
2495 const Register r10_src_klass = r10; // array klass
2496 const Register r9_dst_klass = r9; // dest array klass
2497
2498 // if (length < 0) return -1;
2499 __ movl(r11_length, C_RARG4); // length (elements count, 32-bits value)
2500 __ testl(r11_length, r11_length);
2501 __ jccb(Assembler::negative, L_failed_0);
2502
2503 __ load_klass(r10_src_klass, src);
2504 #ifdef ASSERT
2505 // assert(src->klass() != NULL);
2506 BLOCK_COMMENT("assert klasses not null");
2507 { Label L1, L2;
2508 __ testq(r10_src_klass, r10_src_klass);
2509 __ jcc(Assembler::notZero, L2); // it is broken if klass is NULL
2510 __ bind(L1);
2511 __ stop("broken null klass");
2512 __ bind(L2);
2513 __ load_klass(r9_dst_klass, dst);
2514 __ cmpq(r9_dst_klass, 0);
2515 __ jcc(Assembler::equal, L1); // this would be broken also
2516 BLOCK_COMMENT("assert done");
2517 }
2518 #endif
2519
2520 // Load layout helper (32-bits)
2521 //
2522 // | array_tag | element_type | log2_element_size | header_size |
2523 // 32 28 24 16 0
2524 //
2525 // array_tag: typeArray = 0xF, objArray = 0xD, normal instance = 0x0
2526 //
2527
2528 int lh_offset = klassOopDesc::header_size() * HeapWordSize +
2529 Klass::layout_helper_offset_in_bytes();
2530
2531 const Register rax_lh = rax; // layout helper
2532
2533 __ movl(rax_lh, Address(r10_src_klass, lh_offset));
2534
2535 // Handle objArrays completely differently...
2536 // This is necessary because they have covariant element types.
2537 // The next type check (for src.klass == dst.klass), can get a
2538 // false negative in the case of object arrays.
2539 jint objArray_lh = LayoutHelper::for_array(T_OBJECT).as_int();
2540 __ cmpl(rax_lh, objArray_lh);
2541 __ jcc(Assembler::equal, L_objArray);
2542
2543 // if (src->klass() != dst->klass()) return -1;
2544 __ load_klass(r9_dst_klass, dst);
2545 __ cmpq(r10_src_klass, r9_dst_klass);
2546 __ jcc(Assembler::notEqual, L_failed);
2547
2548 // if (!src->has_length_field()) return -1;
2549 __ cmpl(rax_lh, LayoutHelper::_neutral_value);
2550 __ jcc(Assembler::greaterEqual, L_failed);
2551
2552 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2553 r10, L_failed);
2554
2555 // typeArrayKlass
2556 //
2557 // src_addr = (src + array_header_in_bytes()) + (src_pos << log2elemsize);
2558 // dst_addr = (dst + array_header_in_bytes()) + (dst_pos << log2elemsize);
2559 //
2560
2561 const Register r10_offset = r10; // array offset
2562 const Register rax_elsize = rax_lh; // element size
2563
2564 __ movl(r10_offset, rax_lh);
2565 assert(LayoutHelper::_header_size_shift == 0, "");
2566 __ andl(r10_offset, LayoutHelper::_header_size_mask); // array_offset
2567 __ addq(src, r10_offset); // src array offset
2568 __ addq(dst, r10_offset); // dst array offset
2569 BLOCK_COMMENT("choose copy loop based on element size");
2570 __ shrl(rax_lh, LayoutHelper::_element_size_shift);
2571 __ andl(rax_lh, LayoutHelper::_element_size_mask); // rax_lh -> rax_elsize
2572
2573 // next registers should be set before the jump to corresponding stub
2574 const Register from = c_rarg0; // source array address
2575 const Register to = c_rarg1; // destination array address
2576 const Register count = c_rarg2; // elements count
2577
2578 // 'from', 'to', 'count' registers should be set in such order
2579 // since they are the same as 'src', 'src_pos', 'dst'.
2580
2581 __ BIND(L_copy_bytes);
2582 __ cmpl(rax_elsize, 0);
2583 __ jccb(Assembler::notEqual, L_copy_shorts);
2584 __ leaq(from, Address(src, src_pos, Address::times_1, 0));// src_addr
2585 __ leaq(to, Address(dst, dst_pos, Address::times_1, 0));// dst_addr
2586 __ movslq(count, r11_length); // length
2587 __ jump(RuntimeAddress(byte_copy_entry));
2588
2589 __ BIND(L_copy_shorts);
2590 __ cmpl(rax_elsize, LogBytesPerShort);
2591 __ jccb(Assembler::notEqual, L_copy_ints);
2592 __ leaq(from, Address(src, src_pos, Address::times_2, 0));// src_addr
2593 __ leaq(to, Address(dst, dst_pos, Address::times_2, 0));// dst_addr
2594 __ movslq(count, r11_length); // length
2595 __ jump(RuntimeAddress(short_copy_entry));
2596
2597 __ BIND(L_copy_ints);
2598 __ cmpl(rax_elsize, LogBytesPerInt);
2599 __ jccb(Assembler::notEqual, L_copy_longs);
2600 __ leaq(from, Address(src, src_pos, Address::times_4, 0));// src_addr
2601 __ leaq(to, Address(dst, dst_pos, Address::times_4, 0));// dst_addr
2602 __ movslq(count, r11_length); // length
2603 __ jump(RuntimeAddress(int_copy_entry));
2604
2605 __ BIND(L_copy_longs);
2606 #ifdef ASSERT
2607 { Label L;
2608 __ cmpl(rax_elsize, LogBytesPerLong);
2609 __ jcc(Assembler::equal, L);
2610 __ stop("must be long copy, but elsize is wrong");
2611 __ bind(L);
2612 }
2613 #endif
2614 __ leaq(from, Address(src, src_pos, Address::times_8, 0));// src_addr
2615 __ leaq(to, Address(dst, dst_pos, Address::times_8, 0));// dst_addr
2616 __ movslq(count, r11_length); // length
2617 __ jump(RuntimeAddress(long_copy_entry));
2618
2619 Label L_different_objArray, L_plain_copy, L_checkcast_copy;
2620
2621 // objArrayKlass
2622 __ BIND(L_objArray);
2623 // live at this point: r10_src_klass, src[_pos], dst[_pos]
2624
2625 // test array classes for subtyping
2626 __ load_klass(r9_dst_klass, dst);
2627 __ cmpq(r10_src_klass, r9_dst_klass); // usual case is exact equality
2628 __ jcc(Assembler::notEqual, L_different_objArray);
2629
2630 // Identically typed arrays can be copied without element-wise checks.
2631 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2632 r10, L_failed);
2633
2634 __ leaq(from, Address(src, src_pos, TIMES_OOP,
2635 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // src_addr
2636 __ leaq(to, Address(dst, dst_pos, TIMES_OOP,
2637 arrayOopDesc::base_offset_in_bytes(T_OBJECT))); // dst_addr
2638 __ movslq(count, r11_length); // length
2639 __ BIND(L_plain_copy);
2640 __ jump(RuntimeAddress(oop_copy_entry));
2641
2642 __ BIND(L_different_objArray);
2643 // live at this point: r10_src_klass, !r11_length
2644 {
2645 // assert(r11_length == C_RARG4); // will reload from here
2646 Register r11_dst_klass = r11;
2647 __ load_klass(r11_dst_klass, dst);
2648
2649 // Before looking at dst.length, make sure dst is also an objArray.
2650 __ cmpl(Address(r11_dst_klass, lh_offset), objArray_lh);
2651 __ jcc(Assembler::notEqual, L_failed);
2652
2653 // It is safe to examine both src.length and dst.length.
2654 #ifndef _WIN64
2655 arraycopy_range_checks(src, src_pos, dst, dst_pos, C_RARG4,
2656 rax, L_failed);
2657 #else
2658 __ movl(r11_length, C_RARG4); // reload
2659 arraycopy_range_checks(src, src_pos, dst, dst_pos, r11_length,
2660 rax, L_failed);
2661 __ load_klass(r11_dst_klass, dst); // reload
2662 #endif
2663
2664 // Marshal the base address arguments now, freeing registers.
2665 __ leaq(from, Address(src, src_pos, TIMES_OOP,
2666 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2667 __ leaq(to, Address(dst, dst_pos, TIMES_OOP,
2668 arrayOopDesc::base_offset_in_bytes(T_OBJECT)));
2669 __ movl(count, C_RARG4); // length (reloaded)
2670 Register sco_temp = c_rarg3; // this register is free now
2671 assert_different_registers(from, to, count, sco_temp,
2672 r11_dst_klass, r10_src_klass);
2673 assert_clean_int(count, sco_temp);
2674
2675 // Generate the type check.
2676 int sco_offset = (klassOopDesc::header_size() * HeapWordSize +
2677 Klass::super_check_offset_offset_in_bytes());
2678 __ movl(sco_temp, Address(r11_dst_klass, sco_offset));
2679 assert_clean_int(sco_temp, rax);
2680 generate_type_check(r10_src_klass, sco_temp, r11_dst_klass, L_plain_copy);
2681
2682 // Fetch destination element klass from the objArrayKlass header.
2683 int ek_offset = (klassOopDesc::header_size() * HeapWordSize +
2684 objArrayKlass::element_klass_offset_in_bytes());
2685 __ movq(r11_dst_klass, Address(r11_dst_klass, ek_offset));
2686 __ movl(sco_temp, Address(r11_dst_klass, sco_offset));
2687 assert_clean_int(sco_temp, rax);
2688
2689 // the checkcast_copy loop needs two extra arguments:
2690 assert(c_rarg3 == sco_temp, "#3 already in place");
2691 __ movq(C_RARG4, r11_dst_klass); // dst.klass.element_klass
2692 __ jump(RuntimeAddress(checkcast_copy_entry));
2693 }
2694
2695 __ BIND(L_failed);
2696 __ xorq(rax, rax);
2697 __ notq(rax); // return -1
2698 __ leave(); // required for proper stackwalking of RuntimeStub frame
2699 __ ret(0);
2700
2701 return start;
2702 }
2703
2704 #undef length_arg
2705
2706 void generate_arraycopy_stubs() {
2707 // Call the conjoint generation methods immediately after
2708 // the disjoint ones so that short branches from the former
2709 // to the latter can be generated.
2710 StubRoutines::_jbyte_disjoint_arraycopy = generate_disjoint_byte_copy(false, "jbyte_disjoint_arraycopy");
2711 StubRoutines::_jbyte_arraycopy = generate_conjoint_byte_copy(false, "jbyte_arraycopy");
2712
2713 StubRoutines::_jshort_disjoint_arraycopy = generate_disjoint_short_copy(false, "jshort_disjoint_arraycopy");
2714 StubRoutines::_jshort_arraycopy = generate_conjoint_short_copy(false, "jshort_arraycopy");
2715
2716 StubRoutines::_jint_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, false, "jint_disjoint_arraycopy");
2717 StubRoutines::_jint_arraycopy = generate_conjoint_int_oop_copy(false, false, "jint_arraycopy");
2718
2719 StubRoutines::_jlong_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, false, "jlong_disjoint_arraycopy");
2720 StubRoutines::_jlong_arraycopy = generate_conjoint_long_oop_copy(false, false, "jlong_arraycopy");
2721
2722
2723 if (UseCompressedOops) {
2724 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_int_oop_copy(false, true, "oop_disjoint_arraycopy");
2725 StubRoutines::_oop_arraycopy = generate_conjoint_int_oop_copy(false, true, "oop_arraycopy");
2726 } else {
2727 StubRoutines::_oop_disjoint_arraycopy = generate_disjoint_long_oop_copy(false, true, "oop_disjoint_arraycopy");
2728 StubRoutines::_oop_arraycopy = generate_conjoint_long_oop_copy(false, true, "oop_arraycopy");
2729 }
2730
2731 StubRoutines::_checkcast_arraycopy = generate_checkcast_copy("checkcast_arraycopy");
2732 StubRoutines::_unsafe_arraycopy = generate_unsafe_copy("unsafe_arraycopy");
2733 StubRoutines::_generic_arraycopy = generate_generic_copy("generic_arraycopy");
2734
2735 // We don't generate specialized code for HeapWord-aligned source
2736 // arrays, so just use the code we've already generated
2737 StubRoutines::_arrayof_jbyte_disjoint_arraycopy = StubRoutines::_jbyte_disjoint_arraycopy;
2738 StubRoutines::_arrayof_jbyte_arraycopy = StubRoutines::_jbyte_arraycopy;
2739
2740 StubRoutines::_arrayof_jshort_disjoint_arraycopy = StubRoutines::_jshort_disjoint_arraycopy;
2741 StubRoutines::_arrayof_jshort_arraycopy = StubRoutines::_jshort_arraycopy;
2742
2743 StubRoutines::_arrayof_jint_disjoint_arraycopy = StubRoutines::_jint_disjoint_arraycopy;
2744 StubRoutines::_arrayof_jint_arraycopy = StubRoutines::_jint_arraycopy;
2745
2746 StubRoutines::_arrayof_jlong_disjoint_arraycopy = StubRoutines::_jlong_disjoint_arraycopy;
2747 StubRoutines::_arrayof_jlong_arraycopy = StubRoutines::_jlong_arraycopy;
2748
2749 StubRoutines::_arrayof_oop_disjoint_arraycopy = StubRoutines::_oop_disjoint_arraycopy;
2750 StubRoutines::_arrayof_oop_arraycopy = StubRoutines::_oop_arraycopy;
2751 }
2752
2753 #undef __
2754 #define __ masm->
2755
2756 // Continuation point for throwing of implicit exceptions that are
2757 // not handled in the current activation. Fabricates an exception
2758 // oop and initiates normal exception dispatching in this
2759 // frame. Since we need to preserve callee-saved values (currently
2760 // only for C2, but done for C1 as well) we need a callee-saved oop
2761 // map and therefore have to make these stubs into RuntimeStubs
2762 // rather than BufferBlobs. If the compiler needs all registers to
2763 // be preserved between the fault point and the exception handler
2764 // then it must assume responsibility for that in
2765 // AbstractCompiler::continuation_for_implicit_null_exception or
2766 // continuation_for_implicit_division_by_zero_exception. All other
2767 // implicit exceptions (e.g., NullPointerException or
2768 // AbstractMethodError on entry) are either at call sites or
2769 // otherwise assume that stack unwinding will be initiated, so
2770 // caller saved registers were assumed volatile in the compiler.
2771 address generate_throw_exception(const char* name,
2772 address runtime_entry,
2773 bool restore_saved_exception_pc) {
2774 // Information about frame layout at time of blocking runtime call.
2775 // Note that we only have to preserve callee-saved registers since
2776 // the compilers are responsible for supplying a continuation point
2777 // if they expect all registers to be preserved.
2778 enum layout {
2779 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
2780 rbp_off2,
2781 return_off,
2782 return_off2,
2783 framesize // inclusive of return address
2784 };
2785
2786 int insts_size = 512;
2787 int locs_size = 64;
2788
2789 CodeBuffer code(name, insts_size, locs_size);
2790 OopMapSet* oop_maps = new OopMapSet();
2791 MacroAssembler* masm = new MacroAssembler(&code);
2792
2793 address start = __ pc();
2794
2795 // This is an inlined and slightly modified version of call_VM
2796 // which has the ability to fetch the return PC out of
2797 // thread-local storage and also sets up last_Java_sp slightly
2798 // differently than the real call_VM
2799 if (restore_saved_exception_pc) {
2800 __ movq(rax,
2801 Address(r15_thread,
2802 in_bytes(JavaThread::saved_exception_pc_offset())));
2803 __ pushq(rax);
2804 }
2805
2806 __ enter(); // required for proper stackwalking of RuntimeStub frame
2807
2808 assert(is_even(framesize/2), "sp not 16-byte aligned");
2809
2810 // return address and rbp are already in place
2811 __ subq(rsp, (framesize-4) << LogBytesPerInt); // prolog
2812
2813 int frame_complete = __ pc() - start;
2814
2815 // Set up last_Java_sp and last_Java_fp
2816 __ set_last_Java_frame(rsp, rbp, NULL);
2817
2818 // Call runtime
2819 __ movq(c_rarg0, r15_thread);
2820 BLOCK_COMMENT("call runtime_entry");
2821 __ call(RuntimeAddress(runtime_entry));
2822
2823 // Generate oop map
2824 OopMap* map = new OopMap(framesize, 0);
2825
2826 oop_maps->add_gc_map(__ pc() - start, map);
2827
2828 __ reset_last_Java_frame(true, false);
2829
2830 __ leave(); // required for proper stackwalking of RuntimeStub frame
2831
2832 // check for pending exceptions
2833 #ifdef ASSERT
2834 Label L;
2835 __ cmpq(Address(r15_thread, Thread::pending_exception_offset()),
2836 (int) NULL);
2837 __ jcc(Assembler::notEqual, L);
2838 __ should_not_reach_here();
2839 __ bind(L);
2840 #endif // ASSERT
2841 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2842
2843
2844 // codeBlob framesize is in words (not VMRegImpl::slot_size)
2845 RuntimeStub* stub =
2846 RuntimeStub::new_runtime_stub(name,
2847 &code,
2848 frame_complete,
2849 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
2850 oop_maps, false);
2851 return stub->entry_point();
2852 }
2853
2854 // Initialization
2855 void generate_initial() {
2856 // Generates all stubs and initializes the entry points
2857
2858 // This platform-specific stub is needed by generate_call_stub()
2859 StubRoutines::amd64::_mxcsr_std = generate_fp_mask("mxcsr_std", 0x0000000000001F80);
2860
2861 // entry points that exist in all platforms Note: This is code
2862 // that could be shared among different platforms - however the
2863 // benefit seems to be smaller than the disadvantage of having a
2864 // much more complicated generator structure. See also comment in
2865 // stubRoutines.hpp.
2866
2867 StubRoutines::_forward_exception_entry = generate_forward_exception();
2868
2869 StubRoutines::_call_stub_entry =
2870 generate_call_stub(StubRoutines::_call_stub_return_address);
2871
2872 // is referenced by megamorphic call
2873 StubRoutines::_catch_exception_entry = generate_catch_exception();
2874
2875 // atomic calls
2876 StubRoutines::_atomic_xchg_entry = generate_atomic_xchg();
2877 StubRoutines::_atomic_xchg_ptr_entry = generate_atomic_xchg_ptr();
2878 StubRoutines::_atomic_cmpxchg_entry = generate_atomic_cmpxchg();
2879 StubRoutines::_atomic_cmpxchg_long_entry = generate_atomic_cmpxchg_long();
2880 StubRoutines::_atomic_add_entry = generate_atomic_add();
2881 StubRoutines::_atomic_add_ptr_entry = generate_atomic_add_ptr();
2882 StubRoutines::_fence_entry = generate_orderaccess_fence();
2883
2884 StubRoutines::_handler_for_unsafe_access_entry =
2885 generate_handler_for_unsafe_access();
2886
2887 // platform dependent
2888 StubRoutines::amd64::_get_previous_fp_entry = generate_get_previous_fp();
2889
2890 StubRoutines::amd64::_verify_mxcsr_entry = generate_verify_mxcsr();
2891 }
2892
2893 void generate_all() {
2894 // Generates all stubs and initializes the entry points
2895
2896 // These entry points require SharedInfo::stack0 to be set up in
2897 // non-core builds and need to be relocatable, so they each
2898 // fabricate a RuntimeStub internally.
2899 StubRoutines::_throw_AbstractMethodError_entry =
2900 generate_throw_exception("AbstractMethodError throw_exception",
2901 CAST_FROM_FN_PTR(address,
2902 SharedRuntime::
2903 throw_AbstractMethodError),
2904 false);
2905
2906 StubRoutines::_throw_IncompatibleClassChangeError_entry =
2907 generate_throw_exception("IncompatibleClassChangeError throw_exception",
2908 CAST_FROM_FN_PTR(address,
2909 SharedRuntime::
2910 throw_IncompatibleClassChangeError),
2911 false);
2912
2913 StubRoutines::_throw_ArithmeticException_entry =
2914 generate_throw_exception("ArithmeticException throw_exception",
2915 CAST_FROM_FN_PTR(address,
2916 SharedRuntime::
2917 throw_ArithmeticException),
2918 true);
2919
2920 StubRoutines::_throw_NullPointerException_entry =
2921 generate_throw_exception("NullPointerException throw_exception",
2922 CAST_FROM_FN_PTR(address,
2923 SharedRuntime::
2924 throw_NullPointerException),
2925 true);
2926
2927 StubRoutines::_throw_NullPointerException_at_call_entry =
2928 generate_throw_exception("NullPointerException at call throw_exception",
2929 CAST_FROM_FN_PTR(address,
2930 SharedRuntime::
2931 throw_NullPointerException_at_call),
2932 false);
2933
2934 StubRoutines::_throw_StackOverflowError_entry =
2935 generate_throw_exception("StackOverflowError throw_exception",
2936 CAST_FROM_FN_PTR(address,
2937 SharedRuntime::
2938 throw_StackOverflowError),
2939 false);
2940
2941 // entry points that are platform specific
2942 StubRoutines::amd64::_f2i_fixup = generate_f2i_fixup();
2943 StubRoutines::amd64::_f2l_fixup = generate_f2l_fixup();
2944 StubRoutines::amd64::_d2i_fixup = generate_d2i_fixup();
2945 StubRoutines::amd64::_d2l_fixup = generate_d2l_fixup();
2946
2947 StubRoutines::amd64::_float_sign_mask = generate_fp_mask("float_sign_mask", 0x7FFFFFFF7FFFFFFF);
2948 StubRoutines::amd64::_float_sign_flip = generate_fp_mask("float_sign_flip", 0x8000000080000000);
2949 StubRoutines::amd64::_double_sign_mask = generate_fp_mask("double_sign_mask", 0x7FFFFFFFFFFFFFFF);
2950 StubRoutines::amd64::_double_sign_flip = generate_fp_mask("double_sign_flip", 0x8000000000000000);
2951
2952 // support for verify_oop (must happen after universe_init)
2953 StubRoutines::_verify_oop_subroutine_entry = generate_verify_oop();
2954
2955 // arraycopy stubs used by compilers
2956 generate_arraycopy_stubs();
2957 }
2958
2959 public:
2960 StubGenerator(CodeBuffer* code, bool all) : StubCodeGenerator(code) {
2961 if (all) {
2962 generate_all();
2963 } else {
2964 generate_initial();
2965 }
2966 }
2967 }; // end class declaration
2968
2969 address StubGenerator::disjoint_byte_copy_entry = NULL;
2970 address StubGenerator::disjoint_short_copy_entry = NULL;
2971 address StubGenerator::disjoint_int_copy_entry = NULL;
2972 address StubGenerator::disjoint_long_copy_entry = NULL;
2973 address StubGenerator::disjoint_oop_copy_entry = NULL;
2974
2975 address StubGenerator::byte_copy_entry = NULL;
2976 address StubGenerator::short_copy_entry = NULL;
2977 address StubGenerator::int_copy_entry = NULL;
2978 address StubGenerator::long_copy_entry = NULL;
2979 address StubGenerator::oop_copy_entry = NULL;
2980
2981 address StubGenerator::checkcast_copy_entry = NULL;
2982
2983 void StubGenerator_generate(CodeBuffer* code, bool all) {
2984 StubGenerator g(code, all);
2985 }