1 /*
2 * Copyright 1997-2008 Sun Microsystems, Inc. All Rights Reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
20 * CA 95054 USA or visit www.sun.com if you need additional information or
21 * have any questions.
22 *
23 */
24
25 #include "incls/_precompiled.incl"
26 #include "incls/_interp_masm_sparc.cpp.incl"
27
28 #ifndef CC_INTERP
29 #ifndef FAST_DISPATCH
30 #define FAST_DISPATCH 1
31 #endif
32 #undef FAST_DISPATCH
33
34 // Implementation of InterpreterMacroAssembler
35
36 // This file specializes the assember with interpreter-specific macros
37
38 const Address InterpreterMacroAssembler::l_tmp( FP, 0, (frame::interpreter_frame_l_scratch_fp_offset * wordSize ) + STACK_BIAS);
39 const Address InterpreterMacroAssembler::d_tmp( FP, 0, (frame::interpreter_frame_d_scratch_fp_offset * wordSize) + STACK_BIAS);
40
41 #else // CC_INTERP
42 #ifndef STATE
43 #define STATE(field_name) Lstate, in_bytes(byte_offset_of(BytecodeInterpreter, field_name))
44 #endif // STATE
45
46 #endif // CC_INTERP
47
48 void InterpreterMacroAssembler::compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta) {
49 // Note: this algorithm is also used by C1's OSR entry sequence.
50 // Any changes should also be applied to CodeEmitter::emit_osr_entry().
51 assert_different_registers(args_size, locals_size);
52 // max_locals*2 for TAGS. Assumes that args_size has already been adjusted.
53 if (TaggedStackInterpreter) sll(locals_size, 1, locals_size);
54 subcc(locals_size, args_size, delta);// extra space for non-arguments locals in words
55 // Use br/mov combination because it works on both V8 and V9 and is
56 // faster.
57 Label skip_move;
58 br(Assembler::negative, true, Assembler::pt, skip_move);
59 delayed()->mov(G0, delta);
60 bind(skip_move);
61 round_to(delta, WordsPerLong); // make multiple of 2 (SP must be 2-word aligned)
62 sll(delta, LogBytesPerWord, delta); // extra space for locals in bytes
63 }
64
65 #ifndef CC_INTERP
66
67 // Dispatch code executed in the prolog of a bytecode which does not do it's
68 // own dispatch. The dispatch address is computed and placed in IdispatchAddress
69 void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {
70 assert_not_delayed();
71 #ifdef FAST_DISPATCH
72 // FAST_DISPATCH and ProfileInterpreter are mutually exclusive since
73 // they both use I2.
74 assert(!ProfileInterpreter, "FAST_DISPATCH and +ProfileInterpreter are mutually exclusive");
75 ldub(Lbcp, bcp_incr, Lbyte_code); // load next bytecode
76 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
77 // add offset to correct dispatch table
78 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
79 ld_ptr(IdispatchTables, Lbyte_code, IdispatchAddress);// get entry addr
80 #else
81 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
82 // dispatch table to use
83 Address tbl(G3_scratch, (address)Interpreter::dispatch_table(state));
84
85 sethi(tbl);
86 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
87 add(tbl, tbl.base(), 0);
88 ld_ptr( G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
89 #endif
90 }
91
92
93 // Dispatch code executed in the epilog of a bytecode which does not do it's
94 // own dispatch. The dispatch address in IdispatchAddress is used for the
95 // dispatch.
96 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
97 assert_not_delayed();
98 verify_FPU(1, state);
99 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
100 jmp( IdispatchAddress, 0 );
101 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
102 else delayed()->nop();
103 }
104
105
106 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
107 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
108 assert_not_delayed();
109 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
110 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr);
111 }
112
113
114 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
115 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
116 assert_not_delayed();
117 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
118 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
119 }
120
121
122 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
123 // load current bytecode
124 assert_not_delayed();
125 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
126 dispatch_base(state, table);
127 }
128
129
130 void InterpreterMacroAssembler::call_VM_leaf_base(
131 Register java_thread,
132 address entry_point,
133 int number_of_arguments
134 ) {
135 if (!java_thread->is_valid())
136 java_thread = L7_thread_cache;
137 // super call
138 MacroAssembler::call_VM_leaf_base(java_thread, entry_point, number_of_arguments);
139 }
140
141
142 void InterpreterMacroAssembler::call_VM_base(
143 Register oop_result,
144 Register java_thread,
145 Register last_java_sp,
146 address entry_point,
147 int number_of_arguments,
148 bool check_exception
149 ) {
150 if (!java_thread->is_valid())
151 java_thread = L7_thread_cache;
152 // See class ThreadInVMfromInterpreter, which assumes that the interpreter
153 // takes responsibility for setting its own thread-state on call-out.
154 // However, ThreadInVMfromInterpreter resets the state to "in_Java".
155
156 //save_bcp(); // save bcp
157 MacroAssembler::call_VM_base(oop_result, java_thread, last_java_sp, entry_point, number_of_arguments, check_exception);
158 //restore_bcp(); // restore bcp
159 //restore_locals(); // restore locals pointer
160 }
161
162
163 void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg) {
164 if (JvmtiExport::can_pop_frame()) {
165 Label L;
166
167 // Check the "pending popframe condition" flag in the current thread
168 Address popframe_condition_addr(G2_thread, 0, in_bytes(JavaThread::popframe_condition_offset()));
169 ld(popframe_condition_addr, scratch_reg);
170
171 // Initiate popframe handling only if it is not already being processed. If the flag
172 // has the popframe_processing bit set, it means that this code is called *during* popframe
173 // handling - we don't want to reenter.
174 btst(JavaThread::popframe_pending_bit, scratch_reg);
175 br(zero, false, pt, L);
176 delayed()->nop();
177 btst(JavaThread::popframe_processing_bit, scratch_reg);
178 br(notZero, false, pt, L);
179 delayed()->nop();
180
181 // Call Interpreter::remove_activation_preserving_args_entry() to get the
182 // address of the same-named entrypoint in the generated interpreter code.
183 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry));
184
185 // Jump to Interpreter::_remove_activation_preserving_args_entry
186 jmpl(O0, G0, G0);
187 delayed()->nop();
188 bind(L);
189 }
190 }
191
192
193 void InterpreterMacroAssembler::load_earlyret_value(TosState state) {
194 Register thr_state = G4_scratch;
195 ld_ptr(Address(G2_thread, 0, in_bytes(JavaThread::jvmti_thread_state_offset())),
196 thr_state);
197 const Address tos_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_tos_offset()));
198 const Address oop_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_oop_offset()));
199 const Address val_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_value_offset()));
200 switch (state) {
201 case ltos: ld_long(val_addr, Otos_l); break;
202 case atos: ld_ptr(oop_addr, Otos_l);
203 st_ptr(G0, oop_addr); break;
204 case btos: // fall through
205 case ctos: // fall through
206 case stos: // fall through
207 case itos: ld(val_addr, Otos_l1); break;
208 case ftos: ldf(FloatRegisterImpl::S, val_addr, Ftos_f); break;
209 case dtos: ldf(FloatRegisterImpl::D, val_addr, Ftos_d); break;
210 case vtos: /* nothing to do */ break;
211 default : ShouldNotReachHere();
212 }
213 // Clean up tos value in the jvmti thread state
214 or3(G0, ilgl, G3_scratch);
215 stw(G3_scratch, tos_addr);
216 st_long(G0, val_addr);
217 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
218 }
219
220
221 void InterpreterMacroAssembler::check_and_handle_earlyret(Register scratch_reg) {
222 if (JvmtiExport::can_force_early_return()) {
223 Label L;
224 Register thr_state = G3_scratch;
225 ld_ptr(Address(G2_thread, 0, in_bytes(JavaThread::jvmti_thread_state_offset())),
226 thr_state);
227 tst(thr_state);
228 br(zero, false, pt, L); // if (thread->jvmti_thread_state() == NULL) exit;
229 delayed()->nop();
230
231 // Initiate earlyret handling only if it is not already being processed.
232 // If the flag has the earlyret_processing bit set, it means that this code
233 // is called *during* earlyret handling - we don't want to reenter.
234 ld(Address(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_state_offset())),
235 G4_scratch);
236 cmp(G4_scratch, JvmtiThreadState::earlyret_pending);
237 br(Assembler::notEqual, false, pt, L);
238 delayed()->nop();
239
240 // Call Interpreter::remove_activation_early_entry() to get the address of the
241 // same-named entrypoint in the generated interpreter code
242 Address tos_addr(thr_state, 0, in_bytes(JvmtiThreadState::earlyret_tos_offset()));
243 ld(tos_addr, Otos_l1);
244 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry), Otos_l1);
245
246 // Jump to Interpreter::_remove_activation_early_entry
247 jmpl(O0, G0, G0);
248 delayed()->nop();
249 bind(L);
250 }
251 }
252
253
254 void InterpreterMacroAssembler::super_call_VM_leaf(Register thread_cache, address entry_point, Register arg_1) {
255 mov(arg_1, O0);
256 MacroAssembler::call_VM_leaf_base(thread_cache, entry_point, 1);
257 }
258 #endif /* CC_INTERP */
259
260
261 #ifndef CC_INTERP
262
263 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
264 assert_not_delayed();
265 dispatch_Lbyte_code(state, table);
266 }
267
268
269 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
270 dispatch_base(state, Interpreter::normal_table(state));
271 }
272
273
274 void InterpreterMacroAssembler::dispatch_only(TosState state) {
275 dispatch_base(state, Interpreter::dispatch_table(state));
276 }
277
278
279 // common code to dispatch and dispatch_only
280 // dispatch value in Lbyte_code and increment Lbcp
281
282 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify) {
283 verify_FPU(1, state);
284 // %%%%% maybe implement +VerifyActivationFrameSize here
285 //verify_thread(); //too slow; we will just verify on method entry & exit
286 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
287 #ifdef FAST_DISPATCH
288 if (table == Interpreter::dispatch_table(state)) {
289 // use IdispatchTables
290 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
291 // add offset to correct dispatch table
292 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
293 ld_ptr(IdispatchTables, Lbyte_code, G3_scratch); // get entry addr
294 } else {
295 #endif
296 // dispatch table to use
297 Address tbl(G3_scratch, (address)table);
298
299 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
300 load_address(tbl); // compute addr of table
301 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
302 #ifdef FAST_DISPATCH
303 }
304 #endif
305 jmp( G3_scratch, 0 );
306 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
307 else delayed()->nop();
308 }
309
310
311 // Helpers for expression stack
312
313 // Longs and doubles are Category 2 computational types in the
314 // JVM specification (section 3.11.1) and take 2 expression stack or
315 // local slots.
316 // Aligning them on 32 bit with tagged stacks is hard because the code generated
317 // for the dup* bytecodes depends on what types are already on the stack.
318 // If the types are split into the two stack/local slots, that is much easier
319 // (and we can use 0 for non-reference tags).
320
321 // Known good alignment in _LP64 but unknown otherwise
322 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
323 assert_not_delayed();
324
325 #ifdef _LP64
326 ldf(FloatRegisterImpl::D, r1, offset, d);
327 #else
328 ldf(FloatRegisterImpl::S, r1, offset, d);
329 ldf(FloatRegisterImpl::S, r1, offset + Interpreter::stackElementSize(), d->successor());
330 #endif
331 }
332
333 // Known good alignment in _LP64 but unknown otherwise
334 void InterpreterMacroAssembler::store_unaligned_double(FloatRegister d, Register r1, int offset) {
335 assert_not_delayed();
336
337 #ifdef _LP64
338 stf(FloatRegisterImpl::D, d, r1, offset);
339 // store something more useful here
340 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize());)
341 #else
342 stf(FloatRegisterImpl::S, d, r1, offset);
343 stf(FloatRegisterImpl::S, d->successor(), r1, offset + Interpreter::stackElementSize());
344 #endif
345 }
346
347
348 // Known good alignment in _LP64 but unknown otherwise
349 void InterpreterMacroAssembler::load_unaligned_long(Register r1, int offset, Register rd) {
350 assert_not_delayed();
351 #ifdef _LP64
352 ldx(r1, offset, rd);
353 #else
354 ld(r1, offset, rd);
355 ld(r1, offset + Interpreter::stackElementSize(), rd->successor());
356 #endif
357 }
358
359 // Known good alignment in _LP64 but unknown otherwise
360 void InterpreterMacroAssembler::store_unaligned_long(Register l, Register r1, int offset) {
361 assert_not_delayed();
362
363 #ifdef _LP64
364 stx(l, r1, offset);
365 // store something more useful here
366 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize());)
367 #else
368 st(l, r1, offset);
369 st(l->successor(), r1, offset + Interpreter::stackElementSize());
370 #endif
371 }
372
373 #ifdef ASSERT
374 void InterpreterMacroAssembler::verify_stack_tag(frame::Tag t,
375 Register r,
376 Register scratch) {
377 if (TaggedStackInterpreter) {
378 Label ok, long_ok;
379 ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(0), r);
380 if (t == frame::TagCategory2) {
381 cmp(r, G0);
382 brx(Assembler::equal, false, Assembler::pt, long_ok);
383 delayed()->ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(1), r);
384 stop("stack long/double tag value bad");
385 bind(long_ok);
386 cmp(r, G0);
387 } else if (t == frame::TagValue) {
388 cmp(r, G0);
389 } else {
390 assert_different_registers(r, scratch);
391 mov(t, scratch);
392 cmp(r, scratch);
393 }
394 brx(Assembler::equal, false, Assembler::pt, ok);
395 delayed()->nop();
396 // Also compare if the stack value is zero, then the tag might
397 // not have been set coming from deopt.
398 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
399 cmp(r, G0);
400 brx(Assembler::equal, false, Assembler::pt, ok);
401 delayed()->nop();
402 stop("Stack tag value is bad");
403 bind(ok);
404 }
405 }
406 #endif // ASSERT
407
408 void InterpreterMacroAssembler::pop_i(Register r) {
409 assert_not_delayed();
410 // Uses destination register r for scratch
411 debug_only(verify_stack_tag(frame::TagValue, r));
412 ld(Lesp, Interpreter::expr_offset_in_bytes(0), r);
413 inc(Lesp, Interpreter::stackElementSize());
414 debug_only(verify_esp(Lesp));
415 }
416
417 void InterpreterMacroAssembler::pop_ptr(Register r, Register scratch) {
418 assert_not_delayed();
419 // Uses destination register r for scratch
420 debug_only(verify_stack_tag(frame::TagReference, r, scratch));
421 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
422 inc(Lesp, Interpreter::stackElementSize());
423 debug_only(verify_esp(Lesp));
424 }
425
426 void InterpreterMacroAssembler::pop_l(Register r) {
427 assert_not_delayed();
428 // Uses destination register r for scratch
429 debug_only(verify_stack_tag(frame::TagCategory2, r));
430 load_unaligned_long(Lesp, Interpreter::expr_offset_in_bytes(0), r);
431 inc(Lesp, 2*Interpreter::stackElementSize());
432 debug_only(verify_esp(Lesp));
433 }
434
435
436 void InterpreterMacroAssembler::pop_f(FloatRegister f, Register scratch) {
437 assert_not_delayed();
438 debug_only(verify_stack_tag(frame::TagValue, scratch));
439 ldf(FloatRegisterImpl::S, Lesp, Interpreter::expr_offset_in_bytes(0), f);
440 inc(Lesp, Interpreter::stackElementSize());
441 debug_only(verify_esp(Lesp));
442 }
443
444
445 void InterpreterMacroAssembler::pop_d(FloatRegister f, Register scratch) {
446 assert_not_delayed();
447 debug_only(verify_stack_tag(frame::TagCategory2, scratch));
448 load_unaligned_double(Lesp, Interpreter::expr_offset_in_bytes(0), f);
449 inc(Lesp, 2*Interpreter::stackElementSize());
450 debug_only(verify_esp(Lesp));
451 }
452
453
454 // (Note use register first, then decrement so dec can be done during store stall)
455 void InterpreterMacroAssembler::tag_stack(Register r) {
456 if (TaggedStackInterpreter) {
457 st_ptr(r, Lesp, Interpreter::tag_offset_in_bytes());
458 }
459 }
460
461 void InterpreterMacroAssembler::tag_stack(frame::Tag t, Register r) {
462 if (TaggedStackInterpreter) {
463 assert (frame::TagValue == 0, "TagValue must be zero");
464 if (t == frame::TagValue) {
465 st_ptr(G0, Lesp, Interpreter::tag_offset_in_bytes());
466 } else if (t == frame::TagCategory2) {
467 st_ptr(G0, Lesp, Interpreter::tag_offset_in_bytes());
468 // Tag next slot down too
469 st_ptr(G0, Lesp, -Interpreter::stackElementSize() + Interpreter::tag_offset_in_bytes());
470 } else {
471 assert_different_registers(r, O3);
472 mov(t, O3);
473 st_ptr(O3, Lesp, Interpreter::tag_offset_in_bytes());
474 }
475 }
476 }
477
478 void InterpreterMacroAssembler::push_i(Register r) {
479 assert_not_delayed();
480 debug_only(verify_esp(Lesp));
481 tag_stack(frame::TagValue, r);
482 st( r, Lesp, Interpreter::value_offset_in_bytes());
483 dec( Lesp, Interpreter::stackElementSize());
484 }
485
486 void InterpreterMacroAssembler::push_ptr(Register r) {
487 assert_not_delayed();
488 tag_stack(frame::TagReference, r);
489 st_ptr( r, Lesp, Interpreter::value_offset_in_bytes());
490 dec( Lesp, Interpreter::stackElementSize());
491 }
492
493 void InterpreterMacroAssembler::push_ptr(Register r, Register tag) {
494 assert_not_delayed();
495 tag_stack(tag);
496 st_ptr(r, Lesp, Interpreter::value_offset_in_bytes());
497 dec( Lesp, Interpreter::stackElementSize());
498 }
499
500 // remember: our convention for longs in SPARC is:
501 // O0 (Otos_l1) has high-order part in first word,
502 // O1 (Otos_l2) has low-order part in second word
503
504 void InterpreterMacroAssembler::push_l(Register r) {
505 assert_not_delayed();
506 debug_only(verify_esp(Lesp));
507 tag_stack(frame::TagCategory2, r);
508 // Longs are in stored in memory-correct order, even if unaligned.
509 // and may be separated by stack tags.
510 int offset = -Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();
511 store_unaligned_long(r, Lesp, offset);
512 dec(Lesp, 2 * Interpreter::stackElementSize());
513 }
514
515
516 void InterpreterMacroAssembler::push_f(FloatRegister f) {
517 assert_not_delayed();
518 debug_only(verify_esp(Lesp));
519 tag_stack(frame::TagValue, Otos_i);
520 stf(FloatRegisterImpl::S, f, Lesp, Interpreter::value_offset_in_bytes());
521 dec(Lesp, Interpreter::stackElementSize());
522 }
523
524
525 void InterpreterMacroAssembler::push_d(FloatRegister d) {
526 assert_not_delayed();
527 debug_only(verify_esp(Lesp));
528 tag_stack(frame::TagCategory2, Otos_i);
529 // Longs are in stored in memory-correct order, even if unaligned.
530 // and may be separated by stack tags.
531 int offset = -Interpreter::stackElementSize() + Interpreter::value_offset_in_bytes();
532 store_unaligned_double(d, Lesp, offset);
533 dec(Lesp, 2 * Interpreter::stackElementSize());
534 }
535
536
537 void InterpreterMacroAssembler::push(TosState state) {
538 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
539 switch (state) {
540 case atos: push_ptr(); break;
541 case btos: push_i(); break;
542 case ctos:
543 case stos: push_i(); break;
544 case itos: push_i(); break;
545 case ltos: push_l(); break;
546 case ftos: push_f(); break;
547 case dtos: push_d(); break;
548 case vtos: /* nothing to do */ break;
549 default : ShouldNotReachHere();
550 }
551 }
552
553
554 void InterpreterMacroAssembler::pop(TosState state) {
555 switch (state) {
556 case atos: pop_ptr(); break;
557 case btos: pop_i(); break;
558 case ctos:
559 case stos: pop_i(); break;
560 case itos: pop_i(); break;
561 case ltos: pop_l(); break;
562 case ftos: pop_f(); break;
563 case dtos: pop_d(); break;
564 case vtos: /* nothing to do */ break;
565 default : ShouldNotReachHere();
566 }
567 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
568 }
569
570
571 // Tagged stack helpers for swap and dup
572 void InterpreterMacroAssembler::load_ptr_and_tag(int n, Register val,
573 Register tag) {
574 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(n), val);
575 if (TaggedStackInterpreter) {
576 ld_ptr(Lesp, Interpreter::expr_tag_offset_in_bytes(n), tag);
577 }
578 }
579 void InterpreterMacroAssembler::store_ptr_and_tag(int n, Register val,
580 Register tag) {
581 st_ptr(val, Lesp, Interpreter::expr_offset_in_bytes(n));
582 if (TaggedStackInterpreter) {
583 st_ptr(tag, Lesp, Interpreter::expr_tag_offset_in_bytes(n));
584 }
585 }
586
587
588 void InterpreterMacroAssembler::load_receiver(Register param_count,
589 Register recv) {
590
591 sll(param_count, Interpreter::logStackElementSize(), param_count);
592 if (TaggedStackInterpreter) {
593 add(param_count, Interpreter::value_offset_in_bytes(), param_count); // get obj address
594 }
595 ld_ptr(Lesp, param_count, recv); // gets receiver Oop
596 }
597
598 void InterpreterMacroAssembler::empty_expression_stack() {
599 // Reset Lesp.
600 sub( Lmonitors, wordSize, Lesp );
601
602 // Reset SP by subtracting more space from Lesp.
603 Label done;
604
605 const Address max_stack (Lmethod, 0, in_bytes(methodOopDesc::max_stack_offset()));
606 const Address access_flags(Lmethod, 0, in_bytes(methodOopDesc::access_flags_offset()));
607
608 verify_oop(Lmethod);
609
610
611 assert( G4_scratch != Gframe_size,
612 "Only you can prevent register aliasing!");
613
614 // A native does not need to do this, since its callee does not change SP.
615 ld(access_flags, Gframe_size);
616 btst(JVM_ACC_NATIVE, Gframe_size);
617 br(Assembler::notZero, false, Assembler::pt, done);
618 delayed()->nop();
619
620 //
621 // Compute max expression stack+register save area
622 //
623 lduh( max_stack, Gframe_size );
624 if (TaggedStackInterpreter) sll ( Gframe_size, 1, Gframe_size); // max_stack * 2 for TAGS
625 add( Gframe_size, frame::memory_parameter_word_sp_offset, Gframe_size );
626
627 //
628 // now set up a stack frame with the size computed above
629 //
630 //round_to( Gframe_size, WordsPerLong ); // -- moved down to the "and" below
631 sll( Gframe_size, LogBytesPerWord, Gframe_size );
632 sub( Lesp, Gframe_size, Gframe_size );
633 and3( Gframe_size, -(2 * wordSize), Gframe_size ); // align SP (downwards) to an 8/16-byte boundary
634 debug_only(verify_sp(Gframe_size, G4_scratch));
635 #ifdef _LP64
636 sub(Gframe_size, STACK_BIAS, Gframe_size );
637 #endif
638 mov(Gframe_size, SP);
639
640 bind(done);
641 }
642
643
644 #ifdef ASSERT
645 void InterpreterMacroAssembler::verify_sp(Register Rsp, Register Rtemp) {
646 Label Bad, OK;
647
648 // Saved SP must be aligned.
649 #ifdef _LP64
650 btst(2*BytesPerWord-1, Rsp);
651 #else
652 btst(LongAlignmentMask, Rsp);
653 #endif
654 br(Assembler::notZero, false, Assembler::pn, Bad);
655 delayed()->nop();
656
657 // Saved SP, plus register window size, must not be above FP.
658 add(Rsp, frame::register_save_words * wordSize, Rtemp);
659 #ifdef _LP64
660 sub(Rtemp, STACK_BIAS, Rtemp); // Bias Rtemp before cmp to FP
661 #endif
662 cmp(Rtemp, FP);
663 brx(Assembler::greaterUnsigned, false, Assembler::pn, Bad);
664 delayed()->nop();
665
666 // Saved SP must not be ridiculously below current SP.
667 size_t maxstack = MAX2(JavaThread::stack_size_at_create(), (size_t) 4*K*K);
668 set(maxstack, Rtemp);
669 sub(SP, Rtemp, Rtemp);
670 #ifdef _LP64
671 add(Rtemp, STACK_BIAS, Rtemp); // Unbias Rtemp before cmp to Rsp
672 #endif
673 cmp(Rsp, Rtemp);
674 brx(Assembler::lessUnsigned, false, Assembler::pn, Bad);
675 delayed()->nop();
676
677 br(Assembler::always, false, Assembler::pn, OK);
678 delayed()->nop();
679
680 bind(Bad);
681 stop("on return to interpreted call, restored SP is corrupted");
682
683 bind(OK);
684 }
685
686
687 void InterpreterMacroAssembler::verify_esp(Register Resp) {
688 // about to read or write Resp[0]
689 // make sure it is not in the monitors or the register save area
690 Label OK1, OK2;
691
692 cmp(Resp, Lmonitors);
693 brx(Assembler::lessUnsigned, true, Assembler::pt, OK1);
694 delayed()->sub(Resp, frame::memory_parameter_word_sp_offset * wordSize, Resp);
695 stop("too many pops: Lesp points into monitor area");
696 bind(OK1);
697 #ifdef _LP64
698 sub(Resp, STACK_BIAS, Resp);
699 #endif
700 cmp(Resp, SP);
701 brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, OK2);
702 delayed()->add(Resp, STACK_BIAS + frame::memory_parameter_word_sp_offset * wordSize, Resp);
703 stop("too many pushes: Lesp points into register window");
704 bind(OK2);
705 }
706 #endif // ASSERT
707
708 // Load compiled (i2c) or interpreter entry when calling from interpreted and
709 // do the call. Centralized so that all interpreter calls will do the same actions.
710 // If jvmti single stepping is on for a thread we must not call compiled code.
711 void InterpreterMacroAssembler::call_from_interpreter(Register target, Register scratch, Register Rret) {
712
713 // Assume we want to go compiled if available
714
715 ld_ptr(G5_method, in_bytes(methodOopDesc::from_interpreted_offset()), target);
716
717 if (JvmtiExport::can_post_interpreter_events()) {
718 // JVMTI events, such as single-stepping, are implemented partly by avoiding running
719 // compiled code in threads for which the event is enabled. Check here for
720 // interp_only_mode if these events CAN be enabled.
721 verify_thread();
722 Label skip_compiled_code;
723
724 const Address interp_only (G2_thread, 0, in_bytes(JavaThread::interp_only_mode_offset()));
725
726 ld(interp_only, scratch);
727 tst(scratch);
728 br(Assembler::notZero, true, Assembler::pn, skip_compiled_code);
729 delayed()->ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), target);
730 bind(skip_compiled_code);
731 }
732
733 // the i2c_adapters need methodOop in G5_method (right? %%%)
734 // do the call
735 #ifdef ASSERT
736 {
737 Label ok;
738 br_notnull(target, false, Assembler::pt, ok);
739 delayed()->nop();
740 stop("null entry point");
741 bind(ok);
742 }
743 #endif // ASSERT
744
745 // Adjust Rret first so Llast_SP can be same as Rret
746 add(Rret, -frame::pc_return_offset, O7);
747 add(Lesp, BytesPerWord, Gargs); // setup parameter pointer
748 // Record SP so we can remove any stack space allocated by adapter transition
749 jmp(target, 0);
750 delayed()->mov(SP, Llast_SP);
751 }
752
753 void InterpreterMacroAssembler::if_cmp(Condition cc, bool ptr_compare) {
754 assert_not_delayed();
755
756 Label not_taken;
757 if (ptr_compare) brx(cc, false, Assembler::pn, not_taken);
758 else br (cc, false, Assembler::pn, not_taken);
759 delayed()->nop();
760
761 TemplateTable::branch(false,false);
762
763 bind(not_taken);
764
765 profile_not_taken_branch(G3_scratch);
766 }
767
768
769 void InterpreterMacroAssembler::get_2_byte_integer_at_bcp(
770 int bcp_offset,
771 Register Rtmp,
772 Register Rdst,
773 signedOrNot is_signed,
774 setCCOrNot should_set_CC ) {
775 assert(Rtmp != Rdst, "need separate temp register");
776 assert_not_delayed();
777 switch (is_signed) {
778 default: ShouldNotReachHere();
779
780 case Signed: ldsb( Lbcp, bcp_offset, Rdst ); break; // high byte
781 case Unsigned: ldub( Lbcp, bcp_offset, Rdst ); break; // high byte
782 }
783 ldub( Lbcp, bcp_offset + 1, Rtmp ); // low byte
784 sll( Rdst, BitsPerByte, Rdst);
785 switch (should_set_CC ) {
786 default: ShouldNotReachHere();
787
788 case set_CC: orcc( Rdst, Rtmp, Rdst ); break;
789 case dont_set_CC: or3( Rdst, Rtmp, Rdst ); break;
790 }
791 }
792
793
794 void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(
795 int bcp_offset,
796 Register Rtmp,
797 Register Rdst,
798 setCCOrNot should_set_CC ) {
799 assert(Rtmp != Rdst, "need separate temp register");
800 assert_not_delayed();
801 add( Lbcp, bcp_offset, Rtmp);
802 andcc( Rtmp, 3, G0);
803 Label aligned;
804 switch (should_set_CC ) {
805 default: ShouldNotReachHere();
806
807 case set_CC: break;
808 case dont_set_CC: break;
809 }
810
811 br(Assembler::zero, true, Assembler::pn, aligned);
812 #ifdef _LP64
813 delayed()->ldsw(Rtmp, 0, Rdst);
814 #else
815 delayed()->ld(Rtmp, 0, Rdst);
816 #endif
817
818 ldub(Lbcp, bcp_offset + 3, Rdst);
819 ldub(Lbcp, bcp_offset + 2, Rtmp); sll(Rtmp, 8, Rtmp); or3(Rtmp, Rdst, Rdst);
820 ldub(Lbcp, bcp_offset + 1, Rtmp); sll(Rtmp, 16, Rtmp); or3(Rtmp, Rdst, Rdst);
821 #ifdef _LP64
822 ldsb(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
823 #else
824 // Unsigned load is faster than signed on some implementations
825 ldub(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
826 #endif
827 or3(Rtmp, Rdst, Rdst );
828
829 bind(aligned);
830 if (should_set_CC == set_CC) tst(Rdst);
831 }
832
833
834 void InterpreterMacroAssembler::get_index_at_bcp(Register Rtmp, Register Rdst,
835 int bcp_offset, bool giant_index) {
836 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
837 if (!giant_index) {
838 get_2_byte_integer_at_bcp(bcp_offset, Rtmp, Rdst, Unsigned);
839 } else {
840 assert(InvokeDynamic, "giant index used only for InvokeDynamic");
841 get_4_byte_integer_at_bcp(bcp_offset, Rtmp, Rdst);
842 assert(constantPoolCacheOopDesc::decode_secondary_index(~123) == 123, "else change next line");
843 xor3(Rdst, -1, Rdst); // convert to plain index
844 }
845 }
846
847
848 void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register tmp,
849 int bcp_offset, bool giant_index) {
850 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
851 assert_different_registers(cache, tmp);
852 assert_not_delayed();
853 assert(!giant_index,"NYI");
854 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
855 // convert from field index to ConstantPoolCacheEntry index
856 // and from word index to byte offset
857 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
858 add(LcpoolCache, tmp, cache);
859 }
860
861
862 void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp,
863 int bcp_offset, bool giant_index) {
864 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
865 assert_different_registers(cache, tmp);
866 assert_not_delayed();
867 assert(!giant_index,"NYI");
868 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
869 // convert from field index to ConstantPoolCacheEntry index
870 // and from word index to byte offset
871 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
872 // skip past the header
873 add(tmp, in_bytes(constantPoolCacheOopDesc::base_offset()), tmp);
874 // construct pointer to cache entry
875 add(LcpoolCache, tmp, cache);
876 }
877
878
879 // Generate a subtype check: branch to ok_is_subtype if sub_klass is
880 // a subtype of super_klass. Blows registers Rsuper_klass, Rsub_klass, tmp1, tmp2.
881 void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass,
882 Register Rsuper_klass,
883 Register Rtmp1,
884 Register Rtmp2,
885 Register Rtmp3,
886 Label &ok_is_subtype ) {
887 Label not_subtype, loop;
888
889 // Profile the not-null value's klass.
890 profile_typecheck(Rsub_klass, Rtmp1);
891
892 // Load the super-klass's check offset into Rtmp1
893 ld( Rsuper_klass, sizeof(oopDesc) + Klass::super_check_offset_offset_in_bytes(), Rtmp1 );
894 // Load from the sub-klass's super-class display list, or a 1-word cache of
895 // the secondary superclass list, or a failing value with a sentinel offset
896 // if the super-klass is an interface or exceptionally deep in the Java
897 // hierarchy and we have to scan the secondary superclass list the hard way.
898 ld_ptr( Rsub_klass, Rtmp1, Rtmp2 );
899 // See if we get an immediate positive hit
900 cmp( Rtmp2, Rsuper_klass );
901 brx( Assembler::equal, false, Assembler::pt, ok_is_subtype );
902 // In the delay slot, check for immediate negative hit
903 delayed()->cmp( Rtmp1, sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes() );
904 br( Assembler::notEqual, false, Assembler::pt, not_subtype );
905 // In the delay slot, check for self
906 delayed()->cmp( Rsub_klass, Rsuper_klass );
907 brx( Assembler::equal, false, Assembler::pt, ok_is_subtype );
908
909 // Now do a linear scan of the secondary super-klass chain.
910 delayed()->ld_ptr( Rsub_klass, sizeof(oopDesc) + Klass::secondary_supers_offset_in_bytes(), Rtmp2 );
911
912 // compress superclass
913 if (UseCompressedOops) encode_heap_oop(Rsuper_klass);
914
915 // Rtmp2 holds the objArrayOop of secondary supers.
916 ld( Rtmp2, arrayOopDesc::length_offset_in_bytes(), Rtmp1 );// Load the array length
917 // Check for empty secondary super list
918 tst(Rtmp1);
919
920 // Top of search loop
921 bind( loop );
922 br( Assembler::equal, false, Assembler::pn, not_subtype );
923 delayed()->nop();
924
925 // load next super to check
926 if (UseCompressedOops) {
927 ld( Rtmp2, arrayOopDesc::base_offset_in_bytes(T_OBJECT), Rtmp3);
928 // Bump array pointer forward one oop
929 add( Rtmp2, 4, Rtmp2 );
930 } else {
931 ld_ptr( Rtmp2, arrayOopDesc::base_offset_in_bytes(T_OBJECT), Rtmp3);
932 // Bump array pointer forward one oop
933 add( Rtmp2, wordSize, Rtmp2);
934 }
935 // Look for Rsuper_klass on Rsub_klass's secondary super-class-overflow list
936 cmp( Rtmp3, Rsuper_klass );
937 // A miss means we are NOT a subtype and need to keep looping
938 brx( Assembler::notEqual, false, Assembler::pt, loop );
939 delayed()->deccc( Rtmp1 ); // dec trip counter in delay slot
940 // Falling out the bottom means we found a hit; we ARE a subtype
941 if (UseCompressedOops) decode_heap_oop(Rsuper_klass);
942 br( Assembler::always, false, Assembler::pt, ok_is_subtype );
943 // Update the cache
944 delayed()->st_ptr( Rsuper_klass, Rsub_klass,
945 sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes() );
946
947 bind(not_subtype);
948 profile_typecheck_failed(Rtmp1);
949 }
950
951 // Separate these two to allow for delay slot in middle
952 // These are used to do a test and full jump to exception-throwing code.
953
954 // %%%%% Could possibly reoptimize this by testing to see if could use
955 // a single conditional branch (i.e. if span is small enough.
956 // If you go that route, than get rid of the split and give up
957 // on the delay-slot hack.
958
959 void InterpreterMacroAssembler::throw_if_not_1_icc( Condition ok_condition,
960 Label& ok ) {
961 assert_not_delayed();
962 br(ok_condition, true, pt, ok);
963 // DELAY SLOT
964 }
965
966 void InterpreterMacroAssembler::throw_if_not_1_xcc( Condition ok_condition,
967 Label& ok ) {
968 assert_not_delayed();
969 bp( ok_condition, true, Assembler::xcc, pt, ok);
970 // DELAY SLOT
971 }
972
973 void InterpreterMacroAssembler::throw_if_not_1_x( Condition ok_condition,
974 Label& ok ) {
975 assert_not_delayed();
976 brx(ok_condition, true, pt, ok);
977 // DELAY SLOT
978 }
979
980 void InterpreterMacroAssembler::throw_if_not_2( address throw_entry_point,
981 Register Rscratch,
982 Label& ok ) {
983 assert(throw_entry_point != NULL, "entry point must be generated by now");
984 Address dest(Rscratch, throw_entry_point);
985 jump_to(dest);
986 delayed()->nop();
987 bind(ok);
988 }
989
990
991 // And if you cannot use the delay slot, here is a shorthand:
992
993 void InterpreterMacroAssembler::throw_if_not_icc( Condition ok_condition,
994 address throw_entry_point,
995 Register Rscratch ) {
996 Label ok;
997 if (ok_condition != never) {
998 throw_if_not_1_icc( ok_condition, ok);
999 delayed()->nop();
1000 }
1001 throw_if_not_2( throw_entry_point, Rscratch, ok);
1002 }
1003 void InterpreterMacroAssembler::throw_if_not_xcc( Condition ok_condition,
1004 address throw_entry_point,
1005 Register Rscratch ) {
1006 Label ok;
1007 if (ok_condition != never) {
1008 throw_if_not_1_xcc( ok_condition, ok);
1009 delayed()->nop();
1010 }
1011 throw_if_not_2( throw_entry_point, Rscratch, ok);
1012 }
1013 void InterpreterMacroAssembler::throw_if_not_x( Condition ok_condition,
1014 address throw_entry_point,
1015 Register Rscratch ) {
1016 Label ok;
1017 if (ok_condition != never) {
1018 throw_if_not_1_x( ok_condition, ok);
1019 delayed()->nop();
1020 }
1021 throw_if_not_2( throw_entry_point, Rscratch, ok);
1022 }
1023
1024 // Check that index is in range for array, then shift index by index_shift, and put arrayOop + shifted_index into res
1025 // Note: res is still shy of address by array offset into object.
1026
1027 void InterpreterMacroAssembler::index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res) {
1028 assert_not_delayed();
1029
1030 verify_oop(array);
1031 #ifdef _LP64
1032 // sign extend since tos (index) can be a 32bit value
1033 sra(index, G0, index);
1034 #endif // _LP64
1035
1036 // check array
1037 Label ptr_ok;
1038 tst(array);
1039 throw_if_not_1_x( notZero, ptr_ok );
1040 delayed()->ld( array, arrayOopDesc::length_offset_in_bytes(), tmp ); // check index
1041 throw_if_not_2( Interpreter::_throw_NullPointerException_entry, G3_scratch, ptr_ok);
1042
1043 Label index_ok;
1044 cmp(index, tmp);
1045 throw_if_not_1_icc( lessUnsigned, index_ok );
1046 if (index_shift > 0) delayed()->sll(index, index_shift, index);
1047 else delayed()->add(array, index, res); // addr - const offset in index
1048 // convention: move aberrant index into G3_scratch for exception message
1049 mov(index, G3_scratch);
1050 throw_if_not_2( Interpreter::_throw_ArrayIndexOutOfBoundsException_entry, G4_scratch, index_ok);
1051
1052 // add offset if didn't do it in delay slot
1053 if (index_shift > 0) add(array, index, res); // addr - const offset in index
1054 }
1055
1056
1057 void InterpreterMacroAssembler::index_check(Register array, Register index, int index_shift, Register tmp, Register res) {
1058 assert_not_delayed();
1059
1060 // pop array
1061 pop_ptr(array);
1062
1063 // check array
1064 index_check_without_pop(array, index, index_shift, tmp, res);
1065 }
1066
1067
1068 void InterpreterMacroAssembler::get_constant_pool(Register Rdst) {
1069 ld_ptr(Lmethod, in_bytes(methodOopDesc::constants_offset()), Rdst);
1070 }
1071
1072
1073 void InterpreterMacroAssembler::get_constant_pool_cache(Register Rdst) {
1074 get_constant_pool(Rdst);
1075 ld_ptr(Rdst, constantPoolOopDesc::cache_offset_in_bytes(), Rdst);
1076 }
1077
1078
1079 void InterpreterMacroAssembler::get_cpool_and_tags(Register Rcpool, Register Rtags) {
1080 get_constant_pool(Rcpool);
1081 ld_ptr(Rcpool, constantPoolOopDesc::tags_offset_in_bytes(), Rtags);
1082 }
1083
1084
1085 // unlock if synchronized method
1086 //
1087 // Unlock the receiver if this is a synchronized method.
1088 // Unlock any Java monitors from syncronized blocks.
1089 //
1090 // If there are locked Java monitors
1091 // If throw_monitor_exception
1092 // throws IllegalMonitorStateException
1093 // Else if install_monitor_exception
1094 // installs IllegalMonitorStateException
1095 // Else
1096 // no error processing
1097 void InterpreterMacroAssembler::unlock_if_synchronized_method(TosState state,
1098 bool throw_monitor_exception,
1099 bool install_monitor_exception) {
1100 Label unlocked, unlock, no_unlock;
1101
1102 // get the value of _do_not_unlock_if_synchronized into G1_scratch
1103 const Address do_not_unlock_if_synchronized(G2_thread, 0,
1104 in_bytes(JavaThread::do_not_unlock_if_synchronized_offset()));
1105 ldbool(do_not_unlock_if_synchronized, G1_scratch);
1106 stbool(G0, do_not_unlock_if_synchronized); // reset the flag
1107
1108 // check if synchronized method
1109 const Address access_flags(Lmethod, 0, in_bytes(methodOopDesc::access_flags_offset()));
1110 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1111 push(state); // save tos
1112 ld(access_flags, G3_scratch);
1113 btst(JVM_ACC_SYNCHRONIZED, G3_scratch);
1114 br( zero, false, pt, unlocked);
1115 delayed()->nop();
1116
1117 // Don't unlock anything if the _do_not_unlock_if_synchronized flag
1118 // is set.
1119 tstbool(G1_scratch);
1120 br(Assembler::notZero, false, pn, no_unlock);
1121 delayed()->nop();
1122
1123 // BasicObjectLock will be first in list, since this is a synchronized method. However, need
1124 // to check that the object has not been unlocked by an explicit monitorexit bytecode.
1125
1126 //Intel: if (throw_monitor_exception) ... else ...
1127 // Entry already unlocked, need to throw exception
1128 //...
1129
1130 // pass top-most monitor elem
1131 add( top_most_monitor(), O1 );
1132
1133 ld_ptr(O1, BasicObjectLock::obj_offset_in_bytes(), G3_scratch);
1134 br_notnull(G3_scratch, false, pt, unlock);
1135 delayed()->nop();
1136
1137 if (throw_monitor_exception) {
1138 // Entry already unlocked need to throw an exception
1139 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1140 should_not_reach_here();
1141 } else {
1142 // Monitor already unlocked during a stack unroll.
1143 // If requested, install an illegal_monitor_state_exception.
1144 // Continue with stack unrolling.
1145 if (install_monitor_exception) {
1146 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1147 }
1148 ba(false, unlocked);
1149 delayed()->nop();
1150 }
1151
1152 bind(unlock);
1153
1154 unlock_object(O1);
1155
1156 bind(unlocked);
1157
1158 // I0, I1: Might contain return value
1159
1160 // Check that all monitors are unlocked
1161 { Label loop, exception, entry, restart;
1162
1163 Register Rmptr = O0;
1164 Register Rtemp = O1;
1165 Register Rlimit = Lmonitors;
1166 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1167 assert( (delta & LongAlignmentMask) == 0,
1168 "sizeof BasicObjectLock must be even number of doublewords");
1169
1170 #ifdef ASSERT
1171 add(top_most_monitor(), Rmptr, delta);
1172 { Label L;
1173 // ensure that Rmptr starts out above (or at) Rlimit
1174 cmp(Rmptr, Rlimit);
1175 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1176 delayed()->nop();
1177 stop("monitor stack has negative size");
1178 bind(L);
1179 }
1180 #endif
1181 bind(restart);
1182 ba(false, entry);
1183 delayed()->
1184 add(top_most_monitor(), Rmptr, delta); // points to current entry, starting with bottom-most entry
1185
1186 // Entry is still locked, need to throw exception
1187 bind(exception);
1188 if (throw_monitor_exception) {
1189 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1190 should_not_reach_here();
1191 } else {
1192 // Stack unrolling. Unlock object and if requested, install illegal_monitor_exception.
1193 // Unlock does not block, so don't have to worry about the frame
1194 unlock_object(Rmptr);
1195 if (install_monitor_exception) {
1196 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1197 }
1198 ba(false, restart);
1199 delayed()->nop();
1200 }
1201
1202 bind(loop);
1203 cmp(Rtemp, G0); // check if current entry is used
1204 brx(Assembler::notEqual, false, pn, exception);
1205 delayed()->
1206 dec(Rmptr, delta); // otherwise advance to next entry
1207 #ifdef ASSERT
1208 { Label L;
1209 // ensure that Rmptr has not somehow stepped below Rlimit
1210 cmp(Rmptr, Rlimit);
1211 brx(Assembler::greaterEqualUnsigned, false, pn, L);
1212 delayed()->nop();
1213 stop("ran off the end of the monitor stack");
1214 bind(L);
1215 }
1216 #endif
1217 bind(entry);
1218 cmp(Rmptr, Rlimit); // check if bottom reached
1219 brx(Assembler::notEqual, true, pn, loop); // if not at bottom then check this entry
1220 delayed()->
1221 ld_ptr(Rmptr, BasicObjectLock::obj_offset_in_bytes() - delta, Rtemp);
1222 }
1223
1224 bind(no_unlock);
1225 pop(state);
1226 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1227 }
1228
1229
1230 // remove activation
1231 //
1232 // Unlock the receiver if this is a synchronized method.
1233 // Unlock any Java monitors from syncronized blocks.
1234 // Remove the activation from the stack.
1235 //
1236 // If there are locked Java monitors
1237 // If throw_monitor_exception
1238 // throws IllegalMonitorStateException
1239 // Else if install_monitor_exception
1240 // installs IllegalMonitorStateException
1241 // Else
1242 // no error processing
1243 void InterpreterMacroAssembler::remove_activation(TosState state,
1244 bool throw_monitor_exception,
1245 bool install_monitor_exception) {
1246
1247 unlock_if_synchronized_method(state, throw_monitor_exception, install_monitor_exception);
1248
1249 // save result (push state before jvmti call and pop it afterwards) and notify jvmti
1250 notify_method_exit(false, state, NotifyJVMTI);
1251
1252 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1253 verify_oop(Lmethod);
1254 verify_thread();
1255
1256 // return tos
1257 assert(Otos_l1 == Otos_i, "adjust code below");
1258 switch (state) {
1259 #ifdef _LP64
1260 case ltos: mov(Otos_l, Otos_l->after_save()); break; // O0 -> I0
1261 #else
1262 case ltos: mov(Otos_l2, Otos_l2->after_save()); // fall through // O1 -> I1
1263 #endif
1264 case btos: // fall through
1265 case ctos:
1266 case stos: // fall through
1267 case atos: // fall through
1268 case itos: mov(Otos_l1, Otos_l1->after_save()); break; // O0 -> I0
1269 case ftos: // fall through
1270 case dtos: // fall through
1271 case vtos: /* nothing to do */ break;
1272 default : ShouldNotReachHere();
1273 }
1274
1275 #if defined(COMPILER2) && !defined(_LP64)
1276 if (state == ltos) {
1277 // C2 expects long results in G1 we can't tell if we're returning to interpreted
1278 // or compiled so just be safe use G1 and O0/O1
1279
1280 // Shift bits into high (msb) of G1
1281 sllx(Otos_l1->after_save(), 32, G1);
1282 // Zero extend low bits
1283 srl (Otos_l2->after_save(), 0, Otos_l2->after_save());
1284 or3 (Otos_l2->after_save(), G1, G1);
1285 }
1286 #endif /* COMPILER2 */
1287
1288 }
1289 #endif /* CC_INTERP */
1290
1291
1292 // Lock object
1293 //
1294 // Argument - lock_reg points to the BasicObjectLock to be used for locking,
1295 // it must be initialized with the object to lock
1296 void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object) {
1297 if (UseHeavyMonitors) {
1298 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1299 }
1300 else {
1301 Register obj_reg = Object;
1302 Register mark_reg = G4_scratch;
1303 Register temp_reg = G1_scratch;
1304 Address lock_addr = Address(lock_reg, 0, BasicObjectLock::lock_offset_in_bytes());
1305 Address mark_addr = Address(obj_reg, 0, oopDesc::mark_offset_in_bytes());
1306 Label done;
1307
1308 Label slow_case;
1309
1310 assert_different_registers(lock_reg, obj_reg, mark_reg, temp_reg);
1311
1312 // load markOop from object into mark_reg
1313 ld_ptr(mark_addr, mark_reg);
1314
1315 if (UseBiasedLocking) {
1316 biased_locking_enter(obj_reg, mark_reg, temp_reg, done, &slow_case);
1317 }
1318
1319 // get the address of basicLock on stack that will be stored in the object
1320 // we need a temporary register here as we do not want to clobber lock_reg
1321 // (cas clobbers the destination register)
1322 mov(lock_reg, temp_reg);
1323 // set mark reg to be (markOop of object | UNLOCK_VALUE)
1324 or3(mark_reg, markOopDesc::unlocked_value, mark_reg);
1325 // initialize the box (Must happen before we update the object mark!)
1326 st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1327 // compare and exchange object_addr, markOop | 1, stack address of basicLock
1328 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1329 casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
1330 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1331
1332 // if the compare and exchange succeeded we are done (we saw an unlocked object)
1333 cmp(mark_reg, temp_reg);
1334 brx(Assembler::equal, true, Assembler::pt, done);
1335 delayed()->nop();
1336
1337 // We did not see an unlocked object so try the fast recursive case
1338
1339 // Check if owner is self by comparing the value in the markOop of object
1340 // with the stack pointer
1341 sub(temp_reg, SP, temp_reg);
1342 #ifdef _LP64
1343 sub(temp_reg, STACK_BIAS, temp_reg);
1344 #endif
1345 assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
1346
1347 // Composite "andcc" test:
1348 // (a) %sp -vs- markword proximity check, and,
1349 // (b) verify mark word LSBs == 0 (Stack-locked).
1350 //
1351 // FFFFF003/FFFFFFFFFFFF003 is (markOopDesc::lock_mask_in_place | -os::vm_page_size())
1352 // Note that the page size used for %sp proximity testing is arbitrary and is
1353 // unrelated to the actual MMU page size. We use a 'logical' page size of
1354 // 4096 bytes. F..FFF003 is designed to fit conveniently in the SIMM13 immediate
1355 // field of the andcc instruction.
1356 andcc (temp_reg, 0xFFFFF003, G0) ;
1357
1358 // if condition is true we are done and hence we can store 0 in the displaced
1359 // header indicating it is a recursive lock and be done
1360 brx(Assembler::zero, true, Assembler::pt, done);
1361 delayed()->st_ptr(G0, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1362
1363 // none of the above fast optimizations worked so we have to get into the
1364 // slow case of monitor enter
1365 bind(slow_case);
1366 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1367
1368 bind(done);
1369 }
1370 }
1371
1372 // Unlocks an object. Used in monitorexit bytecode and remove_activation.
1373 //
1374 // Argument - lock_reg points to the BasicObjectLock for lock
1375 // Throw IllegalMonitorException if object is not locked by current thread
1376 void InterpreterMacroAssembler::unlock_object(Register lock_reg) {
1377 if (UseHeavyMonitors) {
1378 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1379 } else {
1380 Register obj_reg = G3_scratch;
1381 Register mark_reg = G4_scratch;
1382 Register displaced_header_reg = G1_scratch;
1383 Address lock_addr = Address(lock_reg, 0, BasicObjectLock::lock_offset_in_bytes());
1384 Address lockobj_addr = Address(lock_reg, 0, BasicObjectLock::obj_offset_in_bytes());
1385 Address mark_addr = Address(obj_reg, 0, oopDesc::mark_offset_in_bytes());
1386 Label done;
1387
1388 if (UseBiasedLocking) {
1389 // load the object out of the BasicObjectLock
1390 ld_ptr(lockobj_addr, obj_reg);
1391 biased_locking_exit(mark_addr, mark_reg, done, true);
1392 st_ptr(G0, lockobj_addr); // free entry
1393 }
1394
1395 // Test first if we are in the fast recursive case
1396 ld_ptr(lock_addr, displaced_header_reg, BasicLock::displaced_header_offset_in_bytes());
1397 br_null(displaced_header_reg, true, Assembler::pn, done);
1398 delayed()->st_ptr(G0, lockobj_addr); // free entry
1399
1400 // See if it is still a light weight lock, if so we just unlock
1401 // the object and we are done
1402
1403 if (!UseBiasedLocking) {
1404 // load the object out of the BasicObjectLock
1405 ld_ptr(lockobj_addr, obj_reg);
1406 }
1407
1408 // we have the displaced header in displaced_header_reg
1409 // we expect to see the stack address of the basicLock in case the
1410 // lock is still a light weight lock (lock_reg)
1411 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1412 casx_under_lock(mark_addr.base(), lock_reg, displaced_header_reg,
1413 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1414 cmp(lock_reg, displaced_header_reg);
1415 brx(Assembler::equal, true, Assembler::pn, done);
1416 delayed()->st_ptr(G0, lockobj_addr); // free entry
1417
1418 // The lock has been converted into a heavy lock and hence
1419 // we need to get into the slow case
1420
1421 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1422
1423 bind(done);
1424 }
1425 }
1426
1427 #ifndef CC_INTERP
1428
1429 // Get the method data pointer from the methodOop and set the
1430 // specified register to its value.
1431
1432 void InterpreterMacroAssembler::set_method_data_pointer_offset(Register Roff) {
1433 assert(ProfileInterpreter, "must be profiling interpreter");
1434 Label get_continue;
1435
1436 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1437 test_method_data_pointer(get_continue);
1438 add(ImethodDataPtr, in_bytes(methodDataOopDesc::data_offset()), ImethodDataPtr);
1439 if (Roff != noreg)
1440 // Roff contains a method data index ("mdi"). It defaults to zero.
1441 add(ImethodDataPtr, Roff, ImethodDataPtr);
1442 bind(get_continue);
1443 }
1444
1445 // Set the method data pointer for the current bcp.
1446
1447 void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() {
1448 assert(ProfileInterpreter, "must be profiling interpreter");
1449 Label zero_continue;
1450
1451 // Test MDO to avoid the call if it is NULL.
1452 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1453 test_method_data_pointer(zero_continue);
1454 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::bcp_to_di), Lmethod, Lbcp);
1455 set_method_data_pointer_offset(O0);
1456 bind(zero_continue);
1457 }
1458
1459 // Test ImethodDataPtr. If it is null, continue at the specified label
1460
1461 void InterpreterMacroAssembler::test_method_data_pointer(Label& zero_continue) {
1462 assert(ProfileInterpreter, "must be profiling interpreter");
1463 #ifdef _LP64
1464 bpr(Assembler::rc_z, false, Assembler::pn, ImethodDataPtr, zero_continue);
1465 #else
1466 tst(ImethodDataPtr);
1467 br(Assembler::zero, false, Assembler::pn, zero_continue);
1468 #endif
1469 delayed()->nop();
1470 }
1471
1472 void InterpreterMacroAssembler::verify_method_data_pointer() {
1473 assert(ProfileInterpreter, "must be profiling interpreter");
1474 #ifdef ASSERT
1475 Label verify_continue;
1476 test_method_data_pointer(verify_continue);
1477
1478 // If the mdp is valid, it will point to a DataLayout header which is
1479 // consistent with the bcp. The converse is highly probable also.
1480 lduh(ImethodDataPtr, in_bytes(DataLayout::bci_offset()), G3_scratch);
1481 ld_ptr(Address(Lmethod, 0, in_bytes(methodOopDesc::const_offset())), O5);
1482 add(G3_scratch, in_bytes(constMethodOopDesc::codes_offset()), G3_scratch);
1483 add(G3_scratch, O5, G3_scratch);
1484 cmp(Lbcp, G3_scratch);
1485 brx(Assembler::equal, false, Assembler::pt, verify_continue);
1486
1487 Register temp_reg = O5;
1488 delayed()->mov(ImethodDataPtr, temp_reg);
1489 // %%% should use call_VM_leaf here?
1490 //call_VM_leaf(noreg, ..., Lmethod, Lbcp, ImethodDataPtr);
1491 save_frame_and_mov(sizeof(jdouble) / wordSize, Lmethod, O0, Lbcp, O1);
1492 Address d_save(FP, 0, -sizeof(jdouble) + STACK_BIAS);
1493 stf(FloatRegisterImpl::D, Ftos_d, d_save);
1494 mov(temp_reg->after_save(), O2);
1495 save_thread(L7_thread_cache);
1496 call(CAST_FROM_FN_PTR(address, InterpreterRuntime::verify_mdp), relocInfo::none);
1497 delayed()->nop();
1498 restore_thread(L7_thread_cache);
1499 ldf(FloatRegisterImpl::D, d_save, Ftos_d);
1500 restore();
1501 bind(verify_continue);
1502 #endif // ASSERT
1503 }
1504
1505 void InterpreterMacroAssembler::test_invocation_counter_for_mdp(Register invocation_count,
1506 Register cur_bcp,
1507 Register Rtmp,
1508 Label &profile_continue) {
1509 assert(ProfileInterpreter, "must be profiling interpreter");
1510 // Control will flow to "profile_continue" if the counter is less than the
1511 // limit or if we call profile_method()
1512
1513 Label done;
1514
1515 // if no method data exists, and the counter is high enough, make one
1516 #ifdef _LP64
1517 bpr(Assembler::rc_nz, false, Assembler::pn, ImethodDataPtr, done);
1518 #else
1519 tst(ImethodDataPtr);
1520 br(Assembler::notZero, false, Assembler::pn, done);
1521 #endif
1522
1523 // Test to see if we should create a method data oop
1524 Address profile_limit(Rtmp, (address)&InvocationCounter::InterpreterProfileLimit);
1525 #ifdef _LP64
1526 delayed()->nop();
1527 sethi(profile_limit);
1528 #else
1529 delayed()->sethi(profile_limit);
1530 #endif
1531 ld(profile_limit, Rtmp);
1532 cmp(invocation_count, Rtmp);
1533 br(Assembler::lessUnsigned, false, Assembler::pn, profile_continue);
1534 delayed()->nop();
1535
1536 // Build it now.
1537 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::profile_method), cur_bcp);
1538 set_method_data_pointer_offset(O0);
1539 ba(false, profile_continue);
1540 delayed()->nop();
1541 bind(done);
1542 }
1543
1544 // Store a value at some constant offset from the method data pointer.
1545
1546 void InterpreterMacroAssembler::set_mdp_data_at(int constant, Register value) {
1547 assert(ProfileInterpreter, "must be profiling interpreter");
1548 st_ptr(value, ImethodDataPtr, constant);
1549 }
1550
1551 void InterpreterMacroAssembler::increment_mdp_data_at(Address counter,
1552 Register bumped_count,
1553 bool decrement) {
1554 assert(ProfileInterpreter, "must be profiling interpreter");
1555
1556 // Load the counter.
1557 ld_ptr(counter, bumped_count);
1558
1559 if (decrement) {
1560 // Decrement the register. Set condition codes.
1561 subcc(bumped_count, DataLayout::counter_increment, bumped_count);
1562
1563 // If the decrement causes the counter to overflow, stay negative
1564 Label L;
1565 brx(Assembler::negative, true, Assembler::pn, L);
1566
1567 // Store the decremented counter, if it is still negative.
1568 delayed()->st_ptr(bumped_count, counter);
1569 bind(L);
1570 } else {
1571 // Increment the register. Set carry flag.
1572 addcc(bumped_count, DataLayout::counter_increment, bumped_count);
1573
1574 // If the increment causes the counter to overflow, pull back by 1.
1575 assert(DataLayout::counter_increment == 1, "subc works");
1576 subc(bumped_count, G0, bumped_count);
1577
1578 // Store the incremented counter.
1579 st_ptr(bumped_count, counter);
1580 }
1581 }
1582
1583 // Increment the value at some constant offset from the method data pointer.
1584
1585 void InterpreterMacroAssembler::increment_mdp_data_at(int constant,
1586 Register bumped_count,
1587 bool decrement) {
1588 // Locate the counter at a fixed offset from the mdp:
1589 Address counter(ImethodDataPtr, 0, constant);
1590 increment_mdp_data_at(counter, bumped_count, decrement);
1591 }
1592
1593 // Increment the value at some non-fixed (reg + constant) offset from
1594 // the method data pointer.
1595
1596 void InterpreterMacroAssembler::increment_mdp_data_at(Register reg,
1597 int constant,
1598 Register bumped_count,
1599 Register scratch2,
1600 bool decrement) {
1601 // Add the constant to reg to get the offset.
1602 add(ImethodDataPtr, reg, scratch2);
1603 Address counter(scratch2, 0, constant);
1604 increment_mdp_data_at(counter, bumped_count, decrement);
1605 }
1606
1607 // Set a flag value at the current method data pointer position.
1608 // Updates a single byte of the header, to avoid races with other header bits.
1609
1610 void InterpreterMacroAssembler::set_mdp_flag_at(int flag_constant,
1611 Register scratch) {
1612 assert(ProfileInterpreter, "must be profiling interpreter");
1613 // Load the data header
1614 ldub(ImethodDataPtr, in_bytes(DataLayout::flags_offset()), scratch);
1615
1616 // Set the flag
1617 or3(scratch, flag_constant, scratch);
1618
1619 // Store the modified header.
1620 stb(scratch, ImethodDataPtr, in_bytes(DataLayout::flags_offset()));
1621 }
1622
1623 // Test the location at some offset from the method data pointer.
1624 // If it is not equal to value, branch to the not_equal_continue Label.
1625 // Set condition codes to match the nullness of the loaded value.
1626
1627 void InterpreterMacroAssembler::test_mdp_data_at(int offset,
1628 Register value,
1629 Label& not_equal_continue,
1630 Register scratch) {
1631 assert(ProfileInterpreter, "must be profiling interpreter");
1632 ld_ptr(ImethodDataPtr, offset, scratch);
1633 cmp(value, scratch);
1634 brx(Assembler::notEqual, false, Assembler::pn, not_equal_continue);
1635 delayed()->tst(scratch);
1636 }
1637
1638 // Update the method data pointer by the displacement located at some fixed
1639 // offset from the method data pointer.
1640
1641 void InterpreterMacroAssembler::update_mdp_by_offset(int offset_of_disp,
1642 Register scratch) {
1643 assert(ProfileInterpreter, "must be profiling interpreter");
1644 ld_ptr(ImethodDataPtr, offset_of_disp, scratch);
1645 add(ImethodDataPtr, scratch, ImethodDataPtr);
1646 }
1647
1648 // Update the method data pointer by the displacement located at the
1649 // offset (reg + offset_of_disp).
1650
1651 void InterpreterMacroAssembler::update_mdp_by_offset(Register reg,
1652 int offset_of_disp,
1653 Register scratch) {
1654 assert(ProfileInterpreter, "must be profiling interpreter");
1655 add(reg, offset_of_disp, scratch);
1656 ld_ptr(ImethodDataPtr, scratch, scratch);
1657 add(ImethodDataPtr, scratch, ImethodDataPtr);
1658 }
1659
1660 // Update the method data pointer by a simple constant displacement.
1661
1662 void InterpreterMacroAssembler::update_mdp_by_constant(int constant) {
1663 assert(ProfileInterpreter, "must be profiling interpreter");
1664 add(ImethodDataPtr, constant, ImethodDataPtr);
1665 }
1666
1667 // Update the method data pointer for a _ret bytecode whose target
1668 // was not among our cached targets.
1669
1670 void InterpreterMacroAssembler::update_mdp_for_ret(TosState state,
1671 Register return_bci) {
1672 assert(ProfileInterpreter, "must be profiling interpreter");
1673 push(state);
1674 st_ptr(return_bci, l_tmp); // protect return_bci, in case it is volatile
1675 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::update_mdp_for_ret), return_bci);
1676 ld_ptr(l_tmp, return_bci);
1677 pop(state);
1678 }
1679
1680 // Count a taken branch in the bytecodes.
1681
1682 void InterpreterMacroAssembler::profile_taken_branch(Register scratch, Register bumped_count) {
1683 if (ProfileInterpreter) {
1684 Label profile_continue;
1685
1686 // If no method data exists, go to profile_continue.
1687 test_method_data_pointer(profile_continue);
1688
1689 // We are taking a branch. Increment the taken count.
1690 increment_mdp_data_at(in_bytes(JumpData::taken_offset()), bumped_count);
1691
1692 // The method data pointer needs to be updated to reflect the new target.
1693 update_mdp_by_offset(in_bytes(JumpData::displacement_offset()), scratch);
1694 bind (profile_continue);
1695 }
1696 }
1697
1698
1699 // Count a not-taken branch in the bytecodes.
1700
1701 void InterpreterMacroAssembler::profile_not_taken_branch(Register scratch) {
1702 if (ProfileInterpreter) {
1703 Label profile_continue;
1704
1705 // If no method data exists, go to profile_continue.
1706 test_method_data_pointer(profile_continue);
1707
1708 // We are taking a branch. Increment the not taken count.
1709 increment_mdp_data_at(in_bytes(BranchData::not_taken_offset()), scratch);
1710
1711 // The method data pointer needs to be updated to correspond to the
1712 // next bytecode.
1713 update_mdp_by_constant(in_bytes(BranchData::branch_data_size()));
1714 bind (profile_continue);
1715 }
1716 }
1717
1718
1719 // Count a non-virtual call in the bytecodes.
1720
1721 void InterpreterMacroAssembler::profile_call(Register scratch) {
1722 if (ProfileInterpreter) {
1723 Label profile_continue;
1724
1725 // If no method data exists, go to profile_continue.
1726 test_method_data_pointer(profile_continue);
1727
1728 // We are making a call. Increment the count.
1729 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1730
1731 // The method data pointer needs to be updated to reflect the new target.
1732 update_mdp_by_constant(in_bytes(CounterData::counter_data_size()));
1733 bind (profile_continue);
1734 }
1735 }
1736
1737
1738 // Count a final call in the bytecodes.
1739
1740 void InterpreterMacroAssembler::profile_final_call(Register scratch) {
1741 if (ProfileInterpreter) {
1742 Label profile_continue;
1743
1744 // If no method data exists, go to profile_continue.
1745 test_method_data_pointer(profile_continue);
1746
1747 // We are making a call. Increment the count.
1748 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1749
1750 // The method data pointer needs to be updated to reflect the new target.
1751 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1752 bind (profile_continue);
1753 }
1754 }
1755
1756
1757 // Count a virtual call in the bytecodes.
1758
1759 void InterpreterMacroAssembler::profile_virtual_call(Register receiver,
1760 Register scratch,
1761 bool receiver_can_be_null) {
1762 if (ProfileInterpreter) {
1763 Label profile_continue;
1764
1765 // If no method data exists, go to profile_continue.
1766 test_method_data_pointer(profile_continue);
1767
1768 // We are making a call. Increment the count.
1769 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1770
1771 // Record the receiver type.
1772 record_klass_in_profile(receiver, scratch);
1773
1774 // The method data pointer needs to be updated to reflect the new target.
1775 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1776 bind (profile_continue);
1777 }
1778 }
1779
1780 void InterpreterMacroAssembler::record_klass_in_profile_helper(
1781 Register receiver, Register scratch,
1782 int start_row, Label& done) {
1783 int last_row = VirtualCallData::row_limit() - 1;
1784 assert(start_row <= last_row, "must be work left to do");
1785 // Test this row for both the receiver and for null.
1786 // Take any of three different outcomes:
1787 // 1. found receiver => increment count and goto done
1788 // 2. found null => keep looking for case 1, maybe allocate this cell
1789 // 3. found something else => keep looking for cases 1 and 2
1790 // Case 3 is handled by a recursive call.
1791 for (int row = start_row; row <= last_row; row++) {
1792 Label next_test;
1793 bool test_for_null_also = (row == start_row);
1794
1795 // See if the receiver is receiver[n].
1796 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(row));
1797 test_mdp_data_at(recvr_offset, receiver, next_test, scratch);
1798
1799 // The receiver is receiver[n]. Increment count[n].
1800 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(row));
1801 increment_mdp_data_at(count_offset, scratch);
1802 ba(false, done);
1803 delayed()->nop();
1804 bind(next_test);
1805
1806 if (test_for_null_also) {
1807 // Failed the equality check on receiver[n]... Test for null.
1808 if (start_row == last_row) {
1809 // The only thing left to do is handle the null case.
1810 brx(Assembler::notZero, false, Assembler::pt, done);
1811 delayed()->nop();
1812 break;
1813 }
1814 // Since null is rare, make it be the branch-taken case.
1815 Label found_null;
1816 brx(Assembler::zero, false, Assembler::pn, found_null);
1817 delayed()->nop();
1818
1819 // Put all the "Case 3" tests here.
1820 record_klass_in_profile_helper(receiver, scratch, start_row + 1, done);
1821
1822 // Found a null. Keep searching for a matching receiver,
1823 // but remember that this is an empty (unused) slot.
1824 bind(found_null);
1825 }
1826 }
1827
1828 // In the fall-through case, we found no matching receiver, but we
1829 // observed the receiver[start_row] is NULL.
1830
1831 // Fill in the receiver field and increment the count.
1832 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(start_row));
1833 set_mdp_data_at(recvr_offset, receiver);
1834 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(start_row));
1835 mov(DataLayout::counter_increment, scratch);
1836 set_mdp_data_at(count_offset, scratch);
1837 ba(false, done);
1838 delayed()->nop();
1839 }
1840
1841 void InterpreterMacroAssembler::record_klass_in_profile(Register receiver,
1842 Register scratch) {
1843 assert(ProfileInterpreter, "must be profiling");
1844 Label done;
1845
1846 record_klass_in_profile_helper(receiver, scratch, 0, done);
1847
1848 bind (done);
1849 }
1850
1851
1852 // Count a ret in the bytecodes.
1853
1854 void InterpreterMacroAssembler::profile_ret(TosState state,
1855 Register return_bci,
1856 Register scratch) {
1857 if (ProfileInterpreter) {
1858 Label profile_continue;
1859 uint row;
1860
1861 // If no method data exists, go to profile_continue.
1862 test_method_data_pointer(profile_continue);
1863
1864 // Update the total ret count.
1865 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1866
1867 for (row = 0; row < RetData::row_limit(); row++) {
1868 Label next_test;
1869
1870 // See if return_bci is equal to bci[n]:
1871 test_mdp_data_at(in_bytes(RetData::bci_offset(row)),
1872 return_bci, next_test, scratch);
1873
1874 // return_bci is equal to bci[n]. Increment the count.
1875 increment_mdp_data_at(in_bytes(RetData::bci_count_offset(row)), scratch);
1876
1877 // The method data pointer needs to be updated to reflect the new target.
1878 update_mdp_by_offset(in_bytes(RetData::bci_displacement_offset(row)), scratch);
1879 ba(false, profile_continue);
1880 delayed()->nop();
1881 bind(next_test);
1882 }
1883
1884 update_mdp_for_ret(state, return_bci);
1885
1886 bind (profile_continue);
1887 }
1888 }
1889
1890 // Profile an unexpected null in the bytecodes.
1891 void InterpreterMacroAssembler::profile_null_seen(Register scratch) {
1892 if (ProfileInterpreter) {
1893 Label profile_continue;
1894
1895 // If no method data exists, go to profile_continue.
1896 test_method_data_pointer(profile_continue);
1897
1898 set_mdp_flag_at(BitData::null_seen_byte_constant(), scratch);
1899
1900 // The method data pointer needs to be updated.
1901 int mdp_delta = in_bytes(BitData::bit_data_size());
1902 if (TypeProfileCasts) {
1903 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1904 }
1905 update_mdp_by_constant(mdp_delta);
1906
1907 bind (profile_continue);
1908 }
1909 }
1910
1911 void InterpreterMacroAssembler::profile_typecheck(Register klass,
1912 Register scratch) {
1913 if (ProfileInterpreter) {
1914 Label profile_continue;
1915
1916 // If no method data exists, go to profile_continue.
1917 test_method_data_pointer(profile_continue);
1918
1919 int mdp_delta = in_bytes(BitData::bit_data_size());
1920 if (TypeProfileCasts) {
1921 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1922
1923 // Record the object type.
1924 record_klass_in_profile(klass, scratch);
1925 }
1926
1927 // The method data pointer needs to be updated.
1928 update_mdp_by_constant(mdp_delta);
1929
1930 bind (profile_continue);
1931 }
1932 }
1933
1934 void InterpreterMacroAssembler::profile_typecheck_failed(Register scratch) {
1935 if (ProfileInterpreter && TypeProfileCasts) {
1936 Label profile_continue;
1937
1938 // If no method data exists, go to profile_continue.
1939 test_method_data_pointer(profile_continue);
1940
1941 int count_offset = in_bytes(CounterData::count_offset());
1942 // Back up the address, since we have already bumped the mdp.
1943 count_offset -= in_bytes(VirtualCallData::virtual_call_data_size());
1944
1945 // *Decrement* the counter. We expect to see zero or small negatives.
1946 increment_mdp_data_at(count_offset, scratch, true);
1947
1948 bind (profile_continue);
1949 }
1950 }
1951
1952 // Count the default case of a switch construct.
1953
1954 void InterpreterMacroAssembler::profile_switch_default(Register scratch) {
1955 if (ProfileInterpreter) {
1956 Label profile_continue;
1957
1958 // If no method data exists, go to profile_continue.
1959 test_method_data_pointer(profile_continue);
1960
1961 // Update the default case count
1962 increment_mdp_data_at(in_bytes(MultiBranchData::default_count_offset()),
1963 scratch);
1964
1965 // The method data pointer needs to be updated.
1966 update_mdp_by_offset(
1967 in_bytes(MultiBranchData::default_displacement_offset()),
1968 scratch);
1969
1970 bind (profile_continue);
1971 }
1972 }
1973
1974 // Count the index'th case of a switch construct.
1975
1976 void InterpreterMacroAssembler::profile_switch_case(Register index,
1977 Register scratch,
1978 Register scratch2,
1979 Register scratch3) {
1980 if (ProfileInterpreter) {
1981 Label profile_continue;
1982
1983 // If no method data exists, go to profile_continue.
1984 test_method_data_pointer(profile_continue);
1985
1986 // Build the base (index * per_case_size_in_bytes()) + case_array_offset_in_bytes()
1987 set(in_bytes(MultiBranchData::per_case_size()), scratch);
1988 smul(index, scratch, scratch);
1989 add(scratch, in_bytes(MultiBranchData::case_array_offset()), scratch);
1990
1991 // Update the case count
1992 increment_mdp_data_at(scratch,
1993 in_bytes(MultiBranchData::relative_count_offset()),
1994 scratch2,
1995 scratch3);
1996
1997 // The method data pointer needs to be updated.
1998 update_mdp_by_offset(scratch,
1999 in_bytes(MultiBranchData::relative_displacement_offset()),
2000 scratch2);
2001
2002 bind (profile_continue);
2003 }
2004 }
2005
2006 // add a InterpMonitorElem to stack (see frame_sparc.hpp)
2007
2008 void InterpreterMacroAssembler::add_monitor_to_stack( bool stack_is_empty,
2009 Register Rtemp,
2010 Register Rtemp2 ) {
2011
2012 Register Rlimit = Lmonitors;
2013 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
2014 assert( (delta & LongAlignmentMask) == 0,
2015 "sizeof BasicObjectLock must be even number of doublewords");
2016
2017 sub( SP, delta, SP);
2018 sub( Lesp, delta, Lesp);
2019 sub( Lmonitors, delta, Lmonitors);
2020
2021 if (!stack_is_empty) {
2022
2023 // must copy stack contents down
2024
2025 Label start_copying, next;
2026
2027 // untested("monitor stack expansion");
2028 compute_stack_base(Rtemp);
2029 ba( false, start_copying );
2030 delayed()->cmp( Rtemp, Rlimit); // done? duplicated below
2031
2032 // note: must copy from low memory upwards
2033 // On entry to loop,
2034 // Rtemp points to new base of stack, Lesp points to new end of stack (1 past TOS)
2035 // Loop mutates Rtemp
2036
2037 bind( next);
2038
2039 st_ptr(Rtemp2, Rtemp, 0);
2040 inc(Rtemp, wordSize);
2041 cmp(Rtemp, Rlimit); // are we done? (duplicated above)
2042
2043 bind( start_copying );
2044
2045 brx( notEqual, true, pn, next );
2046 delayed()->ld_ptr( Rtemp, delta, Rtemp2 );
2047
2048 // done copying stack
2049 }
2050 }
2051
2052 // Locals
2053 #ifdef ASSERT
2054 void InterpreterMacroAssembler::verify_local_tag(frame::Tag t,
2055 Register base,
2056 Register scratch,
2057 int n) {
2058 if (TaggedStackInterpreter) {
2059 Label ok, long_ok;
2060 // Use dst for scratch
2061 assert_different_registers(base, scratch);
2062 ld_ptr(base, Interpreter::local_tag_offset_in_bytes(n), scratch);
2063 if (t == frame::TagCategory2) {
2064 cmp(scratch, G0);
2065 brx(Assembler::equal, false, Assembler::pt, long_ok);
2066 delayed()->ld_ptr(base, Interpreter::local_tag_offset_in_bytes(n+1), scratch);
2067 stop("local long/double tag value bad");
2068 bind(long_ok);
2069 // compare second half tag
2070 cmp(scratch, G0);
2071 } else if (t == frame::TagValue) {
2072 cmp(scratch, G0);
2073 } else {
2074 assert_different_registers(O3, base, scratch);
2075 mov(t, O3);
2076 cmp(scratch, O3);
2077 }
2078 brx(Assembler::equal, false, Assembler::pt, ok);
2079 delayed()->nop();
2080 // Also compare if the local value is zero, then the tag might
2081 // not have been set coming from deopt.
2082 ld_ptr(base, Interpreter::local_offset_in_bytes(n), scratch);
2083 cmp(scratch, G0);
2084 brx(Assembler::equal, false, Assembler::pt, ok);
2085 delayed()->nop();
2086 stop("Local tag value is bad");
2087 bind(ok);
2088 }
2089 }
2090 #endif // ASSERT
2091
2092 void InterpreterMacroAssembler::access_local_ptr( Register index, Register dst ) {
2093 assert_not_delayed();
2094 sll(index, Interpreter::logStackElementSize(), index);
2095 sub(Llocals, index, index);
2096 debug_only(verify_local_tag(frame::TagReference, index, dst));
2097 ld_ptr(index, Interpreter::value_offset_in_bytes(), dst);
2098 // Note: index must hold the effective address--the iinc template uses it
2099 }
2100
2101 // Just like access_local_ptr but the tag is a returnAddress
2102 void InterpreterMacroAssembler::access_local_returnAddress(Register index,
2103 Register dst ) {
2104 assert_not_delayed();
2105 sll(index, Interpreter::logStackElementSize(), index);
2106 sub(Llocals, index, index);
2107 debug_only(verify_local_tag(frame::TagValue, index, dst));
2108 ld_ptr(index, Interpreter::value_offset_in_bytes(), dst);
2109 }
2110
2111 void InterpreterMacroAssembler::access_local_int( Register index, Register dst ) {
2112 assert_not_delayed();
2113 sll(index, Interpreter::logStackElementSize(), index);
2114 sub(Llocals, index, index);
2115 debug_only(verify_local_tag(frame::TagValue, index, dst));
2116 ld(index, Interpreter::value_offset_in_bytes(), dst);
2117 // Note: index must hold the effective address--the iinc template uses it
2118 }
2119
2120
2121 void InterpreterMacroAssembler::access_local_long( Register index, Register dst ) {
2122 assert_not_delayed();
2123 sll(index, Interpreter::logStackElementSize(), index);
2124 sub(Llocals, index, index);
2125 debug_only(verify_local_tag(frame::TagCategory2, index, dst));
2126 // First half stored at index n+1 (which grows down from Llocals[n])
2127 load_unaligned_long(index, Interpreter::local_offset_in_bytes(1), dst);
2128 }
2129
2130
2131 void InterpreterMacroAssembler::access_local_float( Register index, FloatRegister dst ) {
2132 assert_not_delayed();
2133 sll(index, Interpreter::logStackElementSize(), index);
2134 sub(Llocals, index, index);
2135 debug_only(verify_local_tag(frame::TagValue, index, G1_scratch));
2136 ldf(FloatRegisterImpl::S, index, Interpreter::value_offset_in_bytes(), dst);
2137 }
2138
2139
2140 void InterpreterMacroAssembler::access_local_double( Register index, FloatRegister dst ) {
2141 assert_not_delayed();
2142 sll(index, Interpreter::logStackElementSize(), index);
2143 sub(Llocals, index, index);
2144 debug_only(verify_local_tag(frame::TagCategory2, index, G1_scratch));
2145 load_unaligned_double(index, Interpreter::local_offset_in_bytes(1), dst);
2146 }
2147
2148
2149 #ifdef ASSERT
2150 void InterpreterMacroAssembler::check_for_regarea_stomp(Register Rindex, int offset, Register Rlimit, Register Rscratch, Register Rscratch1) {
2151 Label L;
2152
2153 assert(Rindex != Rscratch, "Registers cannot be same");
2154 assert(Rindex != Rscratch1, "Registers cannot be same");
2155 assert(Rlimit != Rscratch, "Registers cannot be same");
2156 assert(Rlimit != Rscratch1, "Registers cannot be same");
2157 assert(Rscratch1 != Rscratch, "Registers cannot be same");
2158
2159 // untested("reg area corruption");
2160 add(Rindex, offset, Rscratch);
2161 add(Rlimit, 64 + STACK_BIAS, Rscratch1);
2162 cmp(Rscratch, Rscratch1);
2163 brx(Assembler::greaterEqualUnsigned, false, pn, L);
2164 delayed()->nop();
2165 stop("regsave area is being clobbered");
2166 bind(L);
2167 }
2168 #endif // ASSERT
2169
2170 void InterpreterMacroAssembler::tag_local(frame::Tag t,
2171 Register base,
2172 Register src,
2173 int n) {
2174 if (TaggedStackInterpreter) {
2175 // have to store zero because local slots can be reused (rats!)
2176 if (t == frame::TagValue) {
2177 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n));
2178 } else if (t == frame::TagCategory2) {
2179 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n));
2180 st_ptr(G0, base, Interpreter::local_tag_offset_in_bytes(n+1));
2181 } else {
2182 // assert that we don't stomp the value in 'src'
2183 // O3 is arbitrary because it's not used.
2184 assert_different_registers(src, base, O3);
2185 mov( t, O3);
2186 st_ptr(O3, base, Interpreter::local_tag_offset_in_bytes(n));
2187 }
2188 }
2189 }
2190
2191
2192 void InterpreterMacroAssembler::store_local_int( Register index, Register src ) {
2193 assert_not_delayed();
2194 sll(index, Interpreter::logStackElementSize(), index);
2195 sub(Llocals, index, index);
2196 debug_only(check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);)
2197 tag_local(frame::TagValue, index, src);
2198 st(src, index, Interpreter::value_offset_in_bytes());
2199 }
2200
2201 void InterpreterMacroAssembler::store_local_ptr( Register index, Register src,
2202 Register tag ) {
2203 assert_not_delayed();
2204 sll(index, Interpreter::logStackElementSize(), index);
2205 sub(Llocals, index, index);
2206 #ifdef ASSERT
2207 check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);
2208 #endif
2209 st_ptr(src, index, Interpreter::value_offset_in_bytes());
2210 // Store tag register directly
2211 if (TaggedStackInterpreter) {
2212 st_ptr(tag, index, Interpreter::tag_offset_in_bytes());
2213 }
2214 }
2215
2216
2217
2218 void InterpreterMacroAssembler::store_local_ptr( int n, Register src,
2219 Register tag ) {
2220 st_ptr(src, Llocals, Interpreter::local_offset_in_bytes(n));
2221 if (TaggedStackInterpreter) {
2222 st_ptr(tag, Llocals, Interpreter::local_tag_offset_in_bytes(n));
2223 }
2224 }
2225
2226 void InterpreterMacroAssembler::store_local_long( Register index, Register src ) {
2227 assert_not_delayed();
2228 sll(index, Interpreter::logStackElementSize(), index);
2229 sub(Llocals, index, index);
2230 #ifdef ASSERT
2231 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2232 #endif
2233 tag_local(frame::TagCategory2, index, src);
2234 store_unaligned_long(src, index, Interpreter::local_offset_in_bytes(1)); // which is n+1
2235 }
2236
2237
2238 void InterpreterMacroAssembler::store_local_float( Register index, FloatRegister src ) {
2239 assert_not_delayed();
2240 sll(index, Interpreter::logStackElementSize(), index);
2241 sub(Llocals, index, index);
2242 #ifdef ASSERT
2243 check_for_regarea_stomp(index, Interpreter::value_offset_in_bytes(), FP, G1_scratch, G4_scratch);
2244 #endif
2245 tag_local(frame::TagValue, index, G1_scratch);
2246 stf(FloatRegisterImpl::S, src, index, Interpreter::value_offset_in_bytes());
2247 }
2248
2249
2250 void InterpreterMacroAssembler::store_local_double( Register index, FloatRegister src ) {
2251 assert_not_delayed();
2252 sll(index, Interpreter::logStackElementSize(), index);
2253 sub(Llocals, index, index);
2254 #ifdef ASSERT
2255 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2256 #endif
2257 tag_local(frame::TagCategory2, index, G1_scratch);
2258 store_unaligned_double(src, index, Interpreter::local_offset_in_bytes(1));
2259 }
2260
2261
2262 int InterpreterMacroAssembler::top_most_monitor_byte_offset() {
2263 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
2264 int rounded_vm_local_words = ::round_to(frame::interpreter_frame_vm_local_words, WordsPerLong);
2265 return ((-rounded_vm_local_words * wordSize) - delta ) + STACK_BIAS;
2266 }
2267
2268
2269 Address InterpreterMacroAssembler::top_most_monitor() {
2270 return Address(FP, 0, top_most_monitor_byte_offset());
2271 }
2272
2273
2274 void InterpreterMacroAssembler::compute_stack_base( Register Rdest ) {
2275 add( Lesp, wordSize, Rdest );
2276 }
2277
2278 #endif /* CC_INTERP */
2279
2280 void InterpreterMacroAssembler::increment_invocation_counter( Register Rtmp, Register Rtmp2 ) {
2281 assert(UseCompiler, "incrementing must be useful");
2282 #ifdef CC_INTERP
2283 Address inv_counter(G5_method, 0, in_bytes(methodOopDesc::invocation_counter_offset()
2284 + InvocationCounter::counter_offset()));
2285 Address be_counter(G5_method, 0, in_bytes(methodOopDesc::backedge_counter_offset()
2286 + InvocationCounter::counter_offset()));
2287 #else
2288 Address inv_counter(Lmethod, 0, in_bytes(methodOopDesc::invocation_counter_offset()
2289 + InvocationCounter::counter_offset()));
2290 Address be_counter(Lmethod, 0, in_bytes(methodOopDesc::backedge_counter_offset()
2291 + InvocationCounter::counter_offset()));
2292 #endif /* CC_INTERP */
2293 int delta = InvocationCounter::count_increment;
2294
2295 // Load each counter in a register
2296 ld( inv_counter, Rtmp );
2297 ld( be_counter, Rtmp2 );
2298
2299 assert( is_simm13( delta ), " delta too large.");
2300
2301 // Add the delta to the invocation counter and store the result
2302 add( Rtmp, delta, Rtmp );
2303
2304 // Mask the backedge counter
2305 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2306
2307 // Store value
2308 st( Rtmp, inv_counter);
2309
2310 // Add invocation counter + backedge counter
2311 add( Rtmp, Rtmp2, Rtmp);
2312
2313 // Note that this macro must leave the backedge_count + invocation_count in Rtmp!
2314 }
2315
2316 void InterpreterMacroAssembler::increment_backedge_counter( Register Rtmp, Register Rtmp2 ) {
2317 assert(UseCompiler, "incrementing must be useful");
2318 #ifdef CC_INTERP
2319 Address be_counter(G5_method, 0, in_bytes(methodOopDesc::backedge_counter_offset()
2320 + InvocationCounter::counter_offset()));
2321 Address inv_counter(G5_method, 0, in_bytes(methodOopDesc::invocation_counter_offset()
2322 + InvocationCounter::counter_offset()));
2323 #else
2324 Address be_counter(Lmethod, 0, in_bytes(methodOopDesc::backedge_counter_offset()
2325 + InvocationCounter::counter_offset()));
2326 Address inv_counter(Lmethod, 0, in_bytes(methodOopDesc::invocation_counter_offset()
2327 + InvocationCounter::counter_offset()));
2328 #endif /* CC_INTERP */
2329 int delta = InvocationCounter::count_increment;
2330 // Load each counter in a register
2331 ld( be_counter, Rtmp );
2332 ld( inv_counter, Rtmp2 );
2333
2334 // Add the delta to the backedge counter
2335 add( Rtmp, delta, Rtmp );
2336
2337 // Mask the invocation counter, add to backedge counter
2338 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2339
2340 // and store the result to memory
2341 st( Rtmp, be_counter );
2342
2343 // Add backedge + invocation counter
2344 add( Rtmp, Rtmp2, Rtmp );
2345
2346 // Note that this macro must leave backedge_count + invocation_count in Rtmp!
2347 }
2348
2349 #ifndef CC_INTERP
2350 void InterpreterMacroAssembler::test_backedge_count_for_osr( Register backedge_count,
2351 Register branch_bcp,
2352 Register Rtmp ) {
2353 Label did_not_overflow;
2354 Label overflow_with_error;
2355 assert_different_registers(backedge_count, Rtmp, branch_bcp);
2356 assert(UseOnStackReplacement,"Must UseOnStackReplacement to test_backedge_count_for_osr");
2357
2358 Address limit(Rtmp, address(&InvocationCounter::InterpreterBackwardBranchLimit));
2359 load_contents(limit, Rtmp);
2360 cmp(backedge_count, Rtmp);
2361 br(Assembler::lessUnsigned, false, Assembler::pt, did_not_overflow);
2362 delayed()->nop();
2363
2364 // When ProfileInterpreter is on, the backedge_count comes from the
2365 // methodDataOop, which value does not get reset on the call to
2366 // frequency_counter_overflow(). To avoid excessive calls to the overflow
2367 // routine while the method is being compiled, add a second test to make sure
2368 // the overflow function is called only once every overflow_frequency.
2369 if (ProfileInterpreter) {
2370 const int overflow_frequency = 1024;
2371 andcc(backedge_count, overflow_frequency-1, Rtmp);
2372 brx(Assembler::notZero, false, Assembler::pt, did_not_overflow);
2373 delayed()->nop();
2374 }
2375
2376 // overflow in loop, pass branch bytecode
2377 set(6,Rtmp);
2378 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), branch_bcp, Rtmp);
2379
2380 // Was an OSR adapter generated?
2381 // O0 = osr nmethod
2382 tst(O0);
2383 brx(Assembler::zero, false, Assembler::pn, overflow_with_error);
2384 delayed()->nop();
2385
2386 // Has the nmethod been invalidated already?
2387 ld(O0, nmethod::entry_bci_offset(), O2);
2388 cmp(O2, InvalidOSREntryBci);
2389 br(Assembler::equal, false, Assembler::pn, overflow_with_error);
2390 delayed()->nop();
2391
2392 // migrate the interpreter frame off of the stack
2393
2394 mov(G2_thread, L7);
2395 // save nmethod
2396 mov(O0, L6);
2397 set_last_Java_frame(SP, noreg);
2398 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_begin), L7);
2399 reset_last_Java_frame();
2400 mov(L7, G2_thread);
2401
2402 // move OSR nmethod to I1
2403 mov(L6, I1);
2404
2405 // OSR buffer to I0
2406 mov(O0, I0);
2407
2408 // remove the interpreter frame
2409 restore(I5_savedSP, 0, SP);
2410
2411 // Jump to the osr code.
2412 ld_ptr(O1, nmethod::osr_entry_point_offset(), O2);
2413 jmp(O2, G0);
2414 delayed()->nop();
2415
2416 bind(overflow_with_error);
2417
2418 bind(did_not_overflow);
2419 }
2420
2421
2422
2423 void InterpreterMacroAssembler::interp_verify_oop(Register reg, TosState state, const char * file, int line) {
2424 if (state == atos) { MacroAssembler::_verify_oop(reg, "broken oop ", file, line); }
2425 }
2426
2427
2428 // local helper function for the verify_oop_or_return_address macro
2429 static bool verify_return_address(methodOopDesc* m, int bci) {
2430 #ifndef PRODUCT
2431 address pc = (address)(m->constMethod())
2432 + in_bytes(constMethodOopDesc::codes_offset()) + bci;
2433 // assume it is a valid return address if it is inside m and is preceded by a jsr
2434 if (!m->contains(pc)) return false;
2435 address jsr_pc;
2436 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr);
2437 if (*jsr_pc == Bytecodes::_jsr && jsr_pc >= m->code_base()) return true;
2438 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr_w);
2439 if (*jsr_pc == Bytecodes::_jsr_w && jsr_pc >= m->code_base()) return true;
2440 #endif // PRODUCT
2441 return false;
2442 }
2443
2444
2445 void InterpreterMacroAssembler::verify_oop_or_return_address(Register reg, Register Rtmp) {
2446 if (!VerifyOops) return;
2447 // the VM documentation for the astore[_wide] bytecode allows
2448 // the TOS to be not only an oop but also a return address
2449 Label test;
2450 Label skip;
2451 // See if it is an address (in the current method):
2452
2453 mov(reg, Rtmp);
2454 const int log2_bytecode_size_limit = 16;
2455 srl(Rtmp, log2_bytecode_size_limit, Rtmp);
2456 br_notnull( Rtmp, false, pt, test );
2457 delayed()->nop();
2458
2459 // %%% should use call_VM_leaf here?
2460 save_frame_and_mov(0, Lmethod, O0, reg, O1);
2461 save_thread(L7_thread_cache);
2462 call(CAST_FROM_FN_PTR(address,verify_return_address), relocInfo::none);
2463 delayed()->nop();
2464 restore_thread(L7_thread_cache);
2465 br_notnull( O0, false, pt, skip );
2466 delayed()->restore();
2467
2468 // Perform a more elaborate out-of-line call
2469 // Not an address; verify it:
2470 bind(test);
2471 verify_oop(reg);
2472 bind(skip);
2473 }
2474
2475
2476 void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
2477 if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
2478 }
2479 #endif /* CC_INTERP */
2480
2481 // Inline assembly for:
2482 //
2483 // if (thread is in interp_only_mode) {
2484 // InterpreterRuntime::post_method_entry();
2485 // }
2486 // if (DTraceMethodProbes) {
2487 // SharedRuntime::dtrace_method_entry(method, reciever);
2488 // }
2489
2490 void InterpreterMacroAssembler::notify_method_entry() {
2491
2492 // C++ interpreter only uses this for native methods.
2493
2494 // Whenever JVMTI puts a thread in interp_only_mode, method
2495 // entry/exit events are sent for that thread to track stack
2496 // depth. If it is possible to enter interp_only_mode we add
2497 // the code to check if the event should be sent.
2498 if (JvmtiExport::can_post_interpreter_events()) {
2499 Label L;
2500 Register temp_reg = O5;
2501
2502 const Address interp_only (G2_thread, 0, in_bytes(JavaThread::interp_only_mode_offset()));
2503
2504 ld(interp_only, temp_reg);
2505 tst(temp_reg);
2506 br(zero, false, pt, L);
2507 delayed()->nop();
2508 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_entry));
2509 bind(L);
2510 }
2511
2512 {
2513 Register temp_reg = O5;
2514 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2515 call_VM_leaf(noreg,
2516 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2517 G2_thread, Lmethod);
2518 }
2519 }
2520
2521
2522 // Inline assembly for:
2523 //
2524 // if (thread is in interp_only_mode) {
2525 // // save result
2526 // InterpreterRuntime::post_method_exit();
2527 // // restore result
2528 // }
2529 // if (DTraceMethodProbes) {
2530 // SharedRuntime::dtrace_method_exit(thread, method);
2531 // }
2532 //
2533 // Native methods have their result stored in d_tmp and l_tmp
2534 // Java methods have their result stored in the expression stack
2535
2536 void InterpreterMacroAssembler::notify_method_exit(bool is_native_method,
2537 TosState state,
2538 NotifyMethodExitMode mode) {
2539 // C++ interpreter only uses this for native methods.
2540
2541 // Whenever JVMTI puts a thread in interp_only_mode, method
2542 // entry/exit events are sent for that thread to track stack
2543 // depth. If it is possible to enter interp_only_mode we add
2544 // the code to check if the event should be sent.
2545 if (mode == NotifyJVMTI && JvmtiExport::can_post_interpreter_events()) {
2546 Label L;
2547 Register temp_reg = O5;
2548
2549 const Address interp_only (G2_thread, 0, in_bytes(JavaThread::interp_only_mode_offset()));
2550
2551 ld(interp_only, temp_reg);
2552 tst(temp_reg);
2553 br(zero, false, pt, L);
2554 delayed()->nop();
2555
2556 // Note: frame::interpreter_frame_result has a dependency on how the
2557 // method result is saved across the call to post_method_exit. For
2558 // native methods it assumes the result registers are saved to
2559 // l_scratch and d_scratch. If this changes then the interpreter_frame_result
2560 // implementation will need to be updated too.
2561
2562 save_return_value(state, is_native_method);
2563 call_VM(noreg,
2564 CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_exit));
2565 restore_return_value(state, is_native_method);
2566 bind(L);
2567 }
2568
2569 {
2570 Register temp_reg = O5;
2571 // Dtrace notification
2572 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2573 save_return_value(state, is_native_method);
2574 call_VM_leaf(
2575 noreg,
2576 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2577 G2_thread, Lmethod);
2578 restore_return_value(state, is_native_method);
2579 }
2580 }
2581
2582 void InterpreterMacroAssembler::save_return_value(TosState state, bool is_native_call) {
2583 #ifdef CC_INTERP
2584 // result potentially in O0/O1: save it across calls
2585 stf(FloatRegisterImpl::D, F0, STATE(_native_fresult));
2586 #ifdef _LP64
2587 stx(O0, STATE(_native_lresult));
2588 #else
2589 std(O0, STATE(_native_lresult));
2590 #endif
2591 #else // CC_INTERP
2592 if (is_native_call) {
2593 stf(FloatRegisterImpl::D, F0, d_tmp);
2594 #ifdef _LP64
2595 stx(O0, l_tmp);
2596 #else
2597 std(O0, l_tmp);
2598 #endif
2599 } else {
2600 push(state);
2601 }
2602 #endif // CC_INTERP
2603 }
2604
2605 void InterpreterMacroAssembler::restore_return_value( TosState state, bool is_native_call) {
2606 #ifdef CC_INTERP
2607 ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0);
2608 #ifdef _LP64
2609 ldx(STATE(_native_lresult), O0);
2610 #else
2611 ldd(STATE(_native_lresult), O0);
2612 #endif
2613 #else // CC_INTERP
2614 if (is_native_call) {
2615 ldf(FloatRegisterImpl::D, d_tmp, F0);
2616 #ifdef _LP64
2617 ldx(l_tmp, O0);
2618 #else
2619 ldd(l_tmp, O0);
2620 #endif
2621 } else {
2622 pop(state);
2623 }
2624 #endif // CC_INTERP
2625 }