src/cpu/x86/vm/assembler_x86.hpp

rev 522 : [mq]: meth.patch

*** 133,142 ****
--- 133,163 ----
  // will cause an assertion failure
  #define rscratch1 noreg
  
  #endif // _LP64
  
+ // A union type for code which has to assemble both constant and non-constant operands.
+ class RegisterConstant VALUE_OBJ_CLASS_SPEC {
+  private:
+   Register _r;
+   intptr_t _c;
+ 
+  public:
+   RegisterConstant(): _r(noreg), _c(0) {}
+   RegisterConstant(Register r): _r(r), _c(0) {}
+   RegisterConstant(intptr_t c): _r(noreg), _c(c) {}
+ 
+   Register as_register() const { assert(is_register(),""); return _r; }
+   intptr_t as_constant() const { assert(is_constant(),""); return _c; }
+ 
+   Register register_or_noreg() const { return _r; }
+   intptr_t constant_or_zero() const  { return _c; }
+ 
+   bool is_register() const { return _r != noreg; }
+   bool is_constant() const { return _r == noreg; }
+ };
+ 
  // Address is an abstraction used to represent a memory location
  // using any of the amd64 addressing modes with one object.
  //
  // Note: A register location is represented via a Register, not
  //       via an address for efficiency & simplicity reasons.
*** 152,161 ****
--- 173,190 ----
      times_4  =  2,
      times_8  =  3,
      times_ptr = LP64_ONLY(times_8) NOT_LP64(times_4)
    };
  
+   static ScaleFactor times(int size) {
+     assert(size >= 1 && size <= 8 && is_power_of_2(size), "bad scale size");
+     if (size == 8)  return times_8;
+     if (size == 4)  return times_4;
+     if (size == 2)  return times_2;
+     return times_1;
+   }
+ 
   private:
    Register         _base;
    Register         _index;
    ScaleFactor      _scale;
    int              _disp;
*** 195,204 ****
--- 224,249 ----
        _disp (disp) {
      assert(!index->is_valid() == (scale == Address::no_scale),
             "inconsistent address");
    }
  
+   Address(Register base, RegisterConstant index, ScaleFactor scale = times_1, int disp = 0)
+     : _base (base),
+       _index(index.register_or_noreg()),
+       _scale(scale),
+       _disp (disp + (index.constant_or_zero() * scale_size(scale))) {
+     if (!index.is_register())  scale = Address::no_scale;
+     assert(!_index->is_valid() == (scale == Address::no_scale),
+            "inconsistent address");
+   }
+ 
+   Address plus_disp(int disp) {
+     Address result = (*this);
+     result._disp += disp;
+     return result;
+   }
+ 
    // The following two overloads are used in connection with the
    // ByteSize type (see sizes.hpp).  They simplify the use of
    // ByteSize'd arguments in assembly code. Note that their equivalent
    // for the optimized build are the member functions with int disp
    // argument since ByteSize is mapped to an int type in that case.
*** 222,231 ****
--- 267,287 ----
        _scale(scale),
        _disp(in_bytes(disp)) {
      assert(!index->is_valid() == (scale == Address::no_scale),
             "inconsistent address");
    }
+ 
+   Address(Register base, RegisterConstant index, ScaleFactor scale, ByteSize disp)
+     : _base (base),
+       _index(index.register_or_noreg()),
+       _scale(scale),
+       _disp (in_bytes(disp) + (index.constant_or_zero() * scale_size(scale))) {
+     if (!index.is_register())  scale = Address::no_scale;
+     assert(!_index->is_valid() == (scale == Address::no_scale),
+            "inconsistent address");
+   }
+ 
  #endif // ASSERT
  
    // accessors
    bool        uses(Register reg) const { return _base == reg || _index == reg; }
    Register    base()             const { return _base;  }
*** 238,247 ****
--- 294,311 ----
    // that to noreg for the Address constructor.
    static Address make_raw(int base, int index, int scale, int disp);
  
    static Address make_array(ArrayAddress);
  
+   static int scale_size(ScaleFactor scale) {
+     assert(scale != no_scale, "");
+     assert(((1 << (int)times_1) == 1 &&
+             (1 << (int)times_2) == 2 &&
+             (1 << (int)times_4) == 4 &&
+             (1 << (int)times_8) == 8), "");
+     return (1 << (int)scale);
+   }
  
   private:
    bool base_needs_rex() const {
      return _base != noreg && _base->encoding() >= 8;
    }
*** 1402,1411 ****
--- 1466,1478 ----
    int load_signed_word(Register dst, Address src);
  
    // Support for sign-extension (hi:lo = extend_sign(lo))
    void extend_sign(Register hi, Register lo);
  
+   // Loading values by size and signed-ness
+   void load_sized_value(Register dst, Address src, int size_in_bytes, bool is_signed);
+ 
    // Support for inc/dec with optimal instruction selection depending on value
  
    void increment(Register reg, int value = 1) { LP64_ONLY(incrementq(reg, value)) NOT_LP64(incrementl(reg, value)) ; }
    void decrement(Register reg, int value = 1) { LP64_ONLY(decrementq(reg, value)) NOT_LP64(decrementl(reg, value)) ; }
  
*** 1719,1728 ****
--- 1786,1828 ----
      Register t2,                       // temp register
      Label&   slow_case                 // continuation point if fast allocation fails
    );
    void tlab_refill(Label& retry_tlab, Label& try_eden, Label& slow_case);
  
+   // small bootstrap problems
+   RegisterConstant delayed_value(intptr_t* delayed_value_addr, Register tmp);
+   RegisterConstant delayed_value(int(*value_fn)(), Register tmp) {
+     return delayed_value(delayed_value_addr(value_fn), tmp);
+   }
+   RegisterConstant delayed_value(address(*value_fn)(), Register tmp) {
+     return delayed_value((intptr_t*) delayed_value_addr(value_fn), tmp);
+   }
+ 
+   // interface method calling
+   void lookup_interface_method(Register recv_klass,
+                                Register intf_klass,
+                                RegisterConstant itable_index,
+                                Register method_result,
+                                Register scan_temp,
+                                Label& no_such_interface);
+ 
+   // method handles (JSR 292)
+   void check_method_handle_type(Register mtype_reg, Register mh_reg,
+                                 Register temp_reg,
+                                 Label& wrong_method_type);
+   void load_method_handle_vmslots(Register vmslots_reg, Register mh_reg,
+                                   Register temp_reg);
+   void jump_to_method_handle_entry(Register mh_reg, Register temp_reg);
+   Address argument_address(RegisterConstant arg_slot, int extra_slot_offset = 0);
+ 
+ 
+   // klass type checking (falls through on failure)
+   void check_klass_subtype(Register sub_klass,
+                            Register super_klass,
+                            Register temp_reg,
+                            Label& L_success);
+ 
    //----
    void set_word_if_not_zero(Register reg); // sets reg to 1 if not zero, otherwise 0
  
    // Debugging