*** old/src/cpu/sparc/vm/assembler_sparc.inline.hpp	Tue Jan 20 02:13:43 2009
--- new/src/cpu/sparc/vm/assembler_sparc.inline.hpp	Tue Jan 20 02:13:43 2009

*** 141,150 ****
--- 141,173 ----
  #else
  inline void Assembler::ld(  Register s1, Register s2, Register d) { lduw( s1, s2, d); }
  inline void Assembler::ld(  Register s1, int simm13a, Register d) { lduw( s1, simm13a, d); }
  #endif
  
+ inline void Assembler::ld(    Register s1, RegisterConstant s2, Register d) {
+   if (s2.is_register())  ld(s1, s2.as_register(), d);
+   else                   ld(s1, s2.as_constant(), d);
+ }
+ inline void Assembler::ldsw(  Register s1, RegisterConstant s2, Register d) {
+   if (s2.is_register())  ldsw(s1, s2.as_register(), d);
+   else                   ldsw(s1, s2.as_constant(), d);
+ }
+ inline void Assembler::lduw(  Register s1, RegisterConstant s2, Register d) {
+   if (s2.is_register())  ldsw(s1, s2.as_register(), d);
+   else                   ldsw(s1, s2.as_constant(), d);
+ }
+ inline void Assembler::ldx(   Register s1, RegisterConstant s2, Register d) {
+   if (s2.is_register())  ldx(s1, s2.as_register(), d);
+   else                   ldx(s1, s2.as_constant(), d);
+ }
+ 
+ // form effective addresses this way:
+ inline void Assembler::add(   Register s1, RegisterConstant s2, Register d, int offset) {
+   if (s2.is_register())  add(s1, s2.as_register(), d);
+   else                 { add(s1, s2.as_constant() + offset, d); offset = 0; }
+   if (offset != 0)       add(d,  offset,                    d);
+ }
  
  inline void Assembler::ld(   const Address& a, Register d, int offset ) { relocate(a.rspec(offset)); ld(   a.base(), a.disp() + offset, d ); }
  inline void Assembler::ldsb( const Address& a, Register d, int offset ) { relocate(a.rspec(offset)); ldsb( a.base(), a.disp() + offset, d ); }
  inline void Assembler::ldsh( const Address& a, Register d, int offset ) { relocate(a.rspec(offset)); ldsh( a.base(), a.disp() + offset, d ); }
  inline void Assembler::ldsw( const Address& a, Register d, int offset ) { relocate(a.rspec(offset)); ldsw( a.base(), a.disp() + offset, d ); }

*** 198,207 ****
--- 221,239 ----
  inline void Assembler::std(  Register d, Register s1, int simm13a) { v9_dep(); assert(d->is_even(), "not even"); emit_data( op(ldst_op) | rd(d) | op3(std_op3) | rs1(s1) | immed(true) | simm(simm13a, 13)); }
  
  inline void Assembler::st(  Register d, Register s1, Register s2) { stw(d, s1, s2); }
  inline void Assembler::st(  Register d, Register s1, int simm13a) { stw(d, s1, simm13a); }
  
+ inline void Assembler::st(  Register d, Register s1, RegisterConstant s2) {
+   if (s2.is_register())  st(d, s1, s2.as_register());
+   else                   st(d, s1, s2.as_constant());
+ }
+ inline void Assembler::stx(  Register d, Register s1, RegisterConstant s2) {
+   if (s2.is_register())  stx(d, s1, s2.as_register());
+   else                   stx(d, s1, s2.as_constant());
+ }
+ 
  inline void Assembler::stb( Register d, const Address& a, int offset) { relocate(a.rspec(offset)); stb( d, a.base(), a.disp() + offset); }
  inline void Assembler::sth( Register d, const Address& a, int offset) { relocate(a.rspec(offset)); sth( d, a.base(), a.disp() + offset); }
  inline void Assembler::stw( Register d, const Address& a, int offset) { relocate(a.rspec(offset)); stw( d, a.base(), a.disp() + offset); }
  inline void Assembler::st(  Register d, const Address& a, int offset) { relocate(a.rspec(offset)); st(  d, a.base(), a.disp() + offset); }
  inline void Assembler::std( Register d, const Address& a, int offset) { relocate(a.rspec(offset)); std( d, a.base(), a.disp() + offset); }

*** 242,251 ****
--- 274,291 ----
  #else
    Assembler::ld(  s1, simm13a, d);
  #endif
  }
  
+ inline void MacroAssembler::ld_ptr( Register s1, RegisterConstant s2, Register d ) {
+ #ifdef _LP64
+   Assembler::ldx( s1, s2, d);
+ #else
+   Assembler::ld(  s1, s2, d);
+ #endif
+ }
+ 
  inline void MacroAssembler::ld_ptr( const Address& a, Register d, int offset ) {
  #ifdef _LP64
    Assembler::ldx(  a, d, offset );
  #else
    Assembler::ld(   a, d, offset );

*** 266,275 ****
--- 306,323 ----
  #else
    Assembler::st( d, s1, simm13a);
  #endif
  }
  
+ inline void MacroAssembler::st_ptr( Register d, Register s1, RegisterConstant s2 ) {
+ #ifdef _LP64
+   Assembler::stx( d, s1, s2);
+ #else
+   Assembler::st( d, s1, s2);
+ #endif
+ }
+ 
  inline void MacroAssembler::st_ptr(  Register d, const Address& a, int offset) {
  #ifdef _LP64
    Assembler::stx(  d, a, offset);
  #else
    Assembler::st(  d, a, offset);

*** 568,577 ****
--- 616,634 ----
  inline void MacroAssembler::jump_to( Address& a, int offset ) {
    jumpl_to( a, G0, offset );
  }
  
  
+ inline void MacroAssembler::jump_indirect_to(  Address& a, Register temp,
+                                                int ld_offset, int jmp_offset ) {
+   assert_not_delayed();
+   //sethi(a);                   // sethi is caller responsibility for this one
+   ld_ptr(a, temp, ld_offset);
+   jmp(temp, jmp_offset);
+ }
+ 
+ 
  inline void MacroAssembler::set_oop( jobject obj, Register d ) {
    set_oop(allocate_oop_address(obj, d));
  }