2598 delayed()->add(yield_reg,1,yield_reg);
2599
2600 // yes, got lock. do we have the same top?
2601 ld(top_ptr_reg_after_save, 0, value_reg);
2602 cmp(value_reg, top_reg_after_save);
2603 br(Assembler::notEqual, false, Assembler::pn, not_same);
2604 delayed()->nop();
2605
2606 // yes, same top.
2607 st(ptr_reg_after_save, top_ptr_reg_after_save, 0);
2608 membar(Assembler::StoreStore);
2609
2610 bind(not_same);
2611 mov(value_reg, ptr_reg_after_save);
2612 st(lock_reg, lock_ptr_reg, 0); // unlock
2613
2614 restore();
2615 }
2616 }
2617
2618 void MacroAssembler::biased_locking_enter(Register obj_reg, Register mark_reg,
2619 Register temp_reg,
2620 Label& done, Label* slow_case,
2621 BiasedLockingCounters* counters) {
2622 assert(UseBiasedLocking, "why call this otherwise?");
2623
2624 if (PrintBiasedLockingStatistics) {
2625 assert_different_registers(obj_reg, mark_reg, temp_reg, O7);
2626 if (counters == NULL)
2627 counters = BiasedLocking::counters();
2628 }
2629
2630 Label cas_label;
2631
2632 // Biased locking
2633 // See whether the lock is currently biased toward our thread and
2634 // whether the epoch is still valid
2635 // Note that the runtime guarantees sufficient alignment of JavaThread
2636 // pointers to allow age to be placed into low bits
2637 assert(markOopDesc::age_shift == markOopDesc::lock_bits + markOopDesc::biased_lock_bits, "biased locking makes assumptions about bit layout");
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2598 delayed()->add(yield_reg,1,yield_reg);
2599
2600 // yes, got lock. do we have the same top?
2601 ld(top_ptr_reg_after_save, 0, value_reg);
2602 cmp(value_reg, top_reg_after_save);
2603 br(Assembler::notEqual, false, Assembler::pn, not_same);
2604 delayed()->nop();
2605
2606 // yes, same top.
2607 st(ptr_reg_after_save, top_ptr_reg_after_save, 0);
2608 membar(Assembler::StoreStore);
2609
2610 bind(not_same);
2611 mov(value_reg, ptr_reg_after_save);
2612 st(lock_reg, lock_ptr_reg, 0); // unlock
2613
2614 restore();
2615 }
2616 }
2617
2618 RegisterConstant MacroAssembler::delayed_value(intptr_t* delayed_value_addr,
2619 Register tmp,
2620 int offset) {
2621 intptr_t value = *delayed_value_addr;
2622 if (value != 0)
2623 return value + offset;
2624
2625 // load indirectly to solve generation ordering problem
2626 Address a(tmp, (address) delayed_value_addr);
2627 load_ptr_contents(a, tmp);
2628
2629 #ifdef ASSERT
2630 tst(tmp);
2631 breakpoint_trap(zero, xcc);
2632 #endif
2633
2634 if (offset != 0)
2635 add(tmp, offset, tmp);
2636
2637 return tmp;
2638 }
2639
2640
2641 void MacroAssembler::lookup_interface_method(Register recv_klass,
2642 Register intf_klass,
2643 RegisterConstant itable_index,
2644 Register method_result,
2645 Register scan_temp,
2646 Label& L_no_such_interface) {
2647 Unimplemented();
2648 }
2649
2650
2651 // Test sub_klass against super_klass.
2652 // Fall through on failure, but branch to L_success if there is a match.
2653 // Use up the given temp_reg, but don't kill any other register.
2654 // Update the sub's secondary super cache if necesary.
2655 void MacroAssembler::check_klass_subtype(Register sub_klass,
2656 Register super_klass,
2657 Register temp_reg,
2658 Label& L_success) {
2659 Unimplemented();
2660 }
2661
2662
2663 void MacroAssembler::check_method_handle_type(Register mtype_reg, Register mh_reg,
2664 Register temp_reg,
2665 Label& wrong_method_type) {
2666 assert_different_registers(mtype_reg, mh_reg, temp_reg);
2667 // compare method type against that of the receiver
2668 RegisterConstant mhtype_offset = delayed_value(java_dyn_MethodHandle::type_offset_in_bytes, temp_reg);
2669 ld_ptr(mh_reg, mhtype_offset, temp_reg);
2670 cmp(temp_reg, mtype_reg);
2671 br(Assembler::notEqual, false, Assembler::pn, wrong_method_type);
2672 delayed()->nop();
2673 }
2674
2675
2676 void MacroAssembler::jump_to_method_handle_entry(Register mh_reg, Register temp_reg) {
2677 assert(mh_reg == G3_method_handle, "caller must put MH object in G3");
2678 assert_different_registers(mh_reg, temp_reg);
2679
2680 // pick out the interpreted side of the handler
2681 ld_ptr(mh_reg, delayed_value(java_dyn_MethodHandle::vmentry_offset_in_bytes, temp_reg), temp_reg);
2682
2683 // off we go...
2684 ld_ptr(temp_reg, MethodEntry::from_interpreted_entry_offset_in_bytes(), temp_reg);
2685 jmp(temp_reg, 0);
2686
2687 // for the various stubs which take control at this point,
2688 // see MethodHandles::generate_method_handle_stub
2689 }
2690
2691 RegisterConstant MacroAssembler::argument_offset(RegisterConstant arg_slot,
2692 int extra_slot_offset) {
2693 // cf. TemplateTable::prepare_invoke(), if (load_receiver).
2694 int stackElementSize = Interpreter::stackElementWords() * wordSize;
2695 int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0);
2696 int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1);
2697 assert(offset1 - offset == stackElementSize, "correct arithmetic");
2698 if (arg_slot.is_constant()) {
2699 offset += arg_slot.as_constant() * stackElementSize;
2700 return offset;
2701 } else {
2702 Register temp = arg_slot.as_register();
2703 sll_ptr(temp, exact_log2(stackElementSize), temp);
2704 if (offset != 0)
2705 add(temp, offset, temp);
2706 return temp;
2707 }
2708 }
2709
2710
2711
2712 void MacroAssembler::biased_locking_enter(Register obj_reg, Register mark_reg,
2713 Register temp_reg,
2714 Label& done, Label* slow_case,
2715 BiasedLockingCounters* counters) {
2716 assert(UseBiasedLocking, "why call this otherwise?");
2717
2718 if (PrintBiasedLockingStatistics) {
2719 assert_different_registers(obj_reg, mark_reg, temp_reg, O7);
2720 if (counters == NULL)
2721 counters = BiasedLocking::counters();
2722 }
2723
2724 Label cas_label;
2725
2726 // Biased locking
2727 // See whether the lock is currently biased toward our thread and
2728 // whether the epoch is still valid
2729 // Note that the runtime guarantees sufficient alignment of JavaThread
2730 // pointers to allow age to be placed into low bits
2731 assert(markOopDesc::age_shift == markOopDesc::lock_bits + markOopDesc::biased_lock_bits, "biased locking makes assumptions about bit layout");
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