1137 #endif 1138 1139 void nop(int i = 1); 1140 1141 void notl(Register dst); 1142 1143 #ifdef _LP64 1144 void notq(Register dst); 1145 #endif 1146 1147 void orl(Address dst, int32_t imm32); 1148 void orl(Register dst, int32_t imm32); 1149 void orl(Register dst, Address src); 1150 void orl(Register dst, Register src); 1151 1152 void orq(Address dst, int32_t imm32); 1153 void orq(Register dst, int32_t imm32); 1154 void orq(Register dst, Address src); 1155 void orq(Register dst, Register src); 1156 1157 void popl(Address dst); 1158 1159 #ifdef _LP64 1160 void popq(Address dst); 1161 #endif 1162 1163 // Prefetches (SSE, SSE2, 3DNOW only) 1164 1165 void prefetchnta(Address src); 1166 void prefetchr(Address src); 1167 void prefetcht0(Address src); 1168 void prefetcht1(Address src); 1169 void prefetcht2(Address src); 1170 void prefetchw(Address src); 1171 1172 // Shuffle Packed Doublewords 1173 void pshufd(XMMRegister dst, XMMRegister src, int mode); 1174 void pshufd(XMMRegister dst, Address src, int mode); 1175 1176 // Shuffle Packed Low Words 1177 void pshuflw(XMMRegister dst, XMMRegister src, int mode); 1178 void pshuflw(XMMRegister dst, Address src, int mode); 1179 1180 // Shift Right Logical Quadword Immediate 1181 void psrlq(XMMRegister dst, int shift); 1182 1183 // Interleave Low Bytes 1184 void punpcklbw(XMMRegister dst, XMMRegister src); 1185 1186 void pushl(Address src); 1187 1188 void pushq(Address src); 1189 1190 // Xor Packed Byte Integer Values 1191 void pxor(XMMRegister dst, Address src); 1192 void pxor(XMMRegister dst, XMMRegister src); 1193 1194 void rcll(Register dst, int imm8); 1195 1196 void rclq(Register dst, int imm8); 1197 1198 void ret(int imm16); 1199 1200 void sahf(); 1201 1202 void sarl(Register dst, int imm8); | 1137 #endif 1138 1139 void nop(int i = 1); 1140 1141 void notl(Register dst); 1142 1143 #ifdef _LP64 1144 void notq(Register dst); 1145 #endif 1146 1147 void orl(Address dst, int32_t imm32); 1148 void orl(Register dst, int32_t imm32); 1149 void orl(Register dst, Address src); 1150 void orl(Register dst, Register src); 1151 1152 void orq(Address dst, int32_t imm32); 1153 void orq(Register dst, int32_t imm32); 1154 void orq(Register dst, Address src); 1155 void orq(Register dst, Register src); 1156 1157 // SSE4.2 string instructions 1158 void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8); 1159 void pcmpestri(XMMRegister xmm1, Address src, int imm8); 1160 1161 void popl(Address dst); 1162 1163 #ifdef _LP64 1164 void popq(Address dst); 1165 #endif 1166 1167 // Prefetches (SSE, SSE2, 3DNOW only) 1168 1169 void prefetchnta(Address src); 1170 void prefetchr(Address src); 1171 void prefetcht0(Address src); 1172 void prefetcht1(Address src); 1173 void prefetcht2(Address src); 1174 void prefetchw(Address src); 1175 1176 // Shuffle Packed Doublewords 1177 void pshufd(XMMRegister dst, XMMRegister src, int mode); 1178 void pshufd(XMMRegister dst, Address src, int mode); 1179 1180 // Shuffle Packed Low Words 1181 void pshuflw(XMMRegister dst, XMMRegister src, int mode); 1182 void pshuflw(XMMRegister dst, Address src, int mode); 1183 1184 // Shift Right Logical Quadword Immediate 1185 void psrlq(XMMRegister dst, int shift); 1186 1187 // Logical Compare Double Quadword 1188 void ptest(XMMRegister dst, XMMRegister src); 1189 void ptest(XMMRegister dst, Address src); 1190 1191 // Interleave Low Bytes 1192 void punpcklbw(XMMRegister dst, XMMRegister src); 1193 1194 void pushl(Address src); 1195 1196 void pushq(Address src); 1197 1198 // Xor Packed Byte Integer Values 1199 void pxor(XMMRegister dst, Address src); 1200 void pxor(XMMRegister dst, XMMRegister src); 1201 1202 void rcll(Register dst, int imm8); 1203 1204 void rclq(Register dst, int imm8); 1205 1206 void ret(int imm16); 1207 1208 void sahf(); 1209 1210 void sarl(Register dst, int imm8); |